JP2016092300A - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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- JP2016092300A JP2016092300A JP2014227144A JP2014227144A JP2016092300A JP 2016092300 A JP2016092300 A JP 2016092300A JP 2014227144 A JP2014227144 A JP 2014227144A JP 2014227144 A JP2014227144 A JP 2014227144A JP 2016092300 A JP2016092300 A JP 2016092300A
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- semiconductor device
- wiring board
- semiconductor element
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Abstract
【解決手段】半導体装置10は、配線基板20と、配線基板20に実装された半導体素子30と、半導体素子30の背面に接着剤40を介して設けられた放熱板50と、放熱板50と配線基板20との間に充填された封止樹脂60とを有する。放熱板50は、半導体素子30と平面視で重なるように形成され、半導体素子30の平面形状よりも平面形状が大きく形成された本体部51と、本体部51と一体に形成され、本体部51の端部から外側に突出するように形成され、本体部51よりも低い位置に設けられた突出部52とを有する。封止樹脂60は、突出部52の上下両面を被覆するように形成されている。本体部51の上面51Aは、封止樹脂60から露出されている。
【選択図】図1
Description
以下、図1〜図6に従って第1実施形態を説明する。
図1(a)に示すように、半導体装置10は、BGA(Ball Grid Array)型の配線基板20と、その配線基板20の上面に実装された半導体素子30と、半導体素子30上に接着剤40を介して配置された放熱板50と、半導体素子30等を封止する封止樹脂60とを有している。
はんだボール23は、基板本体21の下面に形成されている。はんだボール23の材料としては、例えば、鉛(Pb)を含む合金、錫(Sn)とCuの合金、Snと銀(Ag)の合金、SnとAgとCuの合金などを用いることができる。このはんだボール23は、例えば、マザーボード等と接続される外部接続端子として機能する。
図3(a)及び図3(b)に示す工程では、まず、配線基板20を用意する。配線基板20の基板本体21としては、半導体装置10が多数個取れる大判の基板が使用される。詳述すると、基板本体21には、半導体装置10に対応する構造体が形成される個別領域C1がマトリクス状(図3(a)では、4×3)に形成されている。なお、大判の基板本体21は、最終的に破線で示した切断線D1に沿ってダイシングブレード等によって切断され、個々の半導体装置10として切り出される。
続いて、図5(a)及び図5(b)に示すように、複数の放熱板50が連結された大判の放熱板55を用意する。放熱板55には、基板本体21の個別領域C1に対応して複数の個別領域E1がマトリクス状(図5(a)では、4×3)、具体的には個別領域C1と同一の平面配置で形成されている。また、放熱板55は、複数の個別領域E1を囲むように形成されたフレーム部56を有している。
(1)配線基板20に半導体素子30をフリップチップ実装し、その半導体素子30の背面上に接着剤40を介して放熱板50を接着し、その放熱板50と配線基板20との間の空間を充填する封止樹脂60を形成するようにした。この封止樹脂60を設けたことにより、半導体装置10全体の機械的強度を高めることができる。これにより、半導体装置10の反りを効果的に低減することができる。また、配線基板20及び放熱板50を薄型化することが可能となるため、半導体装置10全体の薄型化を図ることができる。
以下、図7〜図9に従って第2実施形態を説明する。この実施形態の半導体装置10Aは、突出部52の形成位置が上記第1実施形態と異なっている。以下、第1実施形態との相違点を中心に説明する。なお、先の図1〜図6に示した部材と同一の部材にはそれぞれ同一の符号を付して示し、それら各要素についての詳細な説明は省略する。
(他の実施形態)
なお、上記各実施形態は、これを適宜変更した以下の態様にて実施することもできる。
・あるいは、放熱板55,55Aにおいて、個別領域E1の境界上に位置する延出部54の厚さ方向の中途部に、その延出部54を幅方向に貫通する貫通孔を形成するようにしてもよい。これによっても、半導体装置10の個片化の際における延出部54の切断量を減らすことができる。
・また、上記各実施形態及び上記各変形例の半導体装置10,10A,10Bにおいて、半導体装置10Cと同様に基板本体21の上面21Aにグランド配線24を形成した上で、封止樹脂60を、導電性を有する材料からなる封止樹脂に変更してもよい。この場合の放熱板50は、導電性を有する封止樹脂を介してグランド配線24と電気的に接続される。
・上記各実施形態では、製造過程における配線基板20を、マトリクス状に配列された複数の個別領域C1を有する配線基板に具体化した。これに限らず、例えば、個別領域C1が帯状に複数個配列された配線基板20に具体化してもよい。すなわち、個別領域C1がN×M個(Nは2以上の整数、Mは1以上の整数)配列された配線基板であれば、その個別領域C1の配列は特に限定されない。
・上記各実施形態及び上記各変形例では、BGA型の配線基板20に具体化したが、PGA(Pin Grid Array)型の配線基板やLGA(Land Grid Array)型の配線基板に具体化してもよい。
20 配線基板
21 基板本体
24 グランド配線
30 半導体素子
40 接着剤
50 放熱板
51 本体部
52 突出部
53 接続部
54 延出部
54X 切り欠き部
55,55A 大判の放熱板
60 封止樹脂
70 接着剤
Claims (8)
- 配線基板と、
前記配線基板に実装された半導体素子と、
前記半導体素子の上面に接着剤を介して設けられた放熱板と、
前記放熱板と前記配線基板との間に充填された封止樹脂と、を有し、
前記放熱板は、
前記半導体素子と平面視で重なるように形成され、前記半導体素子の平面形状よりも平面形状が大きく形成された本体部と、
前記本体部と一体に形成され、前記本体部の端部から外側に突出するように形成され、前記本体部よりも低い位置に設けられた突出部と、を有し、
前記封止樹脂は、前記突出部の上下両面を被覆するように形成され、
前記本体部の上面は、前記封止樹脂から露出されていることを特徴とする半導体装置。 - 前記突出部は、前記本体部の角部から外側に突出するように形成され、又は前記本体部の外形をなす各辺の1箇所から外側に突出するように形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記突出部は、前記本体部の端部から下方に屈曲された接続部と、前記接続部の端部から前記配線基板の外周縁に向かって前記本体部と平行となるように屈曲された延出部とを有することを特徴とする請求項1又は2に記載の半導体装置。
- 前記延出部の外側面は、前記封止樹脂の外側面及び前記配線基板の外側面と面一になるように形成されていることを特徴とする請求項3に記載の半導体装置。
- 前記延出部の前記接続部と接続される端部とは反対側の端部に切り欠き部が形成されていることを特徴とする請求項3又は4に記載の半導体装置。
- 前記突出部は、導電性を有する接着剤を介して、前記配線基板の上面に形成されたグランド配線と電気的に接続されていることを特徴とする請求項1〜5のいずれか一項に記載の半導体装置。
- N×M個(Nは2以上の整数、Mは1以上の整数)の個別領域を有する配線基板を準備し、前記各個別領域における前記配線基板の上面に半導体素子を実装する工程と、
本体部と、前記本体部と一体に形成され、前記本体部の端部から外側に突出して前記本体部と段差状に形成された突出部とを有する放熱板がN×M個連結された大判の放熱板を準備する工程と、
前記本体部が前記半導体素子と平面視で重なるように、前記半導体素子の背面上に接着剤を介して前記大判の放熱板を接着する工程と、
前記大判の放熱板と前記配線基板との間の空間を充填し、前記突出部の上下両面を被覆し、前記本体部の上面を露出する封止樹脂を形成する工程と、
切断領域上に配置された前記封止樹脂と前記突出部と前記配線基板とを切断して個片化する工程と、を有し、
前記切断領域は、前記各個別領域において前記本体部よりも外側に設定されていることを特徴とする半導体装置の製造方法。 - 前記突出部は、前記本体部の角部から外側に突出するように形成され、又は前記本体部の外形をなす各辺の1箇所から外側に突出するように形成されていることを特徴とする請求項7に記載の半導体装置の製造方法。
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