CN111316109B - 用于集成电路封装工作压力机测试系统的平衡适配力机构 - Google Patents

用于集成电路封装工作压力机测试系统的平衡适配力机构 Download PDF

Info

Publication number
CN111316109B
CN111316109B CN201880069761.9A CN201880069761A CN111316109B CN 111316109 B CN111316109 B CN 111316109B CN 201880069761 A CN201880069761 A CN 201880069761A CN 111316109 B CN111316109 B CN 111316109B
Authority
CN
China
Prior art keywords
pusher
pusher pin
chip package
pins
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201880069761.9A
Other languages
English (en)
Chinese (zh)
Other versions
CN111316109A (zh
Inventor
M·H·玛迪
D·M·马奥尼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US15/794,479 external-priority patent/US10367279B2/en
Priority claimed from US15/802,251 external-priority patent/US10564212B2/en
Priority claimed from US15/802,253 external-priority patent/US10539610B2/en
Application filed by Xilinx Inc filed Critical Xilinx Inc
Publication of CN111316109A publication Critical patent/CN111316109A/zh
Application granted granted Critical
Publication of CN111316109B publication Critical patent/CN111316109B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433—Sockets for IC's or transistors
    • G01R1/0441—Details
    • G01R1/0466—Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2865—Holding devices, e.g. chucks; Handlers or transport devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2896—Testing of IC packages; Test features related to IC packages

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
CN201880069761.9A 2017-10-26 2018-10-25 用于集成电路封装工作压力机测试系统的平衡适配力机构 Active CN111316109B (zh)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US15/794,479 2017-10-26
US15/794,479 US10367279B2 (en) 2017-10-26 2017-10-26 Pusher pin having a non-electrically conductive portion
US15/802,251 US10564212B2 (en) 2017-11-02 2017-11-02 Integrated circuit package testing system
US15/802,251 2017-11-02
US15/802,253 US10539610B2 (en) 2017-11-02 2017-11-02 Chip package test system
US15/802,253 2017-11-02
PCT/US2018/057586 WO2019084318A1 (en) 2017-10-26 2018-10-25 BALANCED CONFORMATION FORCE MECHANISM FOR INTEGRATED CIRCUIT BOX WORK PRESS SYSTEMS

Publications (2)

Publication Number Publication Date
CN111316109A CN111316109A (zh) 2020-06-19
CN111316109B true CN111316109B (zh) 2023-04-07

Family

ID=64362641

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880069761.9A Active CN111316109B (zh) 2017-10-26 2018-10-25 用于集成电路封装工作压力机测试系统的平衡适配力机构

Country Status (5)

Country Link
EP (1) EP3701273B1 (enExample)
JP (1) JP7247177B2 (enExample)
KR (1) KR102657145B1 (enExample)
CN (1) CN111316109B (enExample)
WO (1) WO2019084318A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113053774A (zh) * 2019-12-27 2021-06-29 迪科特测试科技(苏州)有限公司 探测装置
TWI817183B (zh) * 2021-08-23 2023-10-01 鴻勁精密股份有限公司 壓接機構、測試裝置及作業機
CN115754684B (zh) * 2023-01-06 2023-07-14 法特迪精密科技（苏州）有限公司 芯片老化测试台
CN116224037B (zh) * 2023-01-06 2023-10-03 法特迪精密科技（苏州）有限公司 一种芯片温度循环老化测试台上实现的芯片温度循环老化测试方法
KR20250171269A (ko) * 2024-05-28 2025-12-08 양쯔 메모리 테크놀로지스 씨오., 엘티디. 반도체 칩 패키지를 시험하기 위한 방법 및 시험 시스템

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108170944A (zh) * 2017-12-26 2018-06-15 全球能源互联网研究院有限公司 一种半导体器件的压力均衡制作参数优化方法及制作方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6025732A (en) * 1993-07-09 2000-02-15 Aehr Test Systems Reusable die carrier for burn-in and burn-in process
US5640303A (en) * 1995-10-30 1997-06-17 Precision Connector Designs, Inc. Interconnection apparatus for semiconductor/integrated circuit devices
JPH09159694A (ja) * 1995-12-08 1997-06-20 Nec Corp Ｌｓｉテストプローブ装置
JPH10221398A (ja) * 1997-01-31 1998-08-21 Aiwa Co Ltd プリント基板の検査装置
JPH11243271A (ja) * 1998-02-25 1999-09-07 Fuji Photo Film Co Ltd 基板矯正装置
JPH11242067A (ja) * 1998-02-25 1999-09-07 Fuji Photo Film Co Ltd 基板検査装置
JP4175492B2 (ja) * 1999-09-07 2008-11-05 株式会社日立コミュニケーションテクノロジー プリント基板検査治具
JP3822539B2 (ja) * 2001-08-09 2006-09-20 山一電機株式会社 Ｉｃソケット
US7108517B2 (en) * 2004-09-27 2006-09-19 Wells-Cti, Llc Multi-site chip carrier and method
US7262615B2 (en) * 2005-10-31 2007-08-28 Freescale Semiconductor, Inc. Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections
US7601009B2 (en) * 2006-05-18 2009-10-13 Centipede Systems, Inc. Socket for an electronic device
KR101341566B1 (ko) * 2007-07-10 2013-12-16 삼성전자주식회사 소켓, 검사 장치, 그리고 적층형 반도체 소자 제조 방법
JP2009121992A (ja) * 2007-11-15 2009-06-04 Sharp Corp 電子回路基板およびテスト装置
JP2011257239A (ja) * 2010-06-08 2011-12-22 Renesas Electronics Corp 電子装置の電気的特性検査装置及び電気的特性検査方法
JP5570384B2 (ja) * 2010-10-15 2014-08-13 日置電機株式会社 ピンボードユニットおよび基板検査装置
FR2983969B1 (fr) * 2011-12-07 2014-12-05 Larisys Ind Dispositif de controle de cartes electroniques.
US9082644B2 (en) * 2013-01-18 2015-07-14 Infineon Technologies Ag Method of manufacturing and testing a chip package
CN103399268A (zh) * 2013-07-19 2013-11-20 上海韬盛电子科技有限公司 顶针式的集成电路测试治具
DE102015215634A1 (de) * 2015-08-17 2017-02-23 Atx Hardware Gmbh Halter zum Niederhalten einer zu prüfenden Platine auf einen Prüfadapter in einer Prüfanordnung
US20170059611A1 (en) * 2015-09-02 2017-03-02 Oracle International Corporation Coaxial integrated circuit test socket
KR101782600B1 (ko) * 2016-02-02 2017-10-23 (주)티에스이 반도체 패키지 테스트 장치

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108170944A (zh) * 2017-12-26 2018-06-15 全球能源互联网研究院有限公司 一种半导体器件的压力均衡制作参数优化方法及制作方法

Also Published As

Publication number Publication date
WO2019084318A1 (en) 2019-05-02
EP3701273B1 (en) 2025-03-26
KR102657145B1 (ko) 2024-04-11
KR20200078560A (ko) 2020-07-01
JP7247177B2 (ja) 2023-03-28
JP2021501317A (ja) 2021-01-14
CN111316109A (zh) 2020-06-19
EP3701273A1 (en) 2020-09-02

Similar Documents

Publication Publication Date Title
US10564212B2 (en) Integrated circuit package testing system
CN111316109B (zh) 用于集成电路封装工作压力机测试系统的平衡适配力机构
US10539610B2 (en) Chip package test system
US10367279B2 (en) Pusher pin having a non-electrically conductive portion
TWI701446B (zh) 用於測試ic的插座裝置
US6809930B2 (en) Cooling a microchip on a circuit board
US10705120B2 (en) Force deflection and resistance testing system and method of use
CN1274425A (zh) 具有可改变的热沉装置的老化板
US20090315168A1 (en) Through board stacking of multiple lga-connected components
US10257952B2 (en) Side clamping BGA socket
US11621212B2 (en) Backing plate with manufactured features on top surface
US10527670B2 (en) Testing system for lid-less integrated circuit packages
US10473713B2 (en) Interposer block with retractable spring pin top cover plate
JP2010534844A (ja) 電子部品、特にｉｃを保持しかつ移動する熱伝導体を有するプランジャ
US20240356285A1 (en) Connector system for connecting processor systems and related methods
TWI856845B (zh) 具有溫度傳導裝置的壓接機構以及應用該壓接機構的測試分類設備
JP2014173907A (ja) 半導体デバイスの検査ユニット
CN216437599U (zh) 一种带有电流检测芯片的电路板
JP2004538602A (ja) ランド・グリッド・アレイ・コネクタ用の取外し可能締め付け手段
US6921272B2 (en) Method and apparatus for providing positive contact force in an electrical assembly
WO2024241675A1 (ja) 電気部品用ソケット
CN118130990A (zh) 功率半导体器件热阻测试系统及方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant