CN111293101B - 半导体封装 - Google Patents

半导体封装 Download PDF

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Publication number
CN111293101B
CN111293101B CN201911242024.7A CN201911242024A CN111293101B CN 111293101 B CN111293101 B CN 111293101B CN 201911242024 A CN201911242024 A CN 201911242024A CN 111293101 B CN111293101 B CN 111293101B
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Prior art keywords
substrate
semiconductor chip
solder resist
resin
layer
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Chinese (zh)
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CN111293101A (zh
Inventor
佐藤圣二
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
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US11094625B2 (en) 2019-01-02 2021-08-17 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package with improved interposer structure
US20230187367A1 (en) * 2021-12-10 2023-06-15 Advanced Semiconductor Engineering, Inc. Electronic package structure and method for manufacturing the same
JP7740628B2 (ja) 2021-12-20 2025-09-17 新光電気工業株式会社 電子部品内蔵基板及び電子部品内蔵基板の製造方法
JP2023125723A (ja) * 2022-02-28 2023-09-07 新光電気工業株式会社 電子部品内蔵基板及びその製造方法
CN115151060A (zh) * 2022-07-27 2022-10-04 无锡豪帮高科股份有限公司 一种液晶面板驱动用传感器的叠板工艺

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US8304296B2 (en) * 2010-06-23 2012-11-06 Stats Chippac Ltd. Semiconductor packaging system with multipart conductive pillars and method of manufacture thereof
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KR102245770B1 (ko) * 2013-10-29 2021-04-28 삼성전자주식회사 반도체 패키지 장치
US9947642B2 (en) * 2015-10-02 2018-04-17 Qualcomm Incorporated Package-on-Package (PoP) device comprising a gap controller between integrated circuit (IC) packages
US10229859B2 (en) * 2016-08-17 2019-03-12 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same
US10622340B2 (en) * 2016-11-21 2020-04-14 Samsung Electronics Co., Ltd. Semiconductor package
KR102427557B1 (ko) * 2017-09-29 2022-08-01 삼성전자주식회사 반도체 패키지
JP6917295B2 (ja) * 2017-12-25 2021-08-11 新光電気工業株式会社 電子部品内蔵基板、シート基板
KR102448248B1 (ko) * 2018-05-24 2022-09-27 삼성전자주식회사 Pop형 반도체 패키지 및 그 제조 방법
US11075151B2 (en) * 2018-06-29 2021-07-27 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out package with controllable standoff
US10825774B2 (en) * 2018-08-01 2020-11-03 Samsung Electronics Co., Ltd. Semiconductor package
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CN111293101A (zh) 2020-06-16

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