CN111033733B - 集成半导体组合件及其制造方法 - Google Patents

集成半导体组合件及其制造方法 Download PDF

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Publication number
CN111033733B
CN111033733B CN201880054982.9A CN201880054982A CN111033733B CN 111033733 B CN111033733 B CN 111033733B CN 201880054982 A CN201880054982 A CN 201880054982A CN 111033733 B CN111033733 B CN 111033733B
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die
cavity
base substrate
peripheral region
assembly
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CN111033733A (zh
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T·H·金斯利
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Micron Technology Inc
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Micron Technology Inc
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Abstract

本文揭示集成半导体组合件及相关联的制造方法。在一个实施例中，一种半导体装置组合件包括基底衬底，其具有腔及至少部分围绕所述腔的周边区域。所述腔由至少部分延伸穿过所述衬底的侧壁界定。所述组合件进一步包括在所述腔处附接到所述基底衬底的第一裸片及位于所述第一裸片的至少部分上方且在所述周边区域处附接到所述基底衬底的第二裸片。在一些实施例中，所述第一裸片及所述第二裸片可经由所述衬底的电路彼此电耦合。

Description

集成半导体组合件及其制造方法
技术领域
本发明涉及封装半导体装置(例如存储器及处理器)，且若干实施例涉及包含具有腔的衬底的集成半导体组合件。
背景技术
经封装半导体裸片(包含存储器裸片、微处理器裸片及接口裸片)通常包含安装于衬底上且围封于塑料保护覆盖物中的半导体裸片。裸片包含功能特征(例如存储器单元、处理器电路及互连电路)及电连接到功能特征的接合垫。接合垫通常经电连接到在保护覆盖物的外部延伸的外部端子以允许裸片连接到总线、电路或其它更高阶电路。
半导体裸片制造商在日益增加之压力下不断减小裸片封装的大小来适应电子装置的空间约束，同时也增加每一封装的功能容量以满足操作参数。用于增加半导体封装的处理能力且大体上不增大由封装覆盖的表面积(即，封装的“占据面积”)的方法是在单个封装中使多个半导体裸片彼此上下垂直堆叠。但是，堆叠多个裸片增大装置的垂直轮廓，其需要大体上薄化个别裸片以达成垂直紧凑大小。另外，堆叠多个裸片会增加装置故障可能性且导致与较长制造及测试时间相关联的较高成本。
附图说明
图1A是根据本发明的实施例所配置的半导体装置组合件的示意性横截面图。
图1B是沿着线1B-1B截取的图1A中所示的半导体装置组合件的示意性俯视图。
图2A到2C是说明根据本发明的实施例的形成半导体装置组合件的方法的示意性横截面图。
图3是根据本发明的另一实施例所配置的半导体装置组合件的示意性俯视图。
图4到7是根据本发明的其它实施例所配置的半导体装置组合件的示意性横截面图。
图8是包含根据本发明的实施例所配置的半导体裸片组合件的系统的示意图。
具体实施方式
下文将描述堆叠半导体裸片封装及制造此类裸片封装的方法的若干实施例的具体细节。术语“半导体装置”一般是指包含半导体材料的固态装置。半导体装置可包含(例如)半导体衬底、晶片或从晶片或衬底分割的裸片。在本发明中，大致在半导体裸片的背景下描述半导体装置；但是，半导体装置不限于为半导体裸片。
术语“半导体装置封装”可是指具有并入到共同封装中的一或多个半导体装置的布置。半导体封装可包含部分或完全囊封至少一个半导体装置的外壳或壳体。半导体装置封装也可包含承载一或多个半导体装置且附接到或以其它方式并入到壳体中的中介层衬底。术语“堆叠封装组合件”可是指彼此上下堆叠的一或多个个别半导体装置封装的组合件或堆叠封装组合件。
如本文中所使用，术语“垂直”、“横向”、“顶部”、“底部”、“上”及“下”可是指鉴于图中所示的定向的半导体装置或封装中的特征的相对方向或位置。例如，“上”或“最外”可是指定位为比另一特征更接近页面的顶部的特征。但是，这些术语应被广义解释为包含具有其它定向(例如颠倒或倾斜定向，其中可取决于定向来互换顶部/底部、上面/下面、上方/下方、上/下、垂直/水平及左/右)的半导体装置。
图1A是根据本发明的实施例所配置的半导体装置组合件100(“组合件100”)的示意性横截面图，且图1B是沿着线1B-1B截取的图1A中所示的组合件100的示意性俯视图。图1A中展示的组合件100是沿着图1B的线1A-1A截取。同时参考图1A及图1B，组合件100包含基底衬底110、安装到衬底110的第一裸片120及安装到衬底110的第二裸片130。衬底110包含第一侧111a、与第一侧111a相对的第二侧111b、第一侧111a处的腔115，及具有用于使第一半导体裸片120及第二半导体裸片130彼此电耦合的电路(例如铜迹线及通路)、其它电子装置及/或电连接器116(例如焊球、金指状物或其它互连件)的一或多个电源及/或信号层117。例如，衬底110可为印刷电路板(PCB)或常用于半导体装置封装中的其它类型的衬底。在一些实施例中，衬底110可至少部分由硅形成。衬底110包含腔区域(C)及至少部分围绕腔区域(C)的周边区域(P)。因而，衬底110包含连续最外表面，其包含周边区域(P)的至少上表面112a、腔区域(C)的下表面112b及侧壁128。在所说明的实施例中，周边区域(P)完全围绕腔区域(C)。
腔115定位于衬底的腔区域(C)中且由侧壁128及下表面112b界定。侧壁128至少部分延伸穿过衬底110而到中间深度或第二距离(D2)。在一些实施例中，侧壁128可从第一侧111a延伸穿过衬底110而到第二侧111b。在图1B所说明的实施例中，腔115完全定位于衬底110内且因此包含四个侧壁128。在其它实施例中，腔115可延伸到或超过衬底110的长度或宽度且因此可仅包含两个侧壁128(例如图3)。尽管图1A及1B中所说明的腔115具有含四个侧壁的直线平面，但在其它实施例中，腔可具有许多其它形状的任一者，其包含具有任何数量个边的规则多边形、不规则多边形、椭圆或曲线形状等。
第一裸片120定位于腔115内且包含顶面121a及与顶面121a相对的底面121b。第一裸片120经由底侧121b处的多个电连接器122(例如焊球、接合垫等)附接到基底衬底110。顶面121a与腔115的下表面112b分离第一距离(D1)。在所说明的实施例中，第一距离(D1)小于先前所描述的第二距离(D2)。因此，第一裸片120经完全定位于腔115内，使得第一裸片120的顶面121a位于衬底110的周边区域(P)的上表面112a下方。在其它实施例中，第一距离(D1)可等于(例如图2A到2C)或略大于第二距离(D2)。第一裸片120可包含存储器装置或存储器模块(例如DRAM、LPDRAM、SRAM、DIMM、NVDIMM、RDIMM、LRDIMM、快闪存储器等)。在一些实施例中，第一裸片120可包含逻辑装置及/或处理器。
图1A所说明的实施例仅包含单个裸片。在一些实施例中，额外裸片可经包含于腔115中。例如，腔115中的裸片的堆叠可经配置为混合存储器立方体(HMC)，其中最下裸片是提供存储器控制(例如DRAM控制)的逻辑裸片，且最下裸片上方的堆叠裸片是DRAM或提供数据存储的其它存储器裸片。在此实施例中，堆叠的最外裸片的顶面位于第二裸片130的底面下方。
第二裸片130定位于第一裸片120的部分上方且包含顶面137a及底面137b。因而，第二裸片130横越第一裸片120及腔区域115。第二裸片130在周边区域(P)处经由电连接器132(例如焊球、接合垫等)附接到衬底110。电连接器132可经由衬底110将第二裸片130电耦合到(i)衬底110及/或(ii)第一裸片120。在所说明的实施例中，第二裸片130包含大于腔115及第一裸片120的尺寸的横向尺寸。第二裸片130的底面137b与腔区域(C)的下表面112b间隔开第三距离(D3)。第三距离(D3)大于第一距离(D1)及第二距离(D2)中的每一者。第二裸片130可为逻辑装置、处理器或另一存储器装置。组合件100也可视情况包含第一裸片120与第二裸片130之间的电连接器140(例如焊球、接合垫等)。在此实施例中，电连接器140将第一裸片120直接电耦合到第二裸片130。
本发明的一个优势是通过将第一裸片120安装于腔115内及/或第二裸片130下方来达成组合件100的厚度减小。因为第一裸片120经安装于腔115内，所以第二裸片130可经安装于第一裸片120上方且靠近衬底的上表面112a以借此减小整个组合件的厚度。如先前所提及，堆叠装置具有较高装置故障机率及与较长制造及测试时间相关联的较高成本。因此，包含本发明的组合件可导致更高产率、更有效率制造及降低成本。
本发明的另一优势是能够更有效率地从第一裸片120及/或第二裸片130散热。与其中多个裸片经直接彼此上下堆叠的常规堆叠装置不同，本发明包含第一裸片120与第二裸片130之间的气隙以借此允许两个裸片经由与周围环境对流冷却。因此，组合件100可维持比堆叠装置低的平均操作温度以导致更有效率操作及更长运行时间。
本发明的又一优势是相对于第一裸片120定位第二裸片130。在常规堆叠组合件中，处理器通常是主要发热源且通常定位于堆叠的底部处的衬底附近。此部分是因为处理器通常包含相对于堆叠的其它裸片的最大横向尺寸。此类型布置导致热量被困于堆叠的底部处且导致组合件的总体操作温度升高。与常规堆叠组合件不同，本发明的第二裸片130可包含处理器且定位于第一裸片120上方。因而，从处理器产生的任何热量向上朝向周围环境释放且对腔115内的第一裸片120具有较少热效应。因此，本发明可导致更低操作温度及更有效率装置。
图2A到2C是说明根据本发明的实施例的形成半导体装置组合件(例如或类似于组合件100)的方法的示意性横截面图。图2A说明腔115已经形成于衬底110中且第一裸片120已经安置于侧壁128之间的腔115内后的方法。可通过研磨、干式蚀刻、化学蚀刻、化学抛光、化学机械抛光或本技术中已知的其它适合工艺形成腔115。可预先确定腔的横向尺寸或宽度以确保第一裸片120可适配于腔115内。类似地，可基于回流前及/或回流后的第一裸片120及电连接器122的组合高度来预先确定腔115的深度。在所说明的实施例中，第一裸片120的顶面121a大致与衬底110的周边区域(P)的上表面112a共面。
图2B说明模具材料220(例如底部填充材料、囊封剂等)已经沉积于腔115中以囊封第一裸片120后的方法的实施例。在所说明的实施例中，模具材料220的外表面与衬底110的周边区域(P)的上表面112a齐平。因此，在所说明的实施例中，模具材料220仅部分囊封第一裸片120，因为第一裸片120的顶面121a大致与周边区域(P)的上表面112a共面且因此通过模具材料220暴露。在其它实施例中，第一裸片120的顶面121a位于上表面112a下方(例如图1A及1B)。在此实施例中，顶面121a未通过模具材料220暴露，因此，模具材料220完全囊封第一裸片120。在其它实施例中，可省略模具材料220。
图2C说明第二裸片130安置于第一裸片120及/或腔115的至少部分上方且在周边区域(P)处安装到衬底110后的方法的实施例。第二裸片130可经由衬底110的电路电耦合到第一裸片。如先前参考图1A所描述，在一些实施例中，方法可进一步包含在将第二裸片130安置于衬底110上前将电连接器(未展示)沉积于第一裸片120与第二裸片130之间。在此实施例中，电连接器将第一裸片120直接耦合到第二裸片130。如下文将参考图3及4进一步详细描述，方法可进一步包含将第三裸片安置于衬底110上，第三裸片堆叠于第二裸片130上或与第二裸片130间隔开。
图3是根据本发明的另一实施例所配置的半导体装置组合件(“组合件300”)的示意性俯视图。组合件300大致类似于先前所描述的组合件100。例如，组合件300包含衬底110，衬底110具有腔315及定位于腔315内的第一裸片120。组合件300包含腔区域(C)及仅部分围绕腔区域(C)的周边区域(P)。组合件300进一步包含各在周边区域(P)处附接到衬底110的第二裸片330及第三裸片335。第二裸片330包含顶面331a及与顶面331a相对的底面331b。底面331b经由电连接器132附接到衬底110。第三裸片335包含顶面336a及与顶面336a相对的底面336b。底面336b经由电连接器132附接到衬底110。第二裸片330及第三裸片335各横越第一裸片120的不同部分。
图4是根据本发明的另一实施例所配置的半导体装置组合件400(“组合件400”)的示意性横截面图。组合件400大致类似于先前所描述的组合件100。例如，组合件400包含具有腔115的衬底110、定位于腔115中的第一裸片120及位于第一裸片120上方且在周边区域(P)处附接到衬底110的第二裸片130。组合件400包含堆叠于第二裸片130上且附接到第二裸片130的第三裸片430。第三裸片430可经由多个电连接器(例如焊球、接线等)电耦合到第二裸片130。在其它实施例中，第三裸片430可经由包含互连件、裸片附接膜、TSV及/或本技术中已知的其它方法的其它方式附接且电耦合到第二裸片130。所属领域的技术人员将了解，额外裸片可堆叠于第三裸片430上方及/或衬底110上。
图5是根据本发明的另一实施例所配置的半导体装置组合件500(“组合件500”)的示意性横截面图。组合件500大致类似于先前所描述的组合件100。例如，组合件500包含具有腔115的衬底110、定位于腔115中的第一裸片120及位于第一裸片120上方且在周边区域(P)处附接到衬底110的第二裸片130。组合件500包含衬底110的第二侧111b处的第二腔515、定位于腔515中且附接到衬底110的第三裸片520及横越第三裸片520且在周边区域(P)处经由接合垫532附接到衬底110的第四裸片530。与裸片经由焊球或其类似者附接到衬底相比，接合垫532可进一步减小组合件500的厚度。第三裸片520及/或第四裸片530可经由衬底110的电路电耦合到第一裸片120及/或第二裸片130。第二侧111b处的第二腔515、第三裸片520及第四裸片530的布置可类似或相同于第一侧111a处的第一腔115、第一裸片120及第二裸片130的布置。因而，先前参考组合件100及图1A到1B所描述的特征及优势也适用于组合件500。在一些实施例中，可从组合件500省略第四裸片530。在此实施例中，组合件500可包含衬底110的第二侧111b处的周边区域(P)上方的电连接器(例如来自图1A的电连接器116)。组合件500也可包含电连接，例如边缘指状物、互连插座及常见于PCB上的其它类似结构。
图6是根据本发明的另一实施例所配置的半导体装置组合件600(“组合件600”)的示意性横截面图。组合件600包含大致类似于先前所描述的组合件100的特征。例如，组合件600包含具有腔115的衬底110及在周边区域(P)处附接到衬底110的第二裸片130。组合件600包含第一裸片620，其包含面向第二裸片130的第一表面627a及与第一表面627a相对且面向衬底110的第二表面627b。第一裸片620可经由胶带、裸片附接膜、接合垫或本技术中已知的其它方法附接到第二裸片130。第一裸片620至少部分位于腔115内，使得第一裸片620的部分位于侧壁128之间及/或上表面112a下方。在所说明的实施例中，例如，第二表面627b低于上表面112a。第一裸片620可经电耦合到第二裸片130且经由第二裸片130及电连接器132电耦合到衬底110。第一裸片620可包含类似或相同于先前所描述的第一裸片120的特征。组合件600可视情况包含在顶侧137a处附接到第二裸片130的第三裸片650。第三裸片650可包含类似或相同于先前所描述的第一裸片120或第二裸片130的特征。除在将第二裸片附接到衬底110前将第一裸片620附接到第二裸片130之外，可经由类似于参考图2A及2C所描述的方法的方法形成组合件600。可在将第一裸片620附接到第二裸片130前或后将第三裸片650附接到第二裸片130。
图7是根据本发明的另一实施例所配置的半导体装置组合件700(“组合件700”)的示意性横截面图。组合件700包含第一裸片720a及第二裸片720b，其等位于侧壁128之间且在腔115处经由电连接器122而附接到衬底110。第一裸片720a及第二裸片720b可各包含大致类似于先前所描述的第一裸片120的特征的特征。组合件700进一步包含第一裸片720a及/或第二裸片720b的至少部分上方的第三裸片730a、第四裸片730b及第五裸片730c。第三裸片730a、第四裸片730b及第五裸片730c可各包含大致类似于先前所描述的第二裸片130的特征的特征。第三裸片730a及第五裸片730c各经由电连接器132附接到基底衬底，其中电连接器132的第一部分经直接附接到衬底110的上表面112a处的周边区域(P)，且电连接器132的第二部分经直接附接到第一裸片720a的顶面721a。因而，第三裸片730a及第五裸片730c分别仅延伸于(a)腔115及(b)第一裸片720a或第二裸片720b的部分上方。第四裸片730b经由电连接器132直接附接到第一裸片720a及第二裸片720b，其中电连接器132的第一部分附接到第一裸片720a的顶面721a且电连接器132的第二部分附接到第二裸片720b的顶面721b。因而，第四裸片730b定位于腔115上方及侧壁128之间。在一些实施例中，可省略第三裸片730a、第四裸片730b及/或第五裸片730c。例如，组合件700可包含仅第四裸片730b或仅第三裸片730a及第五裸片730c。
上文参考图1A至7所描述的半导体装置及/或组合件的任一者可经并入到各种更大及/或更复杂系统的任一者中，所述系统的代表实例是图8中所示意性展示的系统890。系统890可包含半导体装置组合件800(“组合件800”)、电源892、驱动器897、处理器896及/或其它子系统或组件898。组合件800可包含大致类似于上文所描述的组合件的特征。所得系统890可执行各种功能的任一者，例如存储器存储、数据处理及/或其它适合功能。因此，代表性系统890可包含(但不限于)手持式装置(例如移动电话、平板电脑、数字阅读器及数字音频播放器)、计算机及电器。系统890的组件可容置于单个单元中或分布于多个互连单元中(例如通过通信网络)。系统890的组件也可包含远程装置及各种计算机可读媒体的任一者。
本发明不希望是详尽的或将本发明限制于本文中所揭示的精确形式。尽管本文为了说明而揭示特定实施例，但是所属领域的技术人员将认知，可在不背离本发明的情况下作出各种等效修改。例如，图4(其包含堆叠装置)及图5(其包含多个腔及定位于腔内的裸片)所说明的实施例可经组合或并入到其它实施例(例如图6所说明的实施例)中。在一些情况中，未展示或详细描述熟知结构及功能以免不必要模糊本发明的实施例的描述。例如，所属领域的技术人员将了解，先前所描述的裸片可包含多个被动组件，例如电阻器、电容器及/或并入于其内的其它类型的电子装置。尽管本文中可依特定顺序呈现方法的步骤，但是替代实施例可依不同顺序执行步骤。类似地，在其它实施例中，可组合或消除特定实施例的背景下所揭示的本发明的某些方面。此外，尽管可能已在所述实施例的背景下揭示与本发明的某些实施例相关联的优点，但是其它实施例也可展现此类优点，且并非落在本发明的范围内的所有实施例必需展现此类优点或本文中所揭示的其它优点。因此，本发明及相关联技术可涵盖本文中未明确展示或描述的其它实施例，且本发明仅受限于随附权利要求书。
在本发明中，除非内文另有清楚指示，否则单数术语“一”及“所述”包含多个指涉物。类似地，除非用语“或”明确限于意谓排除关于两个或两个以上项的列表中的其它项的仅单个项，否则此列表中所使用的“或”应被解译为包含(a)列表中的任何单个项、(b)列表中的所有项或(c)列表中的项的任何组合。此外，全文中的术语“包括”、“包含”及“具有”用以意谓至少包含(若干)所叙述特征，使得不排除任何更多相同特征及/或额外类型的其它特征。本文中参考“一个实施例”、“实施例”或类似陈述意谓结合实施例所描述的特定特征、结构、操作或特性可包含于本发明的至少一个实施例中。因此，本文中所出现的此类短语或陈述未必全部指代相同实施例。此外，各种特定特征、结构、操作或特性可依任何适合方式组合于一或多个实施例中。

Claims (21)

1.一种半导体装置组合件，其包括：
基底衬底，其具有腔及至少部分围绕所述腔的周边区域，其中所述腔至少部分延伸穿过所述基底衬底且具有跨越所述周边区域的相对边缘测量的开口宽度；
第一裸片，其位于所述腔中且在所述腔处附接到所述基底衬底，其中所述第一裸片具有沿着与所述开口宽度正交的第一横向方向测量的第一长度；及
第二裸片，其位于所述第一裸片的至少部分上方、跨越所述周边区域的所述相对边缘延伸且在所述周边区域处附接到所述基底衬底，其中所述第二裸片具有(1)大于所述腔的所述开口宽度的裸片宽度以及(2)沿着平行于所述第一横向方向的第二横向方向测量且小于所述第一长度的第二裸片长度；
其中所述第一裸片的顶面和所述第二裸片的底面被对应于用于经由对流来冷却所述第一裸片和所述第二裸片的空气通道的距离分隔开；且
所述第一裸片的所述顶面暴露在环境中；
其中所述第一裸片包含存储器芯片且所述第二裸片包含处理器芯片；
其中所述基底衬底包含第一侧以及与所述第一侧相对的第二侧，其中所述周边区域为第一周边区域，且所述腔为第一腔，且其中所述第一腔和所述第一周边区域位于所述基底衬底的所述第一侧，所述组合件进一步包括：
第二腔，其位于所述基底衬底的所述第二侧并朝向所述基底衬底的所述第一侧至少部分延伸穿过所述基底衬底；
第二周边区域，其至少部分环绕所述第二腔；
第三裸片，其位于所述第二腔内并在所述第二腔处附接到所述基底衬底；以及
第四裸片，其在所述第三裸片上并在所述第二周边区域处附接到所述基底衬底。
2.根据权利要求1所述的组合件，其中所述基底衬底包含沿着所述腔的下表面及所述周边区域的上表面跨越的连续最外表面。
3.根据权利要求1所述的组合件，其中所述周边区域包含上表面且所述腔包含与所述上表面分离第一距离的下表面，且其中所述第一裸片包含与所述腔的所述下表面分离小于所述第一距离的第二距离的所述顶面。
4.根据权利要求1所述的组合件，其中所述第一裸片及所述第二裸片经由多个焊球附接到所述基底衬底。
5.根据权利要求1所述的组合件，其中所述第一裸片及所述第二裸片经由多个接合垫附接到所述基底衬底。
6.根据权利要求1所述的组合件，其进一步包括介于所述第一裸片与所述第二裸片之间且附接到所述第一裸片及所述第二裸片的多个焊球。
7.根据权利要求6所述的组合件，其中所述多个焊球接触所述第一裸片的所述顶面及所述第二裸片的所述底面。
8.根据权利要求1所述的组合件，其中所述周边区域完全围绕所述腔。
9.根据权利要求1所述的组合件，其进一步包括至少部分囊封所述第一裸片的囊封剂，其中所述囊封剂的顶面在所述第二裸片的所述底面的下方。
10.根据权利要求1所述的组合件，其进一步包括附接到所述第二裸片的第五裸片，其中所述第五裸片位于所述第一裸片及所述第二裸片上方。
11.根据权利要求1所述的组合件，其中所述第一裸片的所述部分是第一部分，所述组合件进一步包括在所述周边区域处附接到所述基底衬底且与所述第二裸片间隔开的第五裸片，其中所述第五裸片位于所述第一裸片的至少第二部分上方。
12.根据权利要求1所述的组合件，其中所述存储器芯片的所述顶面的一或多个外围部分横向地延伸通过所述处理器芯片的相应外围边缘。
13.根据权利要求12所述的组合件，其中：
所述处理器芯片和所述存储器芯片包括裸片堆叠；
所述处理器芯片位于所述裸片堆叠的顶部，以将由所述处理器芯片产生的热量向上释放；且
所述存储器芯片的所述顶面的所述一或多个外围部分被所述处理器芯片揭开，以减少所述处理器芯片和所述存储器芯片之间的热效应。
14.一种堆叠封装系统，其包括：
基底衬底，其具有腔区域及至少部分位于所述腔区域周围的周边区域，其中所述腔区域由至少部分延伸穿过所述基底衬底的侧壁界定，且所述侧壁由跨越所述侧壁的相对部分测量的开口宽度分隔开；
第一裸片，其附接到所述基底衬底且定位于所述腔区域的所述侧壁之间，其中所述第一裸片具有沿着与所述开口宽度正交的第一横向方向测量的第一长度；及
第二裸片，其位于所述第一裸片上方、跨越所述开口宽度延伸且在所述周边区域的所述相对部分上方且在所述周边区域处附接到所述基底衬底，其中所述第二裸片具有(1)大于所述腔的所述开口宽度的裸片宽度以及(2)沿着平行于所述第一横向方向的第二横向方向测量且小于所述第一长度的第二裸片长度；
其中所述第一裸片的顶面和所述第二裸片的底面被对应于用于经由对流来冷却所述第一裸片和所述第二裸片的空气通道的距离分隔开；且
所述第一裸片的所述顶面暴露在环境中；
其中所述第一裸片包含存储器芯片且所述第二裸片包含处理器芯片；且
其中所述基底衬底包含第一侧以及与所述第一侧相对的第二侧，其中所述周边区域为第一周边区域，且所述腔为第一腔，且其中所述第一腔和所述第一周边区域位于所述基底衬底的所述第一侧，所述堆叠封装系统进一步包括：
第二腔，其位于所述基底衬底的所述第二侧并朝向所述基底衬底的所述第一侧至少部分延伸穿过所述基底衬底；
第二周边区域，其至少部分环绕所述第二腔；
第三裸片，其位于所述第二腔内并在所述第二腔处附接到所述基底衬底；以及
第四裸片，其在所述第三裸片上并在所述第二周边区域处附接到所述基底衬底。
15.根据权利要求14所述的系统，其中所述腔区域包含所述侧壁之间的下表面，且其中所述第一裸片经由多个连接器附接到所述下表面。
16.根据权利要求15所述的系统，其中所述多个连接器包含接合垫。
17.根据权利要求14所述的系统，其中所述第二裸片包含至少部分面向所述基底衬底的底侧及与所述底侧相对的顶侧，且其中所述第一裸片在所述底侧处附接到所述第二裸片。
18.根据权利要求17所述的系统，其进一步包括附接到所述基底衬底的第五裸片，其中所述第五裸片堆叠于所述第二裸片的所述顶侧上。
19.根据权利要求14所述的系统，其中所述第一裸片的至少部分延伸到所述基底衬底的所述腔区域中。
20.根据权利要求14所述的系统，其进一步包括与所述第一裸片间隔开且在所述腔区域处附接到所述基底衬底的第五裸片。
21.根据权利要求14所述的系统，其中在所述周边区域处附接到所述基底衬底的所述第二裸片是第一部分，且其中所述第二裸片包含附接到所述腔区域的所述侧壁之间的所述第一裸片的第二部分。
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