CN110911362A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
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- CN110911362A CN110911362A CN201910147220.XA CN201910147220A CN110911362A CN 110911362 A CN110911362 A CN 110911362A CN 201910147220 A CN201910147220 A CN 201910147220A CN 110911362 A CN110911362 A CN 110911362A
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Abstract
实施方式提供一种电子零件能够散热的半导体装置。一实施方式的半导体装置具备衬底、半导体零件、及导热体。所述半导体零件包含内插式衬底、搭载在所述内插式衬底的第1面的电子零件、与所述第1面及所述电子零件接触并覆盖该第1面及该电子零件的被覆树脂、以及与所述被覆树脂接触并覆盖该被覆树脂的金属膜,且搭载在所述衬底。所述导热体附着在所述金属膜,将所述衬底与所述金属膜连接,且导热率高于所述被覆树脂。
Description
[相关申请]
本申请享有以日本专利申请2018-173003号(申请日:2018年9月14日)为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及一种半导体装置。
背景技术
已知利用密封树脂密封搭载在内插式衬底的电子零件的半导体零件。该半导体零件通过端子搭载在衬底。半导体零件经由端子导热到衬底,由此散热。然而,半导体零件存在无法由端子充分地散热的情况。
发明内容
实施方式提供一种电子零件能够散热的半导体装置。
一实施方式的半导体装置具备衬底、半导体零件、及导热体。所述半导体零件包含内插式衬底、搭载在所述内插式衬底的第1面的电子零件、与所述第1面及所述电子零件接触并覆盖该第1面及该电子零件的被覆树脂、以及与所述被覆树脂接触并覆盖该被覆树脂的金属膜,且搭载在所述衬底。所述导热体附着在所述金属膜,将所述衬底与所述金属膜连接,且导热率高于所述被覆树脂。
附图说明
图1是概略性地表示第1实施方式的半导体装置的一部分的剖视图。
图2是将第1实施方式的半导体装置分解而概略性地表示的例示性立体图。
图3是概略性地表示第1实施方式的半导体装置的一部分的例示性俯视图。
图4是概略性地表示第2实施方式的半导体装置的一部分的剖视图。
图5是概略性地表示第3实施方式的半导体装置的一部分的剖视图。
图6是概略性地表示第3实施方式的半导体装置的一部分的例示性俯视图。
图7是概略性地表示第3实施方式的变化例的半导体装置的一部分的例示性俯视图。
图8是概略性地表示第4实施方式的半导体装置的一部分的剖视图。
具体实施方式
(第1实施方式)
以下,参照图1至图3,对第1实施方式进行说明。此外,在本说明书中,实施方式的构成要素及该要素的说明存在以多种表达进行记载的情况。构成要素及其说明并不由本说明书的表达限定。构成要素可以通过与本说明书中的名称不同的名称进行指定。另外,构成要素可以通过与本说明书的表达不同的表达进行说明。
图1是概略性地表示第1实施方式的半导体装置1的一部分的剖视图。半导体装置1也可以称为电子设备或半导体存储装置。作为本实施方式中的一例的半导体装置1是智能手机。半导体装置1例如也可以是个人计算机、便携式计算机、平板、移动电话、电视接收机、硬盘驱动器(Hard Disk Drive:HDD)、固态驱动器(Solid State Drive:SSD)、USB(Universal Serial Bus,通用串行总线)闪速驱动器、SD(Secure Digital,安全数字)卡、eMMC(注册商标)、通用闪存存储(Universal Flash Storage:UFS)、存储卡、其他存储装置、可穿戴设备、智能扬声器、家用电气设备、或包含半导体的其他装置。如图1所示,半导体装置1包含衬底5、半导体零件6、及导热体7。
衬底5例如是印刷电路板(PCB)。衬底5具有表面5a。表面5a是朝向Z轴的正方向(Z轴的箭头所表示的方向)的大致平坦的面。在衬底5的表面5a搭载半导体零件6。进而,在衬底5,也可以搭载如控制半导体装置1的中央处理装置(CPU)的其他装置。
衬底5还包含多个基材11、多个导体层12、多个通孔13、及两个阻焊剂14。也就是说,衬底5是包含多层的多层板,但也可以是单面板。
基材11是设置在衬底5的内部的绝缘层。导体层12设置在基材11的表面,例如形成衬底5中的配线、焊盘、焊垫、及实心图案(平面)。通孔13设置在基材11,连接多个导体层12。阻焊剂14覆盖基材11及导体层12。一阻焊剂14形成衬底5的表面5a的至少一部分,位于基材11与半导体零件6之间。
导体层12包含电源16、接地17、多个电极18、及多个接地焊垫19。接地焊垫19是导体的一例,也可以称为焊盘或图案。
电源16例如具有实心图案的电源层、及连接于该电源层的配线。接地17是接地电位的导体。接地17例如具有实心图案的接地层、及连接于该接地层的配线。
电极18设置在被形成表面5a的阻焊剂14覆盖的导体层12。电极18包含信号电极18A、电源电极18B、及接地电极18C。信号电极18A用于设置在衬底5的电路与半导体零件6之间的信号的收发。因此,电信号通过信号电极18A。电源电极18B连接于电源16。接地电极18C连接于接地17。
电极18例如配置为矩阵状(网格状)。接地电极18C配置在较信号电极18A及电源电极18B更靠外侧。此外,连接于接地17的电极也可以位于较信号电极18A及电源电极18B更靠内侧。
接地焊垫19设置在被形成表面5a的阻焊剂14覆盖的导体层12。接地焊垫19连接于接地17。
图2是将第1实施方式的半导体装置1分解而概略性地表示的例示性立体图。如图2所示,接地焊垫19沿着电极18延伸,包围电极18。多个接地焊垫19相互分离。因此,导体层12也可以具有通过两个接地焊垫19之间的配线。
如图1所示,在阻焊剂14设置多个孔14a。孔14a使电极18及接地焊垫19露出。由此,电极18及接地焊垫19设置在衬底5的表面5a。
作为本实施方式中的一例的半导体零件6是球栅阵列(Ball Grid Array:BGA)的半导体封装。此外,半导体零件6也可以具有其他构造,也可以是如焊盘网格阵列(LandGrid Array:LGA)的其他规格的半导体封装。
如附图所示,在本说明书中,定义了X轴、Y轴及Z轴。X轴、Y轴与Z轴相互正交。X轴沿着半导体零件6的宽度。Y轴沿着半导体零件6的长度(深度)。Z轴沿着半导体零件6的高度(厚度)。
半导体零件6包含内插式衬底21、控制器芯片22、多个存储器芯片23、多个接合线24、密封树脂25、及金属膜26。控制器芯片22及存储器芯片23分别为电子零件的一例。密封树脂25为被覆树脂的一例。
内插式衬底21例如是印刷配线板(PWB)。内插式衬底21具有第1面21a、第2面21b、及端面21c。第1面21a是朝向Z轴的正方向的大致平坦的面。第2面21b是位于第1面21a的相反侧且朝向Z轴的负方向(Z轴的箭头的相反方向)的大致平坦的面。第2面21b与衬底5的表面5a相互相对。端面21c设置在第1面21a的缘部与第2面21b的缘部之间,朝向与Z轴交叉的方向。
内插式衬底21还具有多个端子31。端子31分别包含焊垫35、及焊球36。焊球36也可以称为凸块。焊球36连接于对应的电极18。此外,端子31例如根据半导体零件6的规格,也可以与焊垫35及焊球36不同。例如,在半导体零件6为LGA的情况下,端子31包含焊垫35,不包含焊球36。
端子31设置在第2面21b。端子31包含信号端子31A、电源端子31B、及接地端子31C。信号端子31A连接于信号电极18A。电源端子31B连接于电源电极18B。接地端子31C连接于接地电极18C。
端子31例如排列为矩阵状(网格状)。接地端子31C配置在较信号端子31A及电源端子31B更靠外侧。此外,经由电极18连接于接地17的端子31也可以位于较信号端子31A及电源端子31B更靠内侧。
控制器芯片22例如是片上系统(System on a Chip:SoC)。此外,控制器芯片22也可以是其他集成电路(IC)或电路。
控制器芯片22搭载在内插式衬底21的第1面21a。例如,控制器芯片22通过粘接层22a粘接于第1面21a。进而,控制器芯片22的电极与设置在第1面21a的电极通过接合线24连接。由此,控制器芯片22经由设置在内插式衬底21的配线而电连接于端子31。此外,控制器芯片22也可以例如通过覆晶安装搭载在第1面21a。
存储器芯片23例如是NAND(Not AND,与非)型闪速存储器,存储信息。此外,存储器芯片23也可以是如NOR(Not Or,或非)型闪速存储器的其他存储器芯片。
存储器芯片23搭载并堆积在内插式衬底21的第1面21a。例如,存储器芯片23通过粘接层23a粘接于第1面21a。进而,存储器芯片23的电极与设置在第1面21a的电极通过接合线24连接。由此,存储器芯片23经由设置在内插式衬底21的配线而电连接于控制器芯片22。此外,存储器芯片23也可以例如通过覆晶安装搭载在第1面21a。
粘接层22a、23a是芯片粘结膜(Die Attach Film:DAF)。芯片粘结膜也可以称为芯片接合膜(Die Bonding Film)。粘接层22a、23a例如也可以是粘接剂。
控制器芯片22例如控制存储器芯片23的存储及读出。此外,控制器芯片22并不限于控制存储器芯片23,也可以控制半导体零件6所包含的其他电子零件。
在本实施方式中,控制器芯片22及存储器芯片23均搭载在第1面21a。然而,例如也可以将存储器芯片23堆积在控制器芯片22之上。
密封树脂25例如由包含混合着如二氧化硅的无机物的环氧树脂的合成树脂制作。此外,密封树脂25也可以由包含其他合成树脂的材料制作。
密封树脂25将内插式衬底21的第1面21a、控制器芯片22、存储器芯片23、及接合线24密封。因此,密封树脂25与第1面21a、控制器芯片22、存储器芯片23、及接合线24接触,且覆盖第1面21a、控制器芯片22、存储器芯片23、及接合线24。
控制器芯片22、存储器芯片23、及接合线24埋入密封树脂25。根据另一表达,控制器芯片22、存储器芯片23、及接合线24被密封树脂25收容,并位于密封树脂25之中。
密封树脂25具有上表面25a、及侧面25b。上表面25a是朝向Z轴的正方向的大致平坦的密封树脂25的外表面。侧面25b是从上表面25a的缘部向Z轴的负方向延伸的密封树脂25的外表面,朝向与Z轴交叉的方向。侧面25b实质上与内插式衬底21的端面21c相连。
金属膜26与密封树脂25的上表面25a及侧面25b接触且覆盖密封树脂25。在本实施方式中,金属膜26也覆盖内插式衬底21的端面21c。金属膜26例如通过溅镀而附着在密封树脂25。金属膜26也可以通过如膏的涂布的其他方法制作。
金属膜26具有上表面26a、及侧面26b。上表面26a是朝向Z轴的正方向的大致平坦的金属膜26的外表面。侧面26b是从上表面26a的缘部向Z轴的负方向延伸的金属膜26的外表面,朝向大致与Z轴交叉的方向。
金属膜26隔着密封树脂25覆盖控制器芯片22及存储器芯片23。金属膜26是遮蔽控制器芯片22及存储器芯片23释放的电磁波、或外部的电磁波的电磁屏蔽件。
导热体7将衬底5与半导体零件6的金属膜26连接。导热体7整体具有导电性并且导热率高于密封树脂25。此外,导热体7只要在衬底5与金属膜26之间的热路径中,导热率高于密封树脂25即可。因此,导热体7也可以包含导热率低于密封树脂25的部分。另外,导热体7也可以包含绝缘性的部分。导热体7包含金属部件41、第1膏42、及第2膏43。
如图2所示,金属部件41形成为对应于衬底5的接地焊垫19的大致四边形的环状。此外,金属部件41的形状并不限于该例,例如也可以是棒状。金属部件41的导热率高于密封树脂25。
图3是概略性地表示第1实施方式的半导体装置1的一部分的例示性俯视图。在图3中,出于方便,省略第1膏42及第2膏43。如图3所示,在朝向衬底5的表面5a的俯视下,金属部件41包围半导体零件6并与其隔开间隔。换句话说,金属部件41在与Z轴交叉的方向上,与半导体零件6分离。此外,半导体零件6也可以在与Z轴交叉的方向上,与金属部件41部分地重叠。
如图1所示,金属部件41覆盖接地焊垫19。金属部件41通过第2膏43粘接于设置在表面5a的接地焊垫19。此外,金属部件41也可以进一步粘接于由阻焊剂14形成的表面5a的其他部分。另外,金属部件41也可以通过如焊料的其他方法连接于接地焊垫19。
第2膏43是所谓导热膏。第2膏43例如包含热硬化性的合成树脂及银填料。因此,第2膏43具有导电性,并且具有高于密封树脂25的导热率。例如,第2膏43的导热率是50W/mK以上,但并不限于该值。此外,第2膏43也可以包含硅来代替银填料,从而具有绝缘性。以上的第2膏43的材料是一例,并不限于这些示例。
第2膏43在附着在金属部件41及接地焊垫19的状态下硬化。因此,第2膏43将金属部件41固定于接地焊垫19。此外,第2膏43也可以不硬化而具有流动性。金属部件41通过第2膏43而热连接及电连接于接地焊垫19。
第1膏42与第2膏43同样为所谓导热膏。第1膏42例如包含热硬化性的合成树脂及银填料。因此,第1膏42具有导电性,并且具有高于密封树脂25的导热率。例如,第1膏42的导热率为50W/mK以上,但不限于该值。此外,第1膏42也可以包含硅代替银填料,而具有绝缘性。以上的第1膏42的材料为一例,并不限于这些示例。
第1膏42在附着在金属膜26的侧面26b及金属部件41的状态下硬化。因此,第1膏42将金属膜26热连接及电连接于金属部件41。此外,第1膏42也可以不硬化而具有流动性。
第1膏42经由金属部件41及第2膏43,将金属膜26与衬底5的接地焊垫19热连接及电连接。因此,从控制器芯片22及存储器芯片23产生的热经由密封树脂25、金属膜26、第1膏42、金属部件41、及第2膏43,传导到接地焊垫19。传导到接地焊垫19的热例如释放到如搭载半导体装置1的服务器或个人计算机的装置。
如图3所示,第1膏42具有距控制器芯片22较距存储器芯片23更近的部分P。控制器芯片22较存储器芯片23更容易变成高温。从控制器芯片22产生的热能够通过附近的第1膏42释放。
如图1所示,金属膜26经由第1膏42、金属部件41、第2膏43、及接地焊垫19电连接于接地17。金属膜26能够将所吸收的电磁噪声释放到接地17。
以下,对半导体零件6及导热体7的搭载方法的一部分进行例示。此外,半导体零件6及导热体7的搭载方法并不限于以下方法,也可以使用其他方法。首先,将半导体零件6的端子31连接于衬底5的电极18。例如通过回流焊,将端子31的焊球36连接于电极18。
接着,利用分配器,将第2膏43涂布在接地焊垫19。进而,将金属部件41载置在第2膏43之上,并通过第2膏43粘接于接地焊垫19。
接着,利用分配器,将第1膏42供给到金属部件41与金属膜26之间。第1膏42附着在金属部件41及金属膜26。接着,通过将第2膏43及第1膏42热硬化,完成半导体零件6及导热体7的搭载。
通过调整第1膏42的粘度,抑制第1膏42进入到衬底5与内插式衬底21之间的间隙。然而,第1膏42存在进入到衬底5与内插式衬底21之间的间隙的可能性。
如上所述,接地端子31C配置在较信号端子31A及电源端子31B更靠外侧。因此,接地端子31C较信号端子31A及电源端子31B更靠近导热体7。
进入到衬底5与内插式衬底21之间的间隙的第1膏42相较于附着在信号端子31A及电源端子31B,更容易附着在接地端子31C。在此情况下,金属膜26及金属部件41经由第1膏42电连接于接地端子31C及接地17。然而,金属膜26及金属部件41通常经由接地焊垫19电连接于接地17。因此,抑制接地端子31C产生短路。
多个接地端子31C沿着内插式衬底21的端面21c排列。因此,接地端子31C阻挡第1膏42,抑制第1膏42附着在信号端子31A及电源端子31B。以上,对第1膏42代表性地进行了说明,对于第2膏43也一样。
在以上所说明的第1实施方式的半导体装置1中,导热体7附着在半导体零件6的金属膜26,将衬底5与金属膜26连接,且导热率高于密封树脂25。由此,控制器芯片22及存储器芯片23发出的热能够经由密封树脂25、金属膜26、及导热体7传导到衬底5。因此,控制器芯片22及存储器芯片23能够进一步散热。
衬底5具有设置在表面5a的接地焊垫19。导热体7将金属膜26与接地焊垫19连接。由此,相较于导热体7将如阻焊剂14的衬底5的其他部分与金属膜26连接的情况,能够将控制器芯片22及存储器芯片23发出的热经由导热体7高效率地传导到衬底5。因此,控制器芯片22及存储器芯片23能够高效率地散热。
导热体7为导电性,接地焊垫19连接于接地17。由此,半导体零件6的金属膜26经由导热体7电连接于接地17。因此,能够使金属膜26作为电磁屏蔽件的性能提高。
接地端子31C经由接地电极18C连接于接地17,并且较信号端子31A及电源端子31B更靠近导热体7。因此,导热体7的第1膏42即便进入到内插式衬底21的第2面21b与衬底5的表面5a之间,也相较于附着在信号端子31A或电源端子31B更容易附着在接地端子31C。因此,抑制因第1膏42附着在信号端子31A或电源端子31B引起的短路。
导热体7包含附着在金属膜26的第1膏42。由此,导热体7例如能够由如分配器的装置容易地设置。
导热体7包含热连接及电连接于接地焊垫19的金属部件41。第1膏42附着在该金属部件41。也就是说,半导体零件6的金属膜26经由第1膏42及金属部件41,连接于衬底5的接地焊垫19。一般来说,金属部件41相较于合成树脂,热阻小且表面积大,因此能够将控制器芯片22及存储器芯片23发出的热高效率地传导到衬底5。因此,控制器芯片22及存储器芯片23能够高效率地散热。
在朝向表面5a的俯视下,金属部件41包围半导体零件6。由此,金属部件41的表面积较大,而能够将控制器芯片22及存储器芯片23发出的热高效率地传导到衬底5。因此,控制器芯片22及存储器芯片23能够高效率地散热。
第1膏42包含热硬化性树脂。由此,通过将第1膏42硬化,防止该第1膏42从金属膜26剥离。进而,可以与涂布在其他电子零件的底部填充胶的硬化同时地进行第1膏42的硬化。因此,抑制作业步骤的增加,从而抑制半导体装置1的成本的增加。
导热体7包含第2膏43,该第2膏43包含热硬化性树脂,附着在金属部件41及接地焊垫19,导热率高于密封树脂25,且具有导电性。第1膏42及第2膏43硬化。由此,金属部件41与接地焊垫19通过第2膏43电连接。进而,可以同时进行第1膏42及第2膏43的硬化,抑制作业步骤的增加,从而抑制半导体装置1的成本的增加。另外,第1膏42及第2膏43如底部填充胶那样,将半导体零件6牢固地固定在衬底5。由此,抑制端子31与电极18之间的连接部分损伤。
导热体7具有距控制器芯片22较距存储器芯片23更近的部分P。一般来说,控制器芯片22较存储器芯片23更容易变成高温。因此,能够将控制器芯片22的热经由密封树脂25、金属膜26、及导热体7传导到衬底5。因此,控制器芯片22及存储器芯片23能够高效率地散热。
在以上的第1实施方式中,第1膏42及第2膏43经由金属部件41,将金属膜26与接地焊垫19连接。然而,第1膏42或第2膏43也可以将金属膜26与接地焊垫19直接连接。由此,抑制作业步骤的增加,从而抑制半导体装置1的成本的增加。
另外,在以上的第1实施方式中,连接着导热体7的接地焊垫19连接于接地17。然而,连接导热体7的导体(接地焊垫19)也可以是与在衬底5形成电路的导体层12电切断的非连接焊垫。另外,如果导热体7是绝缘性,那么所述导体例如也可以电连接于信号电极18A或电源电极18B。
(第2实施方式)
以下,参照图4,对第2实施方式进行说明。此外,在以下多个实施方式的说明中,具有与已说明的构成要素相同的功能的构成要素存在被标注与该已叙述的构成要素相同的符号进而省略说明的情况。另外,标注着相同符号的多个构成要素并不限于功能及性质全部共通,也可以具有与各实施方式相对应的不同的功能及性质。
图4是概略性地表示第2实施方式的半导体装置1的一部分的剖视图。如图4所示,第2实施方式的半导体装置1具有绝缘性的底部填充胶51。底部填充胶51介置在衬底5的表面5a与内插式衬底21的第2面21b之间。
底部填充胶51将衬底5的表面5a与内插式衬底21的第2面21b之间的间隙堵塞。因此,底部填充胶51位于端子31与导热体7之间。在本实施方式中,底部填充胶51与端子31接触,且覆盖端子31。此外,底部填充胶51也可以与端子31分离。
底部填充胶51例如在将端子31连接于电极18之后,由分配器供给到衬底5与内插式衬底21之间。底部填充胶51例如也可以与第1膏42及第2膏43一起热硬化。
在以上所说明的第2实施方式的半导体装置1中,绝缘性的底部填充胶51介置在衬底5的表面5a与内插式衬底21的第2面21b之间,且位于端子31与导热体7之间。由此,抑制因导电性的第1膏42附着在端子31引起的短路。进而,由于通过底部填充胶51将半导体零件6牢固地固定在衬底5,因此抑制端子31与电极18之间的连接部分损伤。
(第3实施方式)
以下,参照图5至图7,对第3实施方式进行说明。图5是概略性地表示第3实施方式的半导体装置1的一部分的剖视图。如图5所示,第3实施方式的半导体装置1与第2实施方式的不同点在于:包含搭载在衬底5的表面5a的多个半导体零件6。半导体零件6可以是彼此相同的零件,也可以是互不相同的零件。另外,第3实施方式的半导体装置1也可以如第1实施方式那样,不包含底部填充胶51。
图6是概略性地表示第3实施方式的半导体装置1的一部分的例示性俯视图。如图6所示,金属部件41包含框部61、及中间部62。框部61形成为大致四边形的环状,在朝向衬底5的表面5a的俯视下,包围多个半导体零件6。中间部62位于相邻的两个半导体零件6之间,且连接于框部61。
第1膏42附着在金属膜26、框部61、及中间部62。因此,第1膏42将一个半导体零件6的金属膜26、另一个半导体零件6的金属膜26及接地焊垫19热连接及电连接。
在以上所说明的第3实施方式的半导体装置1中,在朝向表面5a的俯视下,金属部件41包围多个半导体零件6。由此,金属部件41的表面积较大,而能够将控制器芯片22及存储器芯片23发出的热高效率地传导到衬底5。因此,控制器芯片22及存储器芯片23能够高效率地散热。
图7是概略性地表示第3实施方式的变化例的半导体装置1的一部分的例示性俯视图。如图7所示,金属部件41具有框部61。然而,省略中间部62。相邻的两个半导体零件6介隔间隙而相互分离。
在图7的变化例中,例如,在衬底5的表面5a中,能够搭载半导体零件6的区域较图6的示例窄。因此,省略中间部62,相邻的两个半导体零件6之间的距离较图6的示例短。
在以上所说明的第3实施方式的变化例中,在朝向表面5a的俯视下,框部61也包围多个半导体零件6。因此,即便多个半导体零件6之间的间隙较小,也能够沿着多个半导体零件6配置金属部件41。因此,即便对衬底5中的半导体零件6的配置有制约,第1膏42也能够附着在金属膜26及金属部件41。
(第4实施方式)
以下,参照图8,对第4实施方式进行说明。图8是概略性地表示第4实施方式的半导体装置1的一部分的剖视图。如图8所示,第4实施方式的半导体装置1与第3实施方式的不同点在于:不包含金属部件41、第2膏43、及接地焊垫19。此外,第4实施方式的半导体装置1也可以如第1实施方式那样不包含底部填充胶51,还可以具有单个的半导体零件6。
在第4实施方式中,基材11具有露出部11a。露出部11a是由阻焊剂14的孔14a而在衬底5的表面5a露出的基材11的一部分。基材11的露出部11a的表面粗糙度较阻焊剂14的表面粗糙度粗。
第1膏42附着在金属膜26的侧面26b、及通过孔14a露出的露出部11a。因此,第1膏42将金属膜26与衬底5的基材11连接。
在以上所说明的第4实施方式的半导体装置1中,在阻焊剂14设置使基材11的露出部11a露出的孔14a。第1膏42附着在露出部11a。一般来说,基材11的表面粗糙度较阻焊剂14的表面粗糙度粗。由此,抑制第1膏42从衬底5剥离。
在以上的多个实施方式中,接地端子31C较信号端子31A及电源端子31B更靠近导热体7。然而,作为变化例,也可以使其他端子31较信号端子31A及电源端子31B更靠近导热体7。连接该端子31的电极18是与在衬底5形成电路的导体层12电切断的非连接焊垫。由此,抑制因第1膏42附着在所述端子31引起的短路。所述端子31及电极18增强衬底5与半导体零件6的连接部分。
根据以上所说明的至少一个实施方式,导热体附着在半导体零件的金属膜,将衬底与金属膜连接,且导热率高于被覆树脂。由此,能够将电子零件发出的热经由被覆树脂、金属膜、及导热体传导到衬底。因此,电子零件能够进一步散热。
对本发明的若干实施方式进行了说明,但这些实施方式是作为示例而提出的,并非意图限定发明的范围。这些新颖的实施方式可以通过其他各种方式实施,可以在不脱离发明主旨的范围内,进行各种省略、置换、变更。这些实施方式或其变化包含在发明的范围或主旨中,并且包含在权利要求书所记载的发明及其等同的范围内。
[符号的说明]
1 半导体装置
5 衬底
5a 表面
6 半导体零件
7 导热体
11 基材
11a 露出部
14 阻焊剂
14a 孔
16 电源
17 接地
18 电极
18A 信号电极
18B 电源电极
18C 接地电极
19 接地焊垫
21 内插式衬底
21a 第1面
21b 第2面
22 控制器芯片
23 存储器芯片
25 密封树脂
26 金属膜
31 端子
31A 信号端子
31B 电源端子
31C 接地端子
41 金属部件
42 第1膏
43 第2膏
51 底部填充胶
Claims (16)
1.一种半导体装置,具备:
衬底;
半导体零件,包含内插式衬底、搭载在所述内插式衬底的第1面的电子零件、与所述第1面及所述电子零件接触并覆盖该第1面及该电子零件的被覆树脂、以及与所述被覆树脂接触并覆盖该被覆树脂的金属膜,且该半导体零件搭载在所述衬底;
及
导热体,与所述金属膜附着,将所述衬底与所述金属膜连接,且导热率高于所述被覆树脂。
2.根据权利要求1所述的半导体装置,其中所述内插式衬底具有位于所述第1面的相反侧的第2面、及设置在所述第2面的端子,
所述衬底具有朝向所述第2面的表面、设置在所述表面并连接于所述端子的电极、及设置在所述表面的导体,且
所述导热体将所述金属膜与所述导体连接。
3.根据权利要求2所述的半导体装置,其中所述导热体为导电性,
所述衬底具有接地,且
所述导体连接于所述接地。
4.根据权利要求3所述的半导体装置,其中所述电极具有使电信号通过的信号电极、连接于电源的电源电极、及连接于所述接地的接地电极,且
所述端子具有连接于所述信号电极的信号端子、连接于所述电源电极的电源端子、以及连接于所述接地电极并且较所述信号端子及所述电源端子更靠近所述导热体的接地端子。
5.根据权利要求3所述的半导体装置,其中所述导热体包含具有流动性或经硬化的第1膏,所述第1膏附着在所述金属膜,导热率高于所述被覆树脂,且具有导电性。
6.根据权利要求5所述的半导体装置,其中所述导热体具有热连接及电连接于所述导体的金属部件,且
所述第1膏附着在所述金属膜及所述金属部件。
7.根据权利要求6所述的半导体装置,其中在朝向所述表面的俯视下,所述金属部件包围所述半导体零件。
8.根据权利要求6所述的半导体装置,还具备多个所述半导体零件,且
在朝向所述表面的俯视下,所述金属部件包围所述多个半导体零件。
9.根据权利要求6所述的半导体装置,其中所述第1膏包含热硬化性树脂。
10.根据权利要求9所述的半导体装置,其中所述导热体包含经硬化的第2膏,该第2膏包含热硬化性树脂,附着在所述金属部件及所述导体,导热率高于所述被覆树脂,且具有导电性,且
所述第1膏硬化。
11.根据权利要求2所述的半导体装置,还具备介置在所述衬底的所述表面与所述内插式衬底的所述第2面之间且位于所述端子与所述导热体之间的绝缘性的底部填充胶。
12.根据权利要求1所述的半导体装置,其中所述衬底包含基材、及覆盖所述基材并且位于所述基材与所述半导体零件之间的阻焊剂,
在所述阻焊剂,设置使所述基材的一部分露出的孔,且
所述导热体附着在通过所述孔而露出的所述基材的一部分。
13.根据权利要求1至4、及12中任一项所述的半导体装置,其中所述导热体包含具有流动性或经硬化的膏,所述膏附着在所述金属膜,且导热率高于所述被覆树脂。
14.根据权利要求1所述的半导体装置,其中所述电子零件具有存储器芯片。
15.根据权利要求14所述的半导体装置,其中所述电子零件具有控制所述存储器芯片的控制器芯片。
16.根据权利要求15所述的半导体装置,其中所述导热体具有距所述控制器芯片较距所述存储器芯片更近的部分。
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US20200091129A1 (en) | 2020-03-19 |
TWI778236B (zh) | 2022-09-21 |
CN110911362B (zh) | 2023-12-08 |
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US11004837B2 (en) | 2021-05-11 |
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