CN1106018C - 维度可编程熔丝排及制造方法 - Google Patents
维度可编程熔丝排及制造方法 Download PDFInfo
- Publication number
- CN1106018C CN1106018C CN98118556A CN98118556A CN1106018C CN 1106018 C CN1106018 C CN 1106018C CN 98118556 A CN98118556 A CN 98118556A CN 98118556 A CN98118556 A CN 98118556A CN 1106018 C CN1106018 C CN 1106018C
- Authority
- CN
- China
- Prior art keywords
- memory array
- row
- group
- fusebank
- redundant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 24
- 239000004065 semiconductor Substances 0.000 claims abstract description 40
- 238000003491 array Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 description 9
- 230000008439 repair process Effects 0.000 description 9
- 230000002950 deficient Effects 0.000 description 8
- 230000008569 process Effects 0.000 description 7
- 238000013461 design Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000007596 consolidation process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (24)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/923,459 US5835425A (en) | 1997-09-04 | 1997-09-04 | Dimension programmable fusebanks and methods for making the same |
US923,459 | 1997-09-04 | ||
US923459 | 1997-09-04 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1212432A CN1212432A (zh) | 1999-03-31 |
CN1106018C true CN1106018C (zh) | 2003-04-16 |
Family
ID=25448710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN98118556A Expired - Fee Related CN1106018C (zh) | 1997-09-04 | 1998-09-03 | 维度可编程熔丝排及制造方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US5835425A (zh) |
EP (1) | EP0901076B1 (zh) |
JP (1) | JP3180905B2 (zh) |
KR (1) | KR100630519B1 (zh) |
CN (1) | CN1106018C (zh) |
DE (1) | DE69825378T2 (zh) |
TW (1) | TW409252B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11862272B2 (en) | 2020-09-01 | 2024-01-02 | Changxin Memory Technologies, Inc. | Method and device for determining fail bit repair solution, and chip |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6199177B1 (en) * | 1998-08-28 | 2001-03-06 | Micron Technology, Inc. | Device and method for repairing a semiconductor memory |
US6910152B2 (en) * | 1998-08-28 | 2005-06-21 | Micron Technology, Inc. | Device and method for repairing a semiconductor memory |
KR100548540B1 (ko) * | 1999-06-29 | 2006-02-02 | 주식회사 하이닉스반도체 | 리던던시 회로 |
KR100363089B1 (ko) * | 1999-09-07 | 2002-11-30 | 삼성전자 주식회사 | 리던던시 효율을 향상시키는 리던던시 회로를 포함하는반도체 메모리 장치 |
KR100376265B1 (ko) * | 1999-12-29 | 2003-03-17 | 주식회사 하이닉스반도체 | 모스 구조의 안티퓨즈를 이용한 메모리 리페어 회로 |
DE10006243A1 (de) * | 2000-02-11 | 2001-08-23 | Infineon Technologies Ag | Schmelzbrückenanordnung in integrierten Schaltungen |
JP3457611B2 (ja) * | 2000-02-16 | 2003-10-20 | 日本電気株式会社 | 半導体記憶装置 |
US6433405B1 (en) * | 2000-03-02 | 2002-08-13 | Hewlett-Packard Company | Integrated circuit having provisions for remote storage of chip specific operating parameters |
KR100685610B1 (ko) * | 2000-06-26 | 2007-02-22 | 주식회사 하이닉스반도체 | 반도체 소자의 테스트 장치 |
KR100358060B1 (ko) * | 2000-12-29 | 2002-10-25 | 주식회사 하이닉스반도체 | 리페어를 위한 반도체 메모리 장치 |
JP5119563B2 (ja) * | 2001-08-03 | 2013-01-16 | 日本電気株式会社 | 不良メモリセル救済回路を有する半導体記憶装置 |
US7111193B1 (en) * | 2002-07-30 | 2006-09-19 | Taiwan Semiconductor Manufacturing Co. Ltd. | Semiconductor memory having re-configurable fuse set for redundancy repair |
JP4128965B2 (ja) * | 2004-02-26 | 2008-07-30 | 株式会社東芝 | 半導体装置 |
KR100618830B1 (ko) * | 2004-06-07 | 2006-08-31 | 삼성전자주식회사 | 디코더를 이용한 리던던시 리페어 회로 및 리던던시리페어 방법 |
KR100547597B1 (ko) * | 2004-08-09 | 2006-01-31 | 삼성전자주식회사 | 리페어시 동일한 데이터 토폴로지를 갖는 오픈 비트라인셀 구조의 메모리 장치 및 그 동작 방법 |
JP4714133B2 (ja) * | 2006-12-11 | 2011-06-29 | 株式会社東芝 | リダンダンシーシステムを搭載した半導体記憶装置 |
US8041990B2 (en) | 2007-06-28 | 2011-10-18 | International Business Machines Corporation | System and method for error correction and detection in a memory system |
US8041989B2 (en) | 2007-06-28 | 2011-10-18 | International Business Machines Corporation | System and method for providing a high fault tolerant memory system |
US8898511B2 (en) | 2010-06-24 | 2014-11-25 | International Business Machines Corporation | Homogeneous recovery in a redundant memory system |
US8631271B2 (en) | 2010-06-24 | 2014-01-14 | International Business Machines Corporation | Heterogeneous recovery in a redundant memory system |
US8484529B2 (en) | 2010-06-24 | 2013-07-09 | International Business Machines Corporation | Error correction and detection in a redundant memory system |
CN102157206A (zh) * | 2011-01-17 | 2011-08-17 | 上海宏力半导体制造有限公司 | 具有冗余电路的存储器以及为存储器提供冗余电路的方法 |
US8522122B2 (en) | 2011-01-29 | 2013-08-27 | International Business Machines Corporation | Correcting memory device and memory channel failures in the presence of known memory device failures |
KR20170008553A (ko) * | 2015-07-14 | 2017-01-24 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 리페어 방법 |
KR20170016640A (ko) * | 2015-08-04 | 2017-02-14 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 리페어 방법 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2611972B1 (fr) * | 1987-03-03 | 1989-05-19 | Thomson Semiconducteurs | Procede d'adressage d'elements redondants d'une memoire integree et dispositif permettant de mettre en oeuvre le procede |
JPH0696598A (ja) * | 1992-07-10 | 1994-04-08 | Texas Instr Japan Ltd | 半導体メモリ装置及び欠陥メモリセル救済回路 |
US5495447A (en) * | 1993-10-08 | 1996-02-27 | Digital Equipment Corporation | Method and apparatus using mapped redundancy to perform multiple large block memory array repair |
JPH07153296A (ja) * | 1993-11-26 | 1995-06-16 | Nec Corp | 半導体記憶装置 |
JP2570203B2 (ja) * | 1994-11-22 | 1997-01-08 | 日本電気株式会社 | 半導体記憶装置 |
US5523975A (en) * | 1995-02-08 | 1996-06-04 | Alliance Semiconductor Corporation | Redundancy scheme for monolithic memories |
-
1997
- 1997-09-04 US US08/923,459 patent/US5835425A/en not_active Expired - Lifetime
-
1998
- 1998-08-18 DE DE69825378T patent/DE69825378T2/de not_active Expired - Lifetime
- 1998-08-18 EP EP98115474A patent/EP0901076B1/en not_active Expired - Lifetime
- 1998-08-27 TW TW087114174A patent/TW409252B/zh not_active IP Right Cessation
- 1998-09-01 JP JP24706898A patent/JP3180905B2/ja not_active Expired - Fee Related
- 1998-09-03 KR KR1019980036180A patent/KR100630519B1/ko not_active IP Right Cessation
- 1998-09-03 CN CN98118556A patent/CN1106018C/zh not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11862272B2 (en) | 2020-09-01 | 2024-01-02 | Changxin Memory Technologies, Inc. | Method and device for determining fail bit repair solution, and chip |
Also Published As
Publication number | Publication date |
---|---|
US5835425A (en) | 1998-11-10 |
EP0901076B1 (en) | 2004-08-04 |
JP3180905B2 (ja) | 2001-07-03 |
TW409252B (en) | 2000-10-21 |
KR100630519B1 (ko) | 2007-01-31 |
DE69825378T2 (de) | 2005-09-08 |
EP0901076A3 (en) | 1999-10-27 |
JPH11144491A (ja) | 1999-05-28 |
KR19990029474A (ko) | 1999-04-26 |
DE69825378D1 (de) | 2004-09-09 |
EP0901076A2 (en) | 1999-03-10 |
CN1212432A (zh) | 1999-03-31 |
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Legal Events
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C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: INFINEON TECHNOLOGIES AG Free format text: FORMER OWNER: SIEMENS AKTIENGESELLSCHAFT Effective date: 20130228 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20130228 Address after: German Neubiberg Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: Siemens AG Effective date of registration: 20130228 Address after: Munich, Germany Patentee after: QIMONDA AG Address before: German Neubiberg Patentee before: Infineon Technologies AG |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20151223 Address after: German Berg, Laura Ibiza Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: QIMONDA AG |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20030416 Termination date: 20160903 |
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CF01 | Termination of patent right due to non-payment of annual fee |