CN110571132A - 晶片的加工方法 - Google Patents

晶片的加工方法 Download PDF

Info

Publication number
CN110571132A
CN110571132A CN201910475519.8A CN201910475519A CN110571132A CN 110571132 A CN110571132 A CN 110571132A CN 201910475519 A CN201910475519 A CN 201910475519A CN 110571132 A CN110571132 A CN 110571132A
Authority
CN
China
Prior art keywords
sheet
wafer
processing
back surface
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910475519.8A
Other languages
English (en)
Other versions
CN110571132B (zh
Inventor
木内逸人
山本敬祐
木村泰一朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Disco Corp
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of CN110571132A publication Critical patent/CN110571132A/zh
Application granted granted Critical
Publication of CN110571132B publication Critical patent/CN110571132B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J5/00Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers
    • C09J5/06Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers involving heating of the applied adhesive
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/30Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/35Heat-activated
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02016Backside treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/682Mask-wafer alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/50Additional features of adhesives in the form of films or foils characterized by process specific features
    • C09J2301/502Additional features of adhesives in the form of films or foils characterized by process specific features process for debonding adherents
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2423/00Presence of polyolefin
    • C09J2423/04Presence of homo or copolymers of ethene
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2423/00Presence of polyolefin
    • C09J2423/10Presence of homo or copolymers of propene
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2425/00Presence of styrenic polymer
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2467/00Presence of polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54453Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/5446Located in scribe lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

提供晶片的加工方法,确保在基质上支承晶片的支承力,同时不降低生产率,也不降低剥离了基质后的器件的品质。晶片(10)的加工方法包含如下的工序:晶片配设工序,在对晶片(10)进行支承的基质(30)的上表面上敷设聚烯烃系片或聚酯系片中的任意片(20),将晶片(10)的正面(10a)定位于片(20)的上表面(20a)而进行配设;片热压接工序,在密闭环境内对隔着片(20)而配设于基质(30)的晶片(10)进行减压,对片(20)进行加热,并且按压晶片(10),从而隔着片(20)将晶片(10)热压接在基质(30)上;背面加工工序,对晶片(10)的背面(10b)实施加工;以及剥离工序,将晶片(10)从片(20)剥离。

Description

晶片的加工方法
技术领域
本发明涉及晶片的加工方法,在基质上支承晶片而对晶片的背面进行加工。
背景技术
由相互交叉的多条分割预定线划分而在正面上形成有IC、LSI等多个器件的晶片在通过磨削装置对背面进行磨削而加工成规定的厚度之后,通过切割装置(线切割机)分割成各个器件芯片,分割得到的器件芯片被用于移动电话、个人计算机等电子设备。
近年来,为了响应电子设备的小型化、轻量化的要求而使各种器件芯片小型、轻量化,存在将晶片也尽可能薄地加工成50μm、30μm的趋势。
在通过磨削装置将晶片加工得较薄的情况下,存在如下的问题:加工得越薄,晶片的强度越降低,在磨削时进而在磨削后的搬送时,晶片破损的危险性提高。因此,申请人提出了如下的技术:在将晶片加工得较薄时,利用刚性高于晶片的基质对晶片进行支承而对晶片的背面进行磨削(参照专利文献1)。
专利文献1:日本特开2004-296839号公报
在专利文献1记载的技术中,在晶片的正面上涂布液态树脂而构成粘接层,借助该粘接层而使晶片和基质一体化。但是,在利用上述的液态树脂而进行一体化的情况下,存在如下的问题:通过基质对晶片进行支承的支承力并不充分,在实施磨削加工时,保持工作台上的晶片不稳定,在磨削加工时使晶片破损。作为使晶片和基质一体化的手段,除了液态树脂以外,还考虑了双面胶或蜡等,但与通过液态树脂进行一体化的情况同样地,无法充分确保在基质上支承晶片的支承力,会产生同样的问题。
另外,在晶片的正面上所形成的器件的正面上形成有多个被称为凸块的突起电极的情况下,当晶片未稳定地支承于基质上时,存在磨削时的应力集中于该凸块而发生破损的问题。
另外,在磨削结束而将基质从晶片的正面剥离时,还存在如下的问题:液态树脂、双面胶的糊料剂、蜡等附着于该凸块而残留在晶片的正面上,使器件的品质降低,当追加将这些液态树脂、糊料剂、蜡等去除的工序时,生产率也降低。
发明内容
由此,本发明的目的在于提供晶片的加工方法,确保在基质上支承晶片的支承力,同时不降低生产率,也不降低剥离了基质后的器件的品质。
根据本发明,提供晶片的加工方法,对由相互交叉的多条分割预定线划分而在正面上形成有多个器件的晶片的背面进行加工,其中,该晶片的加工方法具有如下的工序:晶片配设工序,在对晶片进行支承的基质的上表面上敷设聚烯烃系片或聚酯系片中的任意片,将晶片的正面定位于该片的上表面而进行配设;片热压接工序,在实施了该晶片配设工序之后,在密闭环境内对隔着该片而配设于该基质的晶片进行减压,对该片进行加热,并且按压晶片,从而隔着该片将晶片热压接在该基质上;背面加工工序,在实施了该片热压接工序之后,对晶片的背面实施加工;以及剥离工序,在实施了该背面加工工序之后,将晶片从该片剥离。
优选在该背面加工工序中,实施对晶片的背面进行磨削的磨削工序。另外,该聚烯烃系片可以由聚乙烯片、聚丙烯片、聚苯乙烯片中的任意片构成。关于在选择了聚烯烃系片作为该片的情况下的该片热压接工序中的该片的加热温度,在该片由聚乙烯片构成的情况下,优选该加热温度为120℃~140℃,在该片由聚丙烯片构成的情况下,优选该加热温度为160℃~180℃,在该片由聚苯乙烯片构成的情况下,优选该加热温度为220℃~240℃。
该聚酯系片可以由聚对苯二甲酸乙二醇酯片、聚萘二甲酸乙二醇酯片中的任意片构成。关于选择聚酯系片作为该片的情况下的该片热压接工序中的该片的加热温度,在该片由聚对苯二甲酸乙二醇酯片构成的情况下,优选该加热温度为250℃~270℃,在该片由聚萘二甲酸乙二醇酯片构成的情况下,优选该加热温度为160℃~180℃。
优选在该片热压接工序中,按压晶片以使该片围绕晶片而鼓出。
根据本发明,晶片以充分的支承力被支承于基质,即使对晶片的背面实施加工,晶片也不会破损。另外,即使在器件的正面上形成有多个凸块的情况下,该凸块也埋设在片中而可靠地被支承,背面加工工序时的应力分散而克服了使凸块和片破损的问题。
另外,根据本发明的加工方法,隔着片将晶片热压接在该基质上,因此即使背面加工工序结束而将基质和片从晶片的背面剥离,也不会产生在电极上残留液态树脂、糊料剂、蜡等的问题,克服了使器件的品质降低的问题。
附图说明
图1的(a)、(b)是示出晶片配设工序的实施方式的分解立体图。
图2的(a)~(c)是示出片热压接工序的实施方式的局部剖视侧视图。
图3是通过图2所示的片热压接工序得到的一体化单元的侧视图和局部放大剖视图。
图4的(a)、(b)是示出背面加工工序的实施方式的立体图。
图5的(a)、(b)是示出剥离工序的立体图。
图6的(a)是示出片热压接工序的立体图,图6的(b)是示出片热压接工序的局部放大剖视图。
标号说明
10:晶片;12:器件;14:分割预定线;16:凸块;20:片;22:鼓出缘部;30:基质;40:加热器工作台;50:基台;52:吸引孔;60:热压接装置;62:密闭罩部件;64:按压部件;64a:按压板;70:磨削装置;71:卡盘工作台;72:磨削单元;74:旋转主轴;78:磨削磨轮;80:剥离用卡盘工作台;100:膜状部件;110:辊。
具体实施方式
以下,参照附图对作为根据本发明构成的晶片的加工方法的一个实施方式的对晶片的背面进行磨削加工的加工方法进行详细的说明。
在实施本实施方式的晶片的加工方法时,首先如图1的(a)所示,准备作为被加工物的晶片10。在晶片10的正面10a上由分割预定线14划分而形成有多个器件12。
(晶片配设工序)
若准备了晶片10,则如图1的(a)所示,在基质30的上表面30a上敷设片20,使晶片10的背面10b朝向上方(即、使正面10a朝向下方)而配设在片20的上表面20a上。片20是与圆盘形状的晶片10大致相同的形状,由聚烯烃系片或聚酯系片构成,在本实施方式中,对选择聚烯烃系的聚乙烯(PE)片作为片20的情况进行说明。优选基质30由聚对苯二甲酸乙二醇酯(PET)构成,设定成比晶片10和片20大一圈的尺寸,并且设定成能够获得比晶片10和片20高的刚性的厚度。另外,在本实施方式中,在实施晶片配设工序时,将基质30载置于圆盘形状的加热器工作台40的上表面40a的中央,该加热器工作台40配设在矩形状的基台50的上表面中央(参照图1的(b))。在加热器工作台40的内部内置有未图示的温度传感器和电加热器,与未图示的控制装置和电源连接,能够将加热器工作台40调整为期望的温度。
(片热压接工序)
若实施了上述的晶片配设工序,则实施图2所示的片热压接工序。片热压接工序是如下的工序:在密闭环境内对隔着片20而配设在基质30上的晶片10进行减压,对片20进行加热,并且按压晶片10从而隔着片20将晶片10热压接在基质30上,以下进行具体的说明。
为了实施片热压接工序,利用图2的(a)所示的热压接装置60。热压接装置60具有用于形成包含加热器工作台40在内的密闭环境的密闭罩部件62。另外,在图2中,为了便于说明内部的结构,仅示出密闭罩部件62的剖面。密闭罩部件62是将基台50的整个上表面覆盖的箱型部件,由上壁62a和从上壁62a的外周端部垂下的侧壁62b构成,下方侧开放。在上壁62a的中央形成有开口62c,该开口62c用于供按压部件64的支承轴64a贯通且在上下方向上进退。另外,为了在使支承轴64a上下进退的同时使密闭罩部件62的内部空间S与外部隔断而成为密闭环境,在对支承轴64a的外周进行支承的开口部62c处形成有密封构造62d。在支承轴64a的下端配设有按压板64b。按压板64b的直径至少大于晶片10,优选按压板64b是设定成比加热器工作台40略大的尺寸的圆盘形状。在密闭罩部件62的侧壁62b的下端面上沿着整个圆周配设有弹性密封部件62e。另外,虽省略了图示,但在按压部件64的上方配设有用于使按压部件64在上下方向上进退的驱动单元。
若在加热器工作台40上隔着片20和基质30而载置了晶片10,则如图2的(a)所示,使定位于基台50上的密闭罩部件62下降而载置于基台50的上表面上。此时,如图2的(b)所示,按压板64b被提起至不与晶片10的上表面接触的上方位置。当密闭罩部件62载置于基台50上时,配设于侧壁62b的下端面上的弹性密封部件62e紧贴于基台50的上表面上。在基台50上的加热器工作台40的附近位置配设有吸引孔52,使吸引单元经由吸引孔52而与通过密闭罩部件62所形成的内部空间S连接。
若如图2的(b)所示那样将密闭罩部件62载置于基台50上而使密闭罩部件62的内部空间S成为密闭环境,则使未图示的吸引单元进行动作,经由吸引孔52而对内部空间S的空气进行吸引,将包含晶片10在内的区域减压至接近真空的状态。与此同时,使内置于加热器工作台40的电加热器进行动作而对在基质30上支承着晶片10的片20进行加热。使加热器工作台40的电加热器进行动作,通过未图示的温度传感器对加热器工作台40的温度进行控制,从而将构成片20的聚乙烯片加热至熔点附近的温度(120℃~140℃)。另外,此时,也可以配设直接对片20的温度进行检测的温度传感器。另外,在对片20进行加热的同时,如图2的(c)所示,使按压板64b下降而利用均等的力对晶片10的整个上表面进行按压。将收纳有晶片10的内部空间S加压至接近真空的状态,残留在晶片10与片20之间的空气被吸引而去除。并且,片20被加热至上述的温度而发生软化,隔着片20将晶片10热压接在基质30上而形成一体化单元W。如上所述,完成片热压接工序。若这样完成了片热压接工序,则使未图示的吸引单元的动作停止,使加热器工作台40的电加热器停止,使按压板64b上升,并且将密闭罩部件62向上方提起。若片20的温度下降至常温附近,则能够将一体化单元W从加热器工作台40搬出。
参照图3对通过实施上述的片热压接工序而形成的一体化单元W进行进一步说明。如上所述,根据片热压接工序,在密闭环境内进行了减压的状态下,对片20进行加热,在片20发生了软化的状态下按压晶片10而使晶片10与片20紧贴,因此能够以充分的支承力将晶片10支承于刚性较高的基质30上。另外,即使是在晶片10的正面10a上所形成的器件12上形成有多个凸块的情况下,也可将空气从该凸块附近完全吸引而去除,如图中将一体化单元W的端部的剖面放大所示,标号16所示的凸块埋设并紧贴于被加热而软化的状态的片20中而一体化。其结果是,片20的外周鼓出,形成从外侧围绕晶片10的外周10c的鼓出缘部22。
(背面加工工序)
若实施了上述的片热压接工序,则实施背面加工工序,对已成为一体化单元W的晶片10的背面10b实施磨削加工。以下,对背面加工工序进行具体的说明。
如图4的(a)所示,将通过片热压接工序得到的一体化单元W搬送至实施磨削加工的磨削装置70(仅示出一部分),使基质30朝下而载置于磨削装置70所具有的卡盘工作台71的吸附卡盘71a上。吸附卡盘71a由具有通气性的多孔陶瓷构成,使与卡盘工作台71连接的未图示的吸引单元进行动作,从而借助吸附卡盘71a将一体化单元W吸引保持于卡盘工作台71上。
若将一体化单元W吸引保持于卡盘工作台71上,则通过图4的(b)所示的磨削装置70对晶片10的背面10b进行磨削。磨削装置70具有磨削单元72,该磨削单元72用于对以一体化单元W的形式吸引保持于卡盘工作台71上的晶片10的背面10b进行磨削而薄化。磨削单元72具有:旋转主轴74,其通过未图示的旋转驱动机构进行旋转;安装座76,其安装于旋转主轴74的下端;以及磨削磨轮78,其安装于安装座76的下表面上,在磨削磨轮78的下表面上呈环状配设有磨削磨具78a。
若将晶片10吸引保持于卡盘工作台71上,则一边使磨削单元72的旋转主轴74在图4的(b)中箭头R1所示的方向上按照例如6000rpm进行旋转,一边使卡盘工作台71在图4的(b)中箭头R2所示的方向上按照例如300rpm进行旋转。并且,使磨削磨具78a与晶片10的背面10b接触,将磨削磨轮78按照例如1μm/秒的磨削进给速度向下方即相对于卡盘工作台71垂直的方向进行磨削进给。此时,能够一边通过未图示的接触式的测量仪对晶片10的厚度进行测量一边进行磨削,对晶片10的背面10b进行磨削而使晶片10成为规定的厚度(例如50μm),背面加工工序完成。
(剥离工序)
若完成了上述的背面加工工序,则实施剥离工序,将晶片10从片20剥离。下面,对剥离工序的实施步骤进行说明。
将通过背面加工工序进行了磨削而薄化的晶片10按照构成一体化单元W的状态从磨削装置70的卡盘工作台71搬出。将从卡盘工作台71搬出的一体化单元W搬送至图5的(a)所示的剥离用卡盘工作台80。如图所示,使一体化单元W上下翻转而使基质30的背面30b朝向上方(即,使晶片10的背面10b朝向下方)而载置于剥离用卡盘工作台80的吸附卡盘80a上。另外,剥离用卡盘工作台80具有与上述的磨削装置70的卡盘工作台71同样的结构,不过,磨削装置70的吸附卡盘71a设定成与基质30等同的直径,与此相对,剥离用卡盘工作台80的吸附卡盘80a设定成与晶片10等同的直径。
使未图示的吸引单元进行动作而将晶片10吸引保持于吸附卡盘80a上。若将一体化单元W吸引保持于剥离用卡盘工作台81上,则如图5的(b)所示,将片20与基质30一起从晶片10剥离。另外,若如本实施方式那样由树脂(聚对苯二甲酸乙二醇酯)构成基质30,则基质30在从晶片10剥离时能够弯曲,是优选的。另外,通过对片20进行加热而使片20软化,因此在实施剥离工序时,若对片20进行加热,则能够更加容易剥离。此时,在片20残留在晶片10上而仅将基质30剥离的情况下,可以在将基质30剥离之后,在将晶片10吸引保持于剥离用卡盘工作台81的状态下使用粘接带等将片20剥离。另外,在上述的说明中,对在将基质30从晶片10剥离时对片20进行加热的情况进行了说明,但有时也通过冷却而使片20的粘接力降低,可以在对片20进行冷却之后实施剥离工序。在实施剥离工序时,关于对片20进行加热还是进行冷却,根据构成片20的原材料的特性进行选择即可。
根据本实施方式,通过实施片热压接工序,从而晶片10隔着片20以充分的支承力被支承于基质30,即使对晶片10的背面10b实施磨削加工,也可防止晶片的破损。另外,在晶片10的正面10a上所形成的器件12上形成有多个凸块的情况下,也可将晶片10的正面10a与片20之间的空气吸引而去除,并且使凸块埋设于通过加热而软化的片20,对晶片10整体进行均等地支承,因此磨削时的应力分散从而防止晶片10或凸块的破损。另外,在本实施方式中,将晶片10隔着片20热压接在基质30上而进行支承,在片20与晶片10之间未夹设液态树脂、糊料剂、蜡等。由此,即使将晶片10从片20剥离,也不会在器件14上残留液态树脂、糊料剂、蜡等,不会产生使器件14的品质降低的问题。
另外,在本实施方式中,通过实施片热压接工序而在片20的外周形成有围绕晶片10的外周部10c的鼓出缘部22,因此在对晶片10实施磨削加工时,更稳定地对晶片10进行支承,更加有效地防止晶片10的破损。
另外,在上述的实施方式中,由聚乙烯片构成片20,但本发明不限于此。作为无需液态树脂、糊料剂、蜡等而能够对晶片10进行支承的片20,可以从聚烯烃系片、聚酯系片中适当选择。作为聚烯烃系片,除了上述的聚乙烯片以外,例如可以选择聚丙烯(PP)片、聚苯乙烯(PS)片。另外,作为聚酯系片,例如可以选择聚对苯二甲酸乙二醇酯(PET)片、聚萘二甲酸乙二醇酯(PEN)片。
在上述的实施方式中,将在片热压接工序中对片20进行加热时的温度设定为聚乙烯片的熔点附近的温度(120℃~140℃),但在如上述那样选择其他片构成片20的情况下,优选加热至所选择的片的原材料的熔点附近的温度。例如在片20由聚丙烯片构成的情况下,优选将加热时的温度设定为160℃~180℃,在片20由聚苯乙烯片构成的情况下,优选使加热时的温度为220℃~240℃。另外,在片20由聚对苯二甲酸乙二醇酯片构成的情况下,优选使加热时的温度为250℃~270℃,在片20由聚萘二甲酸乙二醇酯片构成的情况下,优选将加热时的温度设定为160℃~180℃。
在上述的实施方式中,由聚对苯二甲酸乙二醇酯构成基质30,但本发明不限于此,可以采用可确保能够不使实施了背面加工工序之后的晶片10破损而进行搬送的刚性的支承基板,例如可以选择由玻璃、铝或陶瓷等构成的板材。另外,在上述的实施方式中,由聚乙烯片构成片20,由聚对苯二甲酸乙二醇酯构成基质30,但在采用聚对苯二甲酸乙二醇酯片作为片20的情况下,在片热压接工序中需要加热至比采用聚乙烯片的情况高的温度(250℃~270℃)。由此,作为基质30,优选由不容易受到高温的影响的玻璃、铝、陶瓷、聚酰亚胺树脂等构成。即,优选基质30从熔点温度高于片20的原材料中进行选择。
另外,在上述的实施方式中,通过密闭罩部件62形成了密闭环境,但本发明不限于此。例如,可以如图6的(a)所示,隔着片20而将晶片10载置于基质30上,将基质30保持于具有设定成直径比基质30大的吸附卡盘91的卡盘工作台90上,并且利用膜状部件100覆盖保持着晶片10的吸附卡盘91的整个上表面,从吸附卡盘91作用负压Vm,从而使包含晶片10在内的膜状部件100的内侧成为密闭环境,对该密闭环境内的空间进行减压。并且,也可以如在图6的(b)中作为局部放大剖视图所示,通过具有加热单元的辊110,一边将片20加热至期望的温度,一边从膜状部件100的上方对晶片10的整个背面10b进行按压,从而实施本发明的片热压接工序。
在上述的实施方式中,说明了对本发明的背面加工工序应用了对晶片的背面进行磨削的磨削加工的例子,但本发明不限于此,也可以对本发明的背面加工工序应用对晶片的背面进行研磨的研磨加工,能够起到与上述的实施方式同样的作用效果。

Claims (7)

1.一种晶片的加工方法,对由相互交叉的多条分割预定线划分而在正面上形成有多个器件的晶片的背面进行加工,其中,
该晶片的加工方法具有如下的工序:
晶片配设工序,在对晶片进行支承的基质的上表面上敷设聚烯烃系片或聚酯系片中的任意片,将晶片的正面定位于该片的上表面而进行配设;
片热压接工序,在实施了该晶片配设工序之后,在密闭环境内对隔着该片而配设于该基质的晶片进行减压,对该片进行加热,并且按压晶片,从而隔着该片将晶片热压接在该基质上;
背面加工工序,在实施了该片热压接工序之后,对晶片的背面实施加工;以及
剥离工序,在实施了该背面加工工序之后,将晶片从该片剥离。
2.根据权利要求1所述的晶片的加工方法,其中,
在该背面加工工序中,实施对晶片的背面进行磨削的磨削工序。
3.根据权利要求1或2所述的晶片的加工方法,其中,
该聚烯烃系片从由聚乙烯片、聚丙烯片以及聚苯乙烯片构成的组中进行选择。
4.根据权利要求3所述的晶片的加工方法,其中,
关于在选择了聚烯烃系片作为该片的情况下的该片热压接工序中的该片的加热温度,在该片由聚乙烯片构成的情况下,该加热温度为120℃~140℃,在该片由聚丙烯片构成的情况下,该加热温度为160℃~180℃,在该片由聚苯乙烯片构成的情况下,该加热温度为220℃~240℃。
5.根据权利要求1或2所述的晶片的加工方法,其中,
该聚酯系片从由聚对苯二甲酸乙二醇酯片和聚萘二甲酸乙二醇酯片构成的组中进行选择。
6.根据权利要求5所述的晶片的加工方法,其中,
关于在选择了聚酯系片作为该片的情况下的该片热压接工序中的该片的加热温度,在该片由聚对苯二甲酸乙二醇酯片构成的情况下,该加热温度为250℃~270℃,在该片由聚萘二甲酸乙二醇酯片构成的情况下,该加热温度为160℃~180℃。
7.根据权利要求1至6中的任意一项所述的晶片的加工方法,其中,
在该片热压接工序中,按压晶片以使该片围绕晶片而鼓出。
CN201910475519.8A 2018-06-06 2019-06-03 晶片的加工方法 Active CN110571132B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-108902 2018-06-06
JP2018108902A JP7201342B2 (ja) 2018-06-06 2018-06-06 ウエーハの加工方法

Publications (2)

Publication Number Publication Date
CN110571132A true CN110571132A (zh) 2019-12-13
CN110571132B CN110571132B (zh) 2024-02-20

Family

ID=68651974

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910475519.8A Active CN110571132B (zh) 2018-06-06 2019-06-03 晶片的加工方法

Country Status (7)

Country Link
US (1) US11450548B2 (zh)
JP (1) JP7201342B2 (zh)
KR (1) KR20190138754A (zh)
CN (1) CN110571132B (zh)
DE (1) DE102019208258A1 (zh)
SG (1) SG10201904719TA (zh)
TW (1) TWI810309B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019220550A (ja) * 2018-06-19 2019-12-26 株式会社ディスコ ウエーハの加工方法
JP7301468B2 (ja) 2019-04-17 2023-07-03 株式会社ディスコ 被加工物の加工方法、熱圧着方法
JP2023019193A (ja) * 2021-07-28 2023-02-09 株式会社ディスコ 被加工物の加工方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201613989A (en) * 2014-09-29 2016-04-16 Fujifilm Corp Composition, process for producing sheet, sheet, layered product, and laminate with device wafer
US20160257861A1 (en) * 2015-03-03 2016-09-08 Rohm And Haas Electronic Materials Llc Ephemeral bonding
CN107039341A (zh) * 2015-12-04 2017-08-11 株式会社迪思科 晶片的加工方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153352A (ja) * 1982-03-09 1983-09-12 Toshiba Corp 半導体素子の製造方法
US6165813A (en) * 1995-04-03 2000-12-26 Xerox Corporation Replacing semiconductor chips in a full-width chip array
JP3280876B2 (ja) * 1996-01-22 2002-05-13 日本テキサス・インスツルメンツ株式会社 ウェハダイシング・接着用シートおよび半導体装置の製造方法
JP2002203821A (ja) 2000-12-28 2002-07-19 Mitsubishi Gas Chem Co Inc 接着および剥離法
JP2003037155A (ja) 2001-07-25 2003-02-07 Mitsubishi Gas Chem Co Inc 薄葉化ウェハーの製造法
JP4074758B2 (ja) 2001-06-18 2008-04-09 株式会社ディスコ 半導体ウエーハの加工方法
JP2004296839A (ja) * 2003-03-27 2004-10-21 Kansai Paint Co Ltd 半導体チップの製造方法
JP2005191297A (ja) 2003-12-25 2005-07-14 Jsr Corp ダイシングフィルム及び半導体ウェハの切断方法
JP2005246491A (ja) 2004-03-01 2005-09-15 Disco Abrasive Syst Ltd 研削装置及びウェーハの研削方法
JP4930679B2 (ja) 2005-12-14 2012-05-16 日本ゼオン株式会社 半導体素子の製造方法
JP5151104B2 (ja) 2006-09-22 2013-02-27 パナソニック株式会社 電子部品の製造方法
JP5008190B2 (ja) * 2007-06-15 2012-08-22 信越化学工業株式会社 スクリーン印刷用接着剤組成物
TW200908246A (en) * 2007-08-07 2009-02-16 Chipmos Technologies Inc Adhesion structure for a package apparatus
US20090191029A1 (en) * 2008-01-30 2009-07-30 Taeg Ki Lim System for handling semiconductor dies
EP2311921A4 (en) * 2008-08-04 2012-02-01 Hitachi Chemical Co Ltd ADHESIVE COMPOSITION, FILM TYPE ADHESIVE, ADHESIVE SHEET, AND SEMICONDUCTOR DEVICE
JP2010184319A (ja) 2009-02-12 2010-08-26 Disco Abrasive Syst Ltd 切削方法
KR101974257B1 (ko) * 2014-08-29 2019-04-30 후루카와 덴키 고교 가부시키가이샤 접착 필름 및 접착 필름을 이용한 반도체 패키지
JP6657515B2 (ja) 2015-08-31 2020-03-04 株式会社ディスコ ウェーハを処理する方法および該方法で使用するための保護シート
GB2551732B (en) 2016-06-28 2020-05-27 Disco Corp Method of processing wafer
KR102528636B1 (ko) 2016-06-30 2023-05-03 린텍 가부시키가이샤 반도체 가공용 시트
JP7281873B2 (ja) 2018-05-14 2023-05-26 株式会社ディスコ ウェーハの加工方法
JP7154686B2 (ja) 2018-06-06 2022-10-18 株式会社ディスコ ウェーハの加工方法
JP2019220550A (ja) 2018-06-19 2019-12-26 株式会社ディスコ ウエーハの加工方法
JP7049941B2 (ja) 2018-06-22 2022-04-07 株式会社ディスコ ウエーハの加工方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201613989A (en) * 2014-09-29 2016-04-16 Fujifilm Corp Composition, process for producing sheet, sheet, layered product, and laminate with device wafer
US20160257861A1 (en) * 2015-03-03 2016-09-08 Rohm And Haas Electronic Materials Llc Ephemeral bonding
CN107039341A (zh) * 2015-12-04 2017-08-11 株式会社迪思科 晶片的加工方法

Also Published As

Publication number Publication date
CN110571132B (zh) 2024-02-20
JP2019212807A (ja) 2019-12-12
US11450548B2 (en) 2022-09-20
SG10201904719TA (en) 2020-01-30
TWI810309B (zh) 2023-08-01
US20190378746A1 (en) 2019-12-12
TW202000817A (zh) 2020-01-01
KR20190138754A (ko) 2019-12-16
DE102019208258A1 (de) 2019-12-12
JP7201342B2 (ja) 2023-01-10

Similar Documents

Publication Publication Date Title
CN110783249B (zh) 晶片的加工方法
CN110620081B (zh) 晶片的加工方法
CN110571132A (zh) 晶片的加工方法
TWI767022B (zh) 基板處理方法及基板處理系統
JP7317482B2 (ja) ウエーハの加工方法
CN111063608A (zh) 晶片的加工方法
JP2002353296A (ja) ウェハの保護テープ剥離装置およびウェハのマウント装置
JP7374657B2 (ja) ウエーハの加工方法
JP2005260154A (ja) チップ製造方法
CN110429062B (zh) 晶片的加工方法
JP2013219245A (ja) 半導体装置の製造方法
JP2021174934A (ja) チップの製造方法及びエッジトリミング装置
JP2024013927A (ja) 基板貼り付け装置、基板処理システム、及び基板貼り付け方法
CN113725137A (zh) 晶片的加工方法
JP2021108337A (ja) 保護シート配設装置、及び保護シートの配設方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant