CN110337710B - 用于铂图案化的牺牲层 - Google Patents

用于铂图案化的牺牲层 Download PDF

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Publication number
CN110337710B
CN110337710B CN201880014141.5A CN201880014141A CN110337710B CN 110337710 B CN110337710 B CN 110337710B CN 201880014141 A CN201880014141 A CN 201880014141A CN 110337710 B CN110337710 B CN 110337710B
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CN
China
Prior art keywords
layer
platinum
sacrificial layer
patterned
sacrificial
Prior art date
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CN201880014141.5A
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English (en)
Chinese (zh)
Other versions
CN110337710A (zh
Inventor
S·梅耶
H·林克
K·夏奇施耐德
F·梅兹
M·史密德彼得
J·莫雷拉
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Texas Instruments Inc
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Texas Instruments Inc
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Publication of CN110337710A publication Critical patent/CN110337710A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/202—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials for lift-off processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/403—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials for lift-off processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4432—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Micromachines (AREA)
CN201880014141.5A 2017-01-19 2018-01-19 用于铂图案化的牺牲层 Active CN110337710B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201762448110P 2017-01-19 2017-01-19
US62/448,110 2017-01-19
US15/658,039 2017-07-24
US15/658,039 US10297497B2 (en) 2017-01-19 2017-07-24 Sacrificial layer for platinum patterning
PCT/US2018/014531 WO2018136802A1 (en) 2017-01-19 2018-01-19 Sacrificial layer for platinum patterning

Publications (2)

Publication Number Publication Date
CN110337710A CN110337710A (zh) 2019-10-15
CN110337710B true CN110337710B (zh) 2023-12-26

Family

ID=62841661

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880014141.5A Active CN110337710B (zh) 2017-01-19 2018-01-19 用于铂图案化的牺牲层

Country Status (5)

Country Link
US (1) US10297497B2 (https=)
EP (1) EP3571711B1 (https=)
JP (1) JP7219521B2 (https=)
CN (1) CN110337710B (https=)
WO (1) WO2018136802A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11011381B2 (en) 2018-07-27 2021-05-18 Texas Instruments Incorporated Patterning platinum by alloying and etching platinum alloy
CN111945128A (zh) * 2020-08-18 2020-11-17 江苏能华微电子科技发展有限公司 一种提高铂与衬底黏附性的方法及其产品
US12607594B2 (en) 2020-09-03 2026-04-21 Texas Instruments Incorporated ISFET biosensor

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4497684A (en) * 1983-02-22 1985-02-05 Amdahl Corporation Lift-off process for depositing metal on a substrate
JPH065717A (ja) * 1992-06-19 1994-01-14 Toshiba Corp 電極へのオーム性接続金属層の形成方法
JPH07273280A (ja) * 1994-03-29 1995-10-20 Tokin Corp 薄膜パターンの形成方法
JP2003258327A (ja) * 2001-08-03 2003-09-12 Yamaha Corp 貴金属薄膜パターンの形成方法
CN101136327A (zh) * 2006-08-29 2008-03-05 中国科学院声学研究所 一种图形化铂/钛金属薄膜的剥离制备方法
WO2012078025A1 (en) * 2010-12-09 2012-06-14 Mimos Berhad A method of fabricating a semiconductor device

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Publication number Priority date Publication date Assignee Title
JPS59165425A (ja) * 1983-03-10 1984-09-18 Matsushita Electric Ind Co Ltd パタ−ン形成方法
JPH07130702A (ja) * 1993-11-08 1995-05-19 Fujitsu Ltd 白金又はパラジウムよりなる金属膜のパターニング方法
US5914507A (en) 1994-05-11 1999-06-22 Regents Of The University Of Minnesota PZT microdevice
KR100224660B1 (ko) 1996-06-17 1999-10-15 윤종용 백금-폴리실리콘 게이트 형성방법
JP3481415B2 (ja) * 1997-03-19 2003-12-22 富士通株式会社 半導体装置及びその製造方法
US6218297B1 (en) * 1998-09-03 2001-04-17 Micron Technology, Inc. Patterning conductive metal layers and methods using same
JP3159255B2 (ja) * 1998-09-16 2001-04-23 日本電気株式会社 強誘電体容量で用いる電極のスパッタ成長方法
US6956274B2 (en) * 2002-01-11 2005-10-18 Analog Devices, Inc. TiW platinum interconnect and method of making the same
US7829215B2 (en) 2005-08-29 2010-11-09 University Of South Florida Surface micromachined electrolyte-cavities for use in micro-aluminum galvanic cells
US20080124823A1 (en) * 2006-11-24 2008-05-29 United Microdisplay Optronics Corp. Method of fabricating patterned layer using lift-off process
KR101045090B1 (ko) * 2008-11-13 2011-06-29 주식회사 하이닉스반도체 반도체 소자의 미세 패턴 형성방법
RU2426193C1 (ru) 2010-05-05 2011-08-10 Федеральное государственное бюджетное учреждение "Национальный исследовательский центр "Курчатовский институт" Способ нанесения платиновых слоев на подложку
US9006105B2 (en) 2013-07-30 2015-04-14 United Microelectronics Corp. Method of patterning platinum layer
JP6176025B2 (ja) * 2013-09-25 2017-08-09 日亜化学工業株式会社 金属膜の形成方法及び発光素子の製造方法
US9903763B2 (en) 2013-09-27 2018-02-27 Robert Bosch Gmbh Titanium nitride for MEMS bolometers

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4497684A (en) * 1983-02-22 1985-02-05 Amdahl Corporation Lift-off process for depositing metal on a substrate
JPH065717A (ja) * 1992-06-19 1994-01-14 Toshiba Corp 電極へのオーム性接続金属層の形成方法
JPH07273280A (ja) * 1994-03-29 1995-10-20 Tokin Corp 薄膜パターンの形成方法
JP2003258327A (ja) * 2001-08-03 2003-09-12 Yamaha Corp 貴金属薄膜パターンの形成方法
CN101136327A (zh) * 2006-08-29 2008-03-05 中国科学院声学研究所 一种图形化铂/钛金属薄膜的剥离制备方法
WO2012078025A1 (en) * 2010-12-09 2012-06-14 Mimos Berhad A method of fabricating a semiconductor device

Also Published As

Publication number Publication date
EP3571711B1 (en) 2024-05-22
US10297497B2 (en) 2019-05-21
US20180204767A1 (en) 2018-07-19
EP3571711A1 (en) 2019-11-27
EP3571711A4 (en) 2020-09-09
JP7219521B2 (ja) 2023-02-08
JP2020516050A (ja) 2020-05-28
WO2018136802A1 (en) 2018-07-26
CN110337710A (zh) 2019-10-15

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