CN109638114A - A kind of LED epitaxial slice and preparation method thereof - Google Patents

A kind of LED epitaxial slice and preparation method thereof Download PDF

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Publication number
CN109638114A
CN109638114A CN201811205142.6A CN201811205142A CN109638114A CN 109638114 A CN109638114 A CN 109638114A CN 201811205142 A CN201811205142 A CN 201811205142A CN 109638114 A CN109638114 A CN 109638114A
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sublayer
layer
type gan
superlattice structure
gan layer
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CN109638114B (en
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洪威威
王倩
韦春余
周飚
胡加辉
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HC Semitek Suzhou Co Ltd
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HC Semitek Suzhou Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

The invention discloses a kind of LED epitaxial slices and preparation method thereof, belong to light emitting diode manufacturing field.Low temperature N-type GaN layer and superlattice structure are set gradually between N-type GaN layer and active layer, the setting of low temperature N-type GaN layer aloows good transition between superlattice structure and N-type GaN layer, guarantee the quality of the superlattice structure grown in N-type GaN layer, it avoids occurring excessive defect in superlattice structure and then influences the active layer of subsequent growth, and alternately stacked aluminum gallium nitride sublayer in superlattice structure, indium gallium nitrogen sublayer and GaN sublayer can play the role of discharging the stress in epitaxial layer, improve the crystal quality of epitaxial layer entirety, and due to aluminum gallium nitride sublayer, differences between lattice constant between indium gallium nitrogen sublayer and GaN sublayer three is larger, therefore the interface between three can stop dislocation, in active layer after avoiding dislocation from being moved to superlattice structure, it ensure that the crystal matter of active layer Amount.

Description

A kind of LED epitaxial slice and preparation method thereof
Technical field
The present invention relates to light emitting diode manufacturing field, in particular to a kind of LED epitaxial slice and its preparation side Method.
Background technique
Light emitting diode is a kind of semiconductor diode that electric energy can be converted to luminous energy, have small in size, the service life is long, The advantages that low in energy consumption, is widely used in automobile signal light, traffic lights, display screen and lighting apparatus at present.Epitaxial wafer It is the foundation structure for making light emitting diode, the structure of epitaxial wafer includes the epitaxial layer on substrate and substrate, and epitaxial layer includes Successively grow N-type GaN layer, active layer and p-type GaN layer on substrate.
But in this configuration, since there are biggish lattice mismatches between substrate and epitaxial layer, epitaxial layer is on substrate More defect can be generated when growth, influences the quality of active layer in epitaxial layer, and the second-rate of active layer will affect in active layer The combined efficiency of middle electronics and hole, and then cause the luminous efficiency of light emitting diode lower.
Summary of the invention
The embodiment of the invention provides a kind of LED epitaxial slices and preparation method thereof, can be improved light emitting diode Luminous efficiency.The technical solution is as follows:
The embodiment of the invention provides a kind of LED epitaxial slice, the epitaxial wafer includes substrate and is sequentially laminated on N-type GaN layer, low temperature N-type GaN layer, superlattice structure, active layer and p-type GaN layer on the substrate,
The superlattice structure includes alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer, wherein GaN Doped with Si element in layer.
Optionally, the aluminum gallium nitride sublayer is AlXGa1-XN layers, the indium gallium nitrogen sublayer is InZGa1-ZN layers, wherein 0 < X 1,0.1 < Z < 0.5 of <.
Optionally, 0.1 < X <, 0.4,0.1 < Z < 0.3.
Optionally, the thickness of the thickness of the aluminum gallium nitride sublayer, the thickness of the indium gallium nitrogen sublayer and the GaN sublayer is equal For 5~15nm.
Optionally, the number of plies of the number of plies of the aluminum gallium nitride sublayer, the number of plies of the indium gallium nitrogen sublayer and the GaN sublayer is equal It is 5~20.
Optionally, the doping concentration of Si element is 1 × 10 in the GaN sublayer17~1 × 1018cm-3。
Optionally, the low temperature N-type GaN layer with a thickness of 30~80nm.
The embodiment of the invention provides a kind of preparation method of LED epitaxial slice, the preparation method includes:
One substrate is provided；
N-type GaN layer is grown over the substrate；
The growing low temperature N-type GaN layer in the N-type GaN layer；
Superlattice structure is grown in the low temperature N-type GaN layer；
Active layer is grown on the superlattice structure；
Growth P-type GaN layer on the active layer,
Wherein, the superlattice structure includes alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer, wherein Doped with Si element in GaN sublayer.
Optionally, the growth temperature of the superlattice structure is 800~900 DEG C.
Optionally, the growth pressure of the superlattice structure is 50~300Torr.
Technical solution provided in an embodiment of the present invention has the benefit that between N-type GaN layer and active layer successively The superlattices knot for increasing setting low temperature N-type GaN layer and including alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer Structure, the setting of low temperature N-type GaN layer can be achieved the good transition between superlattice structure and N-type GaN layer, guarantee in N-type GaN layer The quality of the superlattice structure of upper growth avoids occurring excessive defect in superlattice structure and then influences the active of subsequent growth Layer, and alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer can play in release epitaxial layer in superlattice structure The effect of stress improves the crystal quality of epitaxial layer entirety, and due to aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer three Differences between lattice constant between person is larger, therefore the interface between three can stop dislocation, avoids dislocation from being moved to super In active layer after lattice structure, the crystal quality of active layer ensure that, and then the luminous efficiency of light emitting diode can be improved.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing.
Fig. 1 is a kind of structural schematic diagram of LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is the structural schematic diagram of another LED epitaxial slice provided in an embodiment of the present invention；
Fig. 3 is a kind of preparation method flow chart of LED epitaxial slice provided in an embodiment of the present invention；
Fig. 4 is the preparation method flow chart of another LED epitaxial slice provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention Formula is described in further detail.
Fig. 1 is a kind of structural schematic diagram of LED epitaxial slice provided in an embodiment of the present invention.As shown in Figure 1, should Epitaxial wafer includes substrate 1 and the N-type GaN layer 2 being sequentially laminated on substrate 1, low temperature N-type GaN layer 3, superlattice structure 4, active Layer 5 and p-type GaN layer 6.
Superlattice structure 4 includes alternately stacked aluminum gallium nitride sublayer 41, indium gallium nitrogen sublayer 42 and GaN sublayer 43, wherein GaN Doped with Si element in sublayer 43.
Setting low temperature N-type GaN layer 3 is successively increased between N-type GaN layer 2 and active layer 5 and including alternately stacked gallium aluminium The superlattice structure 4 of nitrogen sublayer 41, indium gallium nitrogen sublayer 42 and GaN sublayer 43, the setting of low temperature N-type GaN layer 3 may make superlattices Between structure 4 and N-type GaN layer 2 can good transition, guarantee the quality of superlattice structure 4 grown in N-type GaN layer 3, keep away Exempt to occur excessive defect in superlattice structure 4 and then influences the active layer 5 of subsequent growth, and it is alternately laminated in superlattice structure 4 Aluminum gallium nitride sublayer 41, indium gallium nitrogen sublayer 42 and GaN sublayer 43 can play the role of discharge epitaxial layer in stress, improve extension The whole crystal quality of layer, and since the lattice between aluminum gallium nitride sublayer 41, indium gallium nitrogen sublayer 42 and 43 three of GaN sublayer is normal Number differs greatly, therefore the interface between three can stop dislocation, and dislocation is avoided to be moved to after superlattice structure 4 In active layer 5, the crystal quality of active layer 5 ensure that.
And since the potential barrier of indium gallium nitrogen sublayer 42 is lower than GaN sublayer 43, the potential barrier of GaN sublayer 43 is lower than aluminum gallium nitride sublayer 41 potential barrier, electronics can be accumulated at indium gallium nitrogen sublayer 42, and the cooperation higher aluminum gallium nitride sublayer 41 of potential barrier stops electronics, It may make electronics to obtain good extension before entering active layer 5, while can be used as electricity doped with the GaN sublayer 43 of Si element Sub- offer source guarantees the quantity for increasing the electronics entered in active layer 5 while current expansion, the hair of light emitting diode can be improved Light efficiency and the Luminescence Uniformity for improving light emitting diode.
Fig. 2 is the structural schematic diagram of another LED epitaxial slice provided in an embodiment of the present invention, as shown in Fig. 2, The epitaxial wafer may include substrate 1 and the buffer layer being sequentially laminated on substrate 17, N-type GaN layer 2, low temperature N-type GaN layer 3, super brilliant Lattice structure 4, active layer 5, low temperature p-type GaN layer 8, electronic barrier layer 9, p-type GaN layer 6 and p-type contact layer 10.
Illustratively, buffer layer 7 may include the AlN layer 71 that stacks gradually and layer of undoped gan 72, AlN layer 71 with do not mix The setting of miscellaneous GaN layer 72 can reduce the influence of the lattice mismatch between substrate 1 and epitaxial layer entirety, be conducive to improve light-emitting diodes The quality of the epitaxial wafer of pipe, and then improve the luminous efficiency of light emitting diode.
Wherein, the thickness of AlN buffer layer 71 can be in 15~40nm.The thickness of layer of undoped gan 72 can be 1~5 μm.
Optionally, the doped chemical in N-type GaN layer 2 can be Si.The thickness of N-type GaN layer 5 can be 1~5 μm.Wherein, Si The doping concentration of element can be 1 × 1018~1 × 1019cm-3, the quality of the N-type GaN layer 2 obtained with this condition is preferable, can Guarantee the quality of the epitaxial wafer of light emitting diode.
Illustratively, the thickness of low temperature N-type GaN layer 3 can be 30~80nm.The thickness of low temperature N-type GaN layer is within this range When, it can guarantee that the quality of the epitaxial film grown in low temperature N-type GaN layer is preferable, and grown in low temperature N-type GaN layer The effect that superlattice structure discharges stress is preferable.
Optionally, the aluminum gallium nitride sublayer 41 in superlattice structure 4 is AlXGa1-XN layers, indium gallium nitrogen sublayer 42 is InZGa1-ZN Layer, wherein 0 < X <, 1,0.1 < Z < 0.5.AlXGa1-XN layers and InZGa1-ZX and Z in N layers can guarantee in range above respectively Guarantee that superlattice structure effectively plays the effect of current expansion while the quality of superlattice structure, improves the hair of light emitting diode Light efficiency.
Further, 0.1 < X <, 0.4,0.1 < Z < 0.3.With this condition, the luminous efficiency of light emitting diode can Obtain bigger promotion.
Preferably, 0.3 x, the luminous efficiency of light emitting diode can be promoted effectively when z is 0.25.
Optionally, the thickness of the thickness of aluminum gallium nitride sublayer 41, the thickness of indium gallium nitrogen sublayer 42 and GaN sublayer 43 be 5~ 15nm.The thickness of the thickness of aluminum gallium nitride sublayer 41, the thickness of indium gallium nitrogen sublayer 42 and GaN sublayer 43 in range above, surpasses Lattice structure is larger to the promotion of the luminous efficiency of light emitting diode.
Illustratively, the number of plies of the number of plies of aluminum gallium nitride sublayer 41, the number of plies of indium gallium nitrogen sublayer 42 and GaN sublayer 43 is 5 ~20.Superlattice structure is larger to the promotion of the luminous efficiency of light emitting diode at this time.
Optionally, the doping concentration of Si element is 1 × 10 in GaN sublayer 4317~1 × 1018cm-3.Si in GaN sublayer 43 It is preferable to the promotion of the luminous efficiency of light emitting diode when the doping concentration of element is range above.
Optionally, active layer 5 can be multiple quantum well layer, and active layer 5 may include the InGaN well layer 51 stacked gradually and GaN Barrier layer 52.
Wherein, the number of plies of InGaN well layer 51 and GaN barrier layer 52 can be 5~11.The light-emitting diodes obtained with this condition The luminous efficiency of pipe is preferable.
Illustratively, the thickness of InGaN well layer 51 can be 2~3nm, and the thickness of GaN barrier layer 52 can be 9~20nm, obtain Light emitting diode luminous efficiency it is preferable.
Optionally, the thickness of low temperature p-type GaN layer 8 can be 50~100nm.The setting of low temperature p-type GaN layer is in active layer 5 and electricity It between sub- barrier layer 9, can play the role of providing hole, be conducive to increase the number of cavities entered in active layer 5, improve and shine The luminous efficiency of diode.And p-type GaN layer with a thickness of range above when, to the promotion of the luminous efficiency of light emitting diode compared with Greatly.
Optionally, electronic barrier layer 9 can be p-type AlyGa1-yN layers, wherein 0.1 < y < 0.5.Electronic barrier layer is p-type AlyGa1-yN layers can effectively play blocking electronics and enter the effect of p-type GaN layer, and can provide partial holes, improve luminous two The luminous efficiency of pole pipe.
P-type AlyGa1-yN layers of thickness can be 20-100nm.
Illustratively, the thickness of p-type GaN layer 6 can be 50-100nm.
The thickness of p-type contact layer 10 can be 10~50nm.
Fig. 3 is a kind of preparation method flow chart of LED epitaxial slice provided in an embodiment of the present invention, such as Fig. 3 institute Show, which includes:
S101: a substrate is provided.
S102: N-type GaN layer is grown on substrate.
S103: the growing low temperature N-type GaN layer in N-type GaN layer.
S104: superlattice structure is grown in low temperature N-type GaN layer.
Wherein, superlattice structure includes alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer, wherein GaN Doped with Si element in layer, the growth temperature of low temperature N-type GaN layer is 800~900 DEG C.
S105: active layer is grown on superlattice structure.
S106: the growth P-type GaN layer on active layer.
Execute the step visible Fig. 1 of epitaxial slice structure after S106.
Setting low temperature N-type GaN layer is successively increased between N-type GaN layer and active layer and including alternately stacked aluminum gallium nitride Superlattice structure and N-type can be achieved in the setting of the superlattice structure of sublayer, indium gallium nitrogen sublayer and GaN sublayer, low temperature N-type GaN layer Good transition between GaN layer guarantees the quality of the superlattice structure grown in N-type GaN layer, avoids going out in superlattice structure The now active layer of excessive defect and then influence subsequent growth, and alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen in superlattice structure Sublayer and GaN sublayer can play the role of discharge epitaxial layer in stress, improve epitaxial layer entirety crystal quality, and due to Differences between lattice constant between aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer three is larger, therefore the interface between three can Dislocation is stopped, in the active layer after avoiding dislocation from being moved to superlattice structure, ensure that the crystal quality of active layer.
And since the potential barrier of indium gallium nitrogen sublayer is lower than GaN sublayer, the potential barrier of GaN sublayer is lower than the gesture of aluminum gallium nitride sublayer It builds, electronics can be accumulated at indium gallium nitrogen sublayer, and the cooperation higher aluminum gallium nitride sublayer of potential barrier stops electronics, may make electronics Good extension is obtained before entering active layer, while can be used as electronics doped with the GaN sublayer of Si element and source is provided, and is guaranteed The quantity for increasing the electronics entered in active layer while current expansion, can be improved the luminous efficiency of light emitting diode and improves hair The Luminescence Uniformity of optical diode.
Fig. 4 is the preparation method flow chart of another LED epitaxial slice provided in an embodiment of the present invention, such as Fig. 4 institute Show, which includes:
S201: a substrate is provided.
Wherein, substrate can be Sapphire Substrate.
S202: grown buffer layer on substrate.
Optionally, buffer layer may include the AlN layer successively grown on substrate and layer of undoped gan.
The AlN layers of method that magnetron sputtering can be used deposit on the surface of substrate, and the quality of obtained AlN layer is preferable.
Illustratively, AlN layers of depositing temperature can be 400~800 DEG C, AlN layer deposition when sputtering power can be 3000 Pressure when~5000W, AlN layers of deposition can be 4~6torr.The quality of the AlN layer obtained in the above conditions is preferable, favorably In the total quality for guaranteeing epitaxial wafer.
Optionally, the growth temperature of layer of undoped gan can be 1000~1100 DEG C, and the growth pressure of layer of undoped gan can For 100~500Torr, the quality of the layer of undoped gan grown with this condition is preferable.
The growth thickness of layer of undoped gan can be 1~5 μm.
S203: N-type GaN layer is grown on the buffer layer.
Wherein, the growth thickness of N-type GaN layer can be 1~5 μm.
The growth temperature of N-type GaN layer can be 1000~1200 DEG C, the growth pressure of N-type GaN layer can for 100~ 500Torr。
S204: the growing low temperature N-type GaN layer in N-type GaN layer.
Wherein, the growth thickness of low temperature N-type GaN layer can be 30~80nm.The growth temperature of low temperature N-type GaN layer can be 800 ~900 DEG C, the low temperature N-type GaN layer grown with this condition can more efficiently improve the whole matter of light emitting diode Amount, advantageously ensures that the luminous efficiency of light emitting diode.
Wherein, when the growth thickness of low temperature N-type GaN layer is 50nm, the luminous efficiency of light emitting diode can preferably be promoted.
Optionally, the growth pressure of low temperature N-type GaN layer is 100~300Torr, the low temperature N grown with this condition Type GaN layer can more efficiently improve the total quality of light emitting diode, advantageously ensure that the luminous efficiency of light emitting diode.
S205: superlattice structure is grown in low temperature N-type GaN layer.
Wherein, superlattice structure includes alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer, wherein GaN Doped with Si element in layer.
Wherein, the growth temperature of superlattice structure is 800~900 DEG C.The superlattice structure grown with this condition Quality it is preferable, the luminous efficiency of light emitting diode can be effectively improved.
Illustratively, the growth pressure of superlattice structure is 50~300Torr.The superlattices grown with this condition The quality of structure is preferable, can effectively improve the luminous efficiency of light emitting diode.
Optionally, the growth thickness of the growth thickness of aluminum gallium nitride sublayer, the growth thickness of indium gallium nitrogen sublayer and GaN sublayer is equal It can be 5~15nm.
S206: active layer is grown on superlattice structure.
Active layer may include the InGaN well layer and GaN barrier layer stacked gradually.
Illustratively, the growth thickness of InGaN well layer can be 2~3nm, and the growth thickness of GaN barrier layer can be 9~20nm, The luminous efficiency of obtained light emitting diode is preferable.
Optionally, the growth temperature of InGaN well layer can be 720~830 DEG C, the growth temperature of GaN barrier layer can for 850~ 960 DEG C, the quality of the active layer grown with this condition is preferable, can guarantee the luminous efficiency of light emitting diode.
Further, the growth pressure of InGaN well layer and the growth pressure of GaN barrier layer can be 100~500Torr, The quality of the active layer grown under this condition is preferable, can guarantee the luminous efficiency of light emitting diode.
S207: the growing low temperature p-type GaN layer on active layer.
Optionally, the growth thickness of low temperature p-type GaN layer can be 50~100nm.
The growth temperature of low temperature p-type GaN layer can be 600~800 DEG C, the growth pressure of low temperature p-type GaN layer can for 200~ 500Torr.The quality of the low temperature p-type GaN layer grown with this condition is preferable, is conducive to improve shining for light emitting diode Efficiency.
S208: electronic barrier layer is grown in low temperature p-type GaN layer.
P-type AlyGa1-yN layers of growth thickness can be 20~100nm.
P-type AlyGa1-yN layers of growth temperature can be 700~1000 DEG C, p-type AlyGa1-yN layers of growth pressure can be 100 ~500Torr.The p-type Al grown with this conditionyGa1-yN layers of quality is preferable, is conducive to improve light emitting diode Luminous efficiency.
S209: in electronic barrier layer growth P-type GaN layer.
Illustratively, the growth thickness of p-type GaN layer can be 50~100nm.
Optionally, the growth pressure of p-type GaN layer can be 200~600Torr, the growth temperature of p-type GaN layer can for 900~ 1000℃。
S210: the growing P-type contact layer in p-type GaN layer.
Wherein, the growth thickness of p-type contact layer can be 10~50nm.
Illustratively, the growth temperature of p-type contact layer can be 850~1000 DEG C, and the growth pressure of p-type contact layer can be 100~300torr.
Execute the step visible Fig. 2 of epitaxial slice structure after S210.
It should be noted that in embodiments of the present invention, the other structures in addition to AlN layers are all made of MOCVD (chemical gas Mutually depositing) method grows to obtain.It is high-purity using trimethyl (or triethyl group) gallium as gallium source in the growth course of above structure NH3As nitrogen source, trimethyl indium is as indium source, and for trimethyl aluminium as silicon source, n-type doping selects silane, and p-type doping selects two cyclopentadienyls Magnesium.
The above method may also include, after above-mentioned epitaxial structures growth, by MOCVD (chemical vapor deposition) process cavity Interior temperature reduces, and makes annealing treatment in nitrogen atmosphere to epitaxial wafer, and annealing temperature section is 650~850 DEG C, annealing 5~15 minutes, near room temperature terminated epitaxial growth.Annealing can further remove the defects of epitaxial wafer, be conducive to improve luminous The luminous efficiency of diode.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.

Claims (10)

1. a kind of LED epitaxial slice, which is characterized in that the epitaxial wafer includes substrate and is sequentially laminated on the substrate On N-type GaN layer, low temperature N-type GaN layer, superlattice structure, active layer and p-type GaN layer,
The superlattice structure includes alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer, wherein in GaN sublayer Doped with Si element.
2. epitaxial wafer according to claim 1, which is characterized in that the aluminum gallium nitride sublayer is AlXGa1-XN layers, the indium Gallium nitrogen sublayer is InZGa1-ZN layers, wherein 0 < X <, 1,0.1 < Z < 0.5.
3. epitaxial wafer according to claim 2, which is characterized in that 0.1 < X <, 0.4,0.1 < Z < 0.3.
4. described in any item epitaxial wafers according to claim 1~3, which is characterized in that the thickness of the aluminum gallium nitride sublayer, described The thickness of indium gallium nitrogen sublayer and the thickness of the GaN sublayer are 5~15nm.
5. described in any item epitaxial wafers according to claim 1~3, which is characterized in that the number of plies of the aluminum gallium nitride sublayer, described The number of plies of indium gallium nitrogen sublayer and the number of plies of the GaN sublayer are 5~20.
6. described in any item epitaxial wafers according to claim 1~3, which is characterized in that the doping of Si element in the GaN sublayer Concentration is 1 × 1017~1 × 1018cm-3。
7. described in any item epitaxial wafers according to claim 1~3, which is characterized in that the low temperature N-type GaN layer with a thickness of 30~80nm.
8. a kind of preparation method of LED epitaxial slice, which is characterized in that the preparation method includes:
One substrate is provided；
N-type GaN layer is grown over the substrate；
The growing low temperature N-type GaN layer in the N-type GaN layer；
Superlattice structure is grown in the low temperature N-type GaN layer；
Active layer is grown on the superlattice structure；
Growth P-type GaN layer on the active layer,
Wherein, the superlattice structure includes alternately stacked aluminum gallium nitride sublayer, indium gallium nitrogen sublayer and GaN sublayer, wherein GaN Doped with Si element in layer.
9. preparation method according to claim 8, which is characterized in that the growth temperature of the superlattice structure be 800~ 900℃。
10. preparation method according to claim 8, which is characterized in that the growth pressure of the superlattice structure be 50~ 300Torr。
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CN110265514A (en) * 2019-04-28 2019-09-20 华灿光电(苏州）有限公司 The growing method and LED epitaxial slice of LED epitaxial slice
CN112951955A (en) * 2021-01-26 2021-06-11 华灿光电（浙江）有限公司 Ultraviolet light-emitting diode epitaxial wafer and preparation method thereof

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