CN106601882A - Epitaxial wafer of light emitting diode and manufacturing method thereof - Google Patents
Epitaxial wafer of light emitting diode and manufacturing method thereof Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 24
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 26
- 239000010980 sapphire Substances 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 230000006872 improvement Effects 0.000 claims abstract description 22
- 239000000470 constituent Substances 0.000 claims description 42
- 238000000034 method Methods 0.000 claims description 24
- 239000004575 stone Substances 0.000 claims description 2
- 230000007547 defect Effects 0.000 abstract description 8
- 239000013078 crystal Substances 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 230000006911 nucleation Effects 0.000 abstract 1
- 238000010899 nucleation Methods 0.000 abstract 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 239000002019 doping agent Substances 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 241001062009 Indigofera Species 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000010437 gem Substances 0.000 description 1
- 229910001751 gemstone Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses an epitaxial wafer of a light-emitting diode and a manufacturing method thereof, belonging to the technical field of semiconductors. The epitaxial wafer comprises a sapphire substrate, and a buffer layer, a nucleation layer, an undoped GaN layer, an N-type layer, an active layer and a P-type layer which are sequentially stacked on the sapphire substrate, and further comprises an improvement layer, wherein the improvement layer comprises an SiN layer and a GaN layer which are alternately stacked, and the improvement layer is arranged between the undoped GaN layer and the N-type layer or between the N-type layer and the active layer. According to the invention, the improvement layer is arranged between the undoped GaN layer and the N-type layer or between the N-type layer and the active layer, the improvement layer comprises the SiN layer and the GaN layer which are alternately stacked, and the SiN layer and the GaN layer which are alternately stacked are in a superlattice structure, so that the stress can be effectively released, the defects of the active layer are reduced, the crystal quality is improved, the performance and the reliability of the epitaxial wafer are further improved, and the reverse voltage of the chip manufactured by the epitaxial wafer is improved.
Description
Technical field
The present invention relates to technical field of semiconductors, the epitaxial wafer and its manufacture method of more particularly to a kind of light emitting diode.
Background technology
Light emitting diode (English：Light Emitting Diode, referred to as：LED) it is a kind of luminous semi-conductor electricity of energy
Subcomponent, is widely used in the technical fields such as display lamp, display screen, illumination.
Epitaxial wafer is the raw material of the chip growth inside LED, generally includes Sapphire Substrate and is sequentially laminated on indigo plant
Cushion, layer of undoped gan, N-type GaN layer on gem substrate, active layer, p-type GaN layer.
During the present invention is realized, inventor has found that prior art at least has problems with：
There is lattice mismatch between GaN and sapphire, the stress of generation is excessive to cause defect, stacking of the defect along epitaxial wafer
Direction extends to active layer, even p-type GaN layer, affects the function and reliability of device.
The content of the invention
In order to solve problem of the prior art, a kind of epitaxial wafer and its system of light emitting diode is embodiments provided
Make method.The technical scheme is as follows：
In a first aspect, embodiments providing a kind of epitaxial wafer of light emitting diode, the epitaxial wafer includes blue precious
It is stone lining bottom and the cushion being sequentially laminated in the Sapphire Substrate, nucleating layer, layer of undoped gan, N-type layer, active
Layer, P-type layer, the epitaxial wafer also includes improving layer, and the improvement layer includes alternately laminated SiN layer and GaN layer, the improvement
Layer is arranged between the layer of undoped gan and the N-type layer or is arranged between the N-type layer and the active layer.
Alternatively, it is described improve layer include stack gradually first improve sublayer, second improve sublayer, the 3rd improve son
Layer, described first improve sublayer, described second improve sublayer, the described 3rd improve sublayer include alternately laminated SiN layer and
GaN layer, described first improves in the SiN layer in sublayer Si constituent contents higher than Si in second SiN layer improved in sublayer
Constituent content, described second improves Si constituent contents in the SiN layer in sublayer is less than in the 3rd SiN layer improved in sublayer
Si constituent contents.
Preferably, described first improve in sublayer, described second improve in sublayer, the 3rd SiN improved in sublayer
The number of plies of layer is more than three layers, and described first improves in sublayer, described second improves in sublayer, the described 3rd improves in sublayer
The number of plies of GaN layer be more than three layers.
Alternatively, the thickness for improving layer is more than 200 angstroms.
Second aspect, embodiments provides a kind of manufacture method of the epitaxial wafer of light emitting diode, the manufacture
Method includes：
One Sapphire Substrate is provided；
In the Sapphire Substrate successively grown buffer layer, nucleating layer, layer of undoped gan, improve layer, N-type layer, active
Layer, P-type layer；
Wherein, the layer that improves is including alternately laminated SiN layer and GaN layer.
Alternatively, it is described improve layer include stack gradually first improve sublayer, second improve sublayer, the 3rd improve son
Layer, described first improve sublayer, described second improve sublayer, the described 3rd improve sublayer include alternately laminated SiN layer and
GaN layer, described first improves in the SiN layer in sublayer Si constituent contents higher than Si in second SiN layer improved in sublayer
Constituent content, described second improves Si constituent contents in the SiN layer in sublayer is less than in the 3rd SiN layer improved in sublayer
Si constituent contents.
Alternatively, the growth temperature for improving layer is more than 1000 DEG C.
The third aspect, embodiments provides a kind of manufacture method of the epitaxial wafer of light emitting diode, the manufacture
Method includes：
One Sapphire Substrate is provided；
In the Sapphire Substrate successively grown buffer layer, nucleating layer, layer of undoped gan, N-type layer, improve layer, active
Layer, P-type layer；
Wherein, the layer that improves is including alternately laminated SiN layer and GaN layer.
Alternatively, it is described improve layer include stack gradually first improve sublayer, second improve sublayer, the 3rd improve son
Layer, described first improve sublayer, described second improve sublayer, the described 3rd improve sublayer include alternately laminated SiN layer and
GaN layer, described first improves in the SiN layer in sublayer Si constituent contents higher than Si in second SiN layer improved in sublayer
Constituent content, described second improves Si constituent contents in the SiN layer in sublayer is less than in the 3rd SiN layer improved in sublayer
Si constituent contents.
Alternatively, the growth temperature for improving layer is more than 1000 DEG C.
The beneficial effect that technical scheme provided in an embodiment of the present invention is brought is：
Improve layer by arranging between layer of undoped gan and N-type layer or between N-type layer and active layer, improve layer
Including alternately laminated SiN layer and GaN layer, alternately laminated SiN layer and GaN layer is superlattice structure, can effectively be discharged
Stress, so as to reduce the defect of active layer, raising crystal mass, and then improves the Performance And Reliability of epitaxial wafer, improves extension
The backward voltage of chip manufactured by piece.Form superlattice structure simultaneously wherein one layer is the pure GaN not adulterated, with extension
The lattice match of piece this body structure is good, and the setting for improving layer does not result in extra lattice mismatch.And formation superlattices knot
Other one layer of structure is SiN layer, positioned at improving Si constituent contents in the SiN layer in the middle of layer less than the SiN positioned at top and bottom
Si constituent contents in layer, are conducive to current expansion, improve the electron amount of injection active layer, lift the luminous efficiency of LED.
Description of the drawings
Technical scheme in order to be illustrated more clearly that the embodiment of the present invention, below will be to making needed for embodiment description
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, can be obtaining other according to these accompanying drawings
Accompanying drawing.
Fig. 1 is a kind of structural representation of the epitaxial wafer of light emitting diode that the embodiment of the present invention one is provided；
Fig. 2 is the structural representation for improving layer that the embodiment of the present invention one is provided；
Fig. 3 is that a kind of flow process of the manufacture method of the epitaxial wafer of light emitting diode that the embodiment of the present invention two is provided is illustrated
Figure；
Fig. 4 is the structural representation of the epitaxial wafer of another kind of light emitting diode that the embodiment of the present invention three is provided；
Fig. 5 is that the flow process of the manufacture method of the epitaxial wafer of another kind of light emitting diode that the embodiment of the present invention four is provided is illustrated
Figure.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
A kind of epitaxial wafer of light emitting diode is embodiments provided, referring to Fig. 1, the epitaxial wafer is served as a contrast including sapphire
Bottom 1 and stack gradually cushion 2 on a sapphire substrate, nucleating layer 3, layer of undoped gan 4, improve layer 10, N-type layer 5,
Active layer 6, P-type layer 7.
In the present embodiment, referring to Fig. 2, improving layer 10 can include alternately laminated SiN layer 10a and GaN layer 10b.
Alternatively, improve layer can include stack gradually first improve sublayer, second improve sublayer, the 3rd improve son
Layer, first improve sublayer, second improve sublayer, the 3rd improve sublayer include alternately laminated SiN layer and GaN layer, first changes
Si constituent contents improve Si constituent contents in the SiN layer in sublayer higher than second in SiN layer in kind sublayer, and second improves sublayer
In SiN layer in Si constituent contents improve in sublayer less than the 3rd SiN layer in Si constituent contents.
Preferably, first improve in sublayer, second improve in sublayer, the 3rd number of plies for improving SiN layer in sublayer can be with
It is more than three layers, first improves in sublayer, second improves in sublayer, the 3rd number of plies for improving the GaN layer in sublayer can be equal
For more than three layers.
Alternatively, the thickness for improving layer can be more than 200 angstroms, the excessively thin effect that can not reach release stress.
Preferably, the thickness for improving layer can be 20～50nm.
Specifically, cushion can be the GaN layer of two-dimensional growth, and thickness is 15～30nm；Nucleating layer can be three-dimensional raw
Long GaN layer, thickness is 200～500nm；Layer of undoped gan is the GaN layer of two-dimensional growth, and thickness is 50～500nm；N-type layer
For the GaN layer of n-type doping, thickness is 3～4 μm；Active layer includes alternately laminated InGaN quantum well layers and GaN quantum barrier layers,
Thickness is 400～500nm；P-type layer is the GaN layer of p-type doping, and thickness is 50～800nm.
The embodiment of the present invention improves layer by arranging between layer of undoped gan and N-type layer, improves layer including alternately laminated
SiN layer and GaN layer, alternately laminated SiN layer and GaN layer are superlattice structure, stress can be effectively discharged, so as to reduce
The defect of active layer, raising crystal mass, and then improve the Performance And Reliability of epitaxial wafer, improve chip manufactured by epitaxial wafer
Backward voltage.Form superlattice structure simultaneously wherein one layer is the pure GaN not adulterated, the crystalline substance with this body structure of epitaxial wafer
Lattice matching degree is good, and the setting for improving layer does not result in extra lattice mismatch.And other a layer of formation superlattice structure is
SiN layer, positioned at Si constituent contents in the SiN layer in the middle of layer are improved the Si constituent contents in the SiN layer of top and bottom are less than,
Be conducive to current expansion, improve the electron amount of injection active layer, lift the luminous efficiency of LED.
Embodiment two
Embodiments provide a kind of manufacture method of the epitaxial wafer of light emitting diode, it is adaptable to manufacture embodiment one
The epitaxial wafer of offer.Using trimethyl gallium or trimethyl second as gallium source when realizing, high-purity N H3 is used as nitrogen source, trimethyl indium conduct
Indium source, used as silicon source, N type dopant selects silane to trimethyl aluminium, and P-type dopant is from two luxuriant magnesium.
Specifically, referring to Fig. 3, the manufacture method includes：
Step 201：One Sapphire Substrate is provided.
In implementing, can be first by Sapphire Substrate in metallo-organic compound chemical gaseous phase deposition (English：
Meta1Organic Chemical Vapor Deposition, referred to as：MOCVD) 1060 DEG C are heated in reaction chamber, then in hydrogen
Sapphire Substrate is made annealing treatment in gas atmosphere, finally carries out nitrogen treatment 10 minutes, to clean substrate surface.
Step 202：Grown buffer layer on a sapphire substrate.
Specifically, cushion can be the GaN layer of two-dimensional growth, and thickness is 15～30nm, and growth temperature is 500～650
DEG C, growth pressure is 300～760torr, and V/III ratios are 500～3000.
Wherein, V/III ratios are the mol ratio of V valencys atom and III valency atoms.
Step 203：Nucleating layer is grown on the buffer layer.
Specifically, nucleating layer can be three dimensional growth GaN layer, thickness be 200～500nm, growth temperature be 1000～
1100 DEG C, growth pressure is 400～600torr, and V/III ratios are 300～1000.
Step 204：Layer of undoped gan is grown on nucleating layer.
Specifically, layer of undoped gan for two-dimensional growth GaN layer, thickness be 50～500nm, growth temperature be 1000～
1200 DEG C, growth pressure is 30～500torr, and V/III ratios are 300～3000.
Step 205：The growth in layer of undoped gan improves layer.
In the present embodiment, layer is improved including alternately laminated SiN layer and GaN layer.
Alternatively, improve layer can include stack gradually first improve sublayer, second improve sublayer, the 3rd improve son
Layer, first improve sublayer, second improve sublayer, the 3rd improve sublayer include alternately laminated SiN layer and GaN layer, first changes
Si constituent contents improve Si constituent contents in the SiN layer in sublayer higher than second in SiN layer in kind sublayer, and second improves sublayer
In SiN layer in Si constituent contents improve in sublayer less than the 3rd SiN layer in Si constituent contents.
Preferably, first improve in sublayer, second improve in sublayer, the 3rd number of plies for improving SiN layer in sublayer can be with
It is more than three layers, first improves in sublayer, second improves in sublayer, the 3rd number of plies for improving the GaN layer in sublayer can be equal
For more than three layers.
Alternatively, the thickness for improving layer can be more than 200 angstroms, the excessively thin effect that can not reach release stress.
Preferably, the thickness for improving layer can be 20～50nm.
Alternatively, the growth temperature for improving layer can be more than 1000 DEG C.Using high growth temperature, improve the crystal mass of layer
It is higher.
Preferably, growth temperature can be 1000～1200 DEG C.
Alternatively, growth pressure can be 50～760torr.
Alternatively, V/III ratios can be 300～3000.
Step 206：N-type layer is grown on layer is improved.
Specifically, N-type layer is the GaN layer of n-type doping, and thickness is 3～4 μm, and growth temperature is 1000～1200 DEG C, growth
Pressure is 50～760torr, and V/III ratios are 300～3000.
Step 207：Active layer is grown in N-type layer.
Specifically, active layer include alternately laminated InGaN quantum well layers and GaN quantum barrier layers, thickness be 400～
500nm, growth temperature is 720～820 DEG C, and growth pressure is 200～400torr, and V/III ratios are 300～5000.
Step 208：The growing P-type layer on active layer.
Specifically, P-type layer is the GaN layer of p-type doping, and thickness is 50～800nm, and growth temperature is 850～1050 DEG C, raw
Long pressure is 100～760torr, and V/III ratios are 1000～20000.
In actual applications, after P-type layer growth is completed, first the temperature of reaction chamber is down to into 650～850 DEG C, pure
Make annealing treatment 5～15 minutes in nitrogen atmosphere；Again the temperature of reaction chamber is down to into room temperature, terminates the growth of epitaxial wafer；It is finally right
The semiconducter process such as the epitaxial wafer of growth is cleaned, deposited, photoetching and etching, make single size for 10*
The LED chip of 16mi1.
The embodiment of the present invention improves layer by arranging between layer of undoped gan and N-type layer, improves layer including alternately laminated
SiN layer and GaN layer, alternately laminated SiN layer and GaN layer are superlattice structure, stress can be effectively discharged, so as to reduce
The defect of active layer, raising crystal mass, and then improve the Performance And Reliability of epitaxial wafer, improve chip manufactured by epitaxial wafer
Backward voltage.Form superlattice structure simultaneously wherein one layer is the pure GaN not adulterated, the crystalline substance with this body structure of epitaxial wafer
Lattice matching degree is good, and the setting for improving layer does not result in extra lattice mismatch.And other a layer of formation superlattice structure is
SiN layer, positioned at Si constituent contents in the SiN layer in the middle of layer are improved the Si constituent contents in the SiN layer of top and bottom are less than,
Be conducive to current expansion, improve the electron amount of injection active layer, lift the luminous efficiency of LED.
Embodiment three
A kind of epitaxial wafer of light emitting diode is embodiments provided, referring to Fig. 4, the epitaxial wafer is served as a contrast including sapphire
Bottom 1 and stack gradually cushion 2 on a sapphire substrate, nucleating layer 3, layer of undoped gan 4, N-type layer 5, improve layer 10,
Active layer 6, P-type layer 7.
In the present embodiment, improving layer can be identical with the improvement layer that embodiment one is provided, and will not be described in detail herein.
Specifically, Sapphire Substrate can be identical with the Sapphire Substrate that embodiment one is provided, and cushion can be with enforcement
The cushion that example one is provided is identical, and nucleating layer can be identical with the nucleating layer that embodiment one is provided, and layer of undoped gan can be with reality
The layer of undoped gan for applying the offer of example one is identical, and N-type layer can be identical with the N-type layer that embodiment one is provided, and active layer can be with reality
The active layer for applying the offer of example one is identical, and P-type layer can be identical with the P-type layer that embodiment one is provided, and will not be described in detail herein.
The embodiment of the present invention improves layer including alternately laminated by improving layer in the setting between N-type layer and active layer
SiN layer and GaN layer, alternately laminated SiN layer and GaN layer is superlattice structure, stress can be effectively discharged, so as to reduce
The defect of active layer, raising crystal mass, and then improve the Performance And Reliability of epitaxial wafer, improve the anti-of chip manufactured by epitaxial wafer
To voltage.Form superlattice structure simultaneously wherein one layer is the pure GaN not adulterated, the lattice with this body structure of epitaxial wafer
Matching degree is good, and the setting for improving layer does not result in extra lattice mismatch.And it is SiN to form other one layer of superlattice structure
Layer, less than Si constituent contents in the SiN layer positioned at top and bottom, has positioned at Si constituent contents in the SiN layer in the middle of layer are improved
Beneficial to current expansion, the electron amount of injection active layer is improved, lift the luminous efficiency of LED.
Example IV
Embodiments provide a kind of manufacture method of the epitaxial wafer of light emitting diode, it is adaptable to manufacture embodiment three
The epitaxial wafer of offer.Using trimethyl gallium or trimethyl second as gallium source when realizing, high-purity N H3 is used as nitrogen source, trimethyl indium conduct
Indium source, used as silicon source, N type dopant selects silane to trimethyl aluminium, and P-type dopant is from two luxuriant magnesium.
Specifically, referring to Fig. 5, the manufacture method includes：
Step 401：One Sapphire Substrate is provided.
Alternatively, the step of step 401 can be provided with embodiment two 201 is identical, will not be described in detail herein.
Step 402：Grown buffer layer on a sapphire substrate.
Alternatively, the step of step 402 can be provided with embodiment two 202 is identical, will not be described in detail herein.
Step 403：Nucleating layer is grown on the buffer layer.
Alternatively, the step of step 403 can be provided with embodiment two 203 is identical, will not be described in detail herein.
Step 404：Layer of undoped gan is grown on nucleating layer.
Alternatively, the step of step 404 can be provided with embodiment two 204 is identical, will not be described in detail herein.
Step 405：N-type layer is grown in layer of undoped gan.
Alternatively, the step of step 405 can be provided with embodiment two 206 is identical, will not be described in detail herein.
Step 406：The growth in N-type layer improves layer.
Alternatively, the step of step 406 can be provided with embodiment two 205 is identical, will not be described in detail herein.
Step 407：Active layer is grown on layer is improved.
Alternatively, the step of step 407 can be provided with embodiment two 207 is identical, will not be described in detail herein.
Step 408：The growing P-type layer on active layer.
Alternatively, the step of step 408 can be provided with embodiment two 208 is identical, will not be described in detail herein.
The embodiment of the present invention improves layer including alternately laminated by improving layer in the setting between N-type layer and active layer
SiN layer and GaN layer, alternately laminated SiN layer and GaN layer is superlattice structure, stress can be effectively discharged, so as to reduce
The defect of active layer, raising crystal mass, and then improve the Performance And Reliability of epitaxial wafer, improve the anti-of chip manufactured by epitaxial wafer
To voltage.Form superlattice structure simultaneously wherein one layer is the pure GaN not adulterated, the lattice with this body structure of epitaxial wafer
Matching degree is good, and the setting for improving layer does not result in extra lattice mismatch.And it is SiN to form other one layer of superlattice structure
Layer, less than Si constituent contents in the SiN layer positioned at top and bottom, has positioned at Si constituent contents in the SiN layer in the middle of layer are improved
Beneficial to current expansion, the electron amount of injection active layer is improved, lift the luminous efficiency of LED.
The embodiments of the present invention are for illustration only, do not represent the quality of embodiment.
The foregoing is only presently preferred embodiments of the present invention, not to limit the present invention, all spirit in the present invention and
Within principle, any modification, equivalent substitution and improvements made etc. should be included within the scope of the present invention.
Claims (10)
1. a kind of epitaxial wafer of light emitting diode, the epitaxial wafer includes Sapphire Substrate and is sequentially laminated on described blue precious
Cushion, nucleating layer on stone lining bottom, layer of undoped gan, N-type layer, active layer, P-type layer, it is characterised in that the epitaxial wafer
Also include improving layer, the improvement layer includes alternately laminated SiN layer and GaN layer, and the improvement layer is arranged on the undoped p
Between GaN layer and the N-type layer or it is arranged between the N-type layer and the active layer.
2. epitaxial wafer according to claim 1, it is characterised in that the improvement layer includes the first improvement for stacking gradually
Layer, second improve sublayer, the 3rd improve sublayer, and described first improves sublayer, described second improve sublayer, the described 3rd improve son
Layer includes alternately laminated SiN layer and GaN layer, and described first improves in the SiN layer in sublayer Si constituent contents higher than described
Second improves Si constituent contents in the SiN layer in sublayer, and described second improves Si constituent contents in the SiN layer in sublayer is less than institute
State Si constituent contents in the 3rd SiN layer improved in sublayer.
3. epitaxial wafer according to claim 2, it is characterised in that described first improves in sublayer, described second improves son
In layer, the 3rd number of plies for improving the SiN layer in sublayer be more than three layers, described first improves in sublayer, described second
Improve in sublayer, the 3rd number of plies for improving the GaN layer in sublayer is more than three layers.
4. the epitaxial wafer according to any one of claims 1 to 3, it is characterised in that the thickness of the improvement layer be 200 angstroms with
On.
5. a kind of manufacture method of the epitaxial wafer of light emitting diode, it is characterised in that the manufacture method includes：
One Sapphire Substrate is provided；
In the Sapphire Substrate successively grown buffer layer, nucleating layer, layer of undoped gan, improve layer, N-type layer, active layer, P
Type layer；
Wherein, the layer that improves is including alternately laminated SiN layer and GaN layer.
6. manufacture method according to claim 5, it is characterised in that the improvement layer includes the first improvement for stacking gradually
Sublayer, second improve sublayer, the 3rd improve sublayer, and described first improves sublayer, described second improves sublayer, the 3rd improvement
Sublayer includes alternately laminated SiN layer and GaN layer, and described first to improve in the SiN layer in sublayer Si constituent contents be higher than institute
Si constituent contents in the second SiN layer improved in sublayer are stated, described second improves Si constituent contents in the SiN layer in sublayer is less than
Described 3rd improves Si constituent contents in the SiN layer in sublayer.
7. the manufacture method according to claim 5 or 6, it is characterised in that the growth temperature of the improvement layer is 1000 DEG C
More than.
8. a kind of manufacture method of the epitaxial wafer of light emitting diode, it is characterised in that the manufacture method includes：
One Sapphire Substrate is provided；
In the Sapphire Substrate successively grown buffer layer, nucleating layer, layer of undoped gan, N-type layer, improve layer, active layer, P
Type layer；
Wherein, the layer that improves is including alternately laminated SiN layer and GaN layer.
9. manufacture method according to claim 8, it is characterised in that the improvement layer includes the first improvement for stacking gradually
Sublayer, second improve sublayer, the 3rd improve sublayer, and described first improves sublayer, described second improves sublayer, the 3rd improvement
Sublayer includes alternately laminated SiN layer and GaN layer, and described first to improve in the SiN layer in sublayer Si constituent contents be higher than institute
Si constituent contents in the second SiN layer improved in sublayer are stated, described second improves Si constituent contents in the SiN layer in sublayer is less than
Described 3rd improves Si constituent contents in the SiN layer in sublayer.
10. manufacture method according to claim 8 or claim 9, it is characterised in that the growth temperature of the improvement layer is 1000 DEG C
More than.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106653971A (en) * | 2016-11-26 | 2017-05-10 | 华灿光电（浙江）有限公司 | Epitaxial wafer of GaN-based light emitting diode and growth method thereof |
| CN106784216A (en) * | 2016-11-26 | 2017-05-31 | 华灿光电（浙江）有限公司 | Epitaxial wafer of GaN-based light emitting diode and growth method thereof |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105350074A (en) * | 2015-11-03 | 2016-02-24 | 湘能华磊光电股份有限公司 | Epitaxial growth method for improving LED epitaxial crystal quality |
| CN105552186A (en) * | 2014-10-29 | 2016-05-04 | 南通同方半导体有限公司 | Blue LED epitaxial structure with suppression polarization effect barrier layer |
| CN106252480A (en) * | 2016-08-05 | 2016-12-21 | 华灿光电（浙江）有限公司 | Light emitting diode epitaxial wafer and growth method thereof |
-
2016
- 2016-11-21 CN CN201611039598.0A patent/CN106601882B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105552186A (en) * | 2014-10-29 | 2016-05-04 | 南通同方半导体有限公司 | Blue LED epitaxial structure with suppression polarization effect barrier layer |
| CN105350074A (en) * | 2015-11-03 | 2016-02-24 | 湘能华磊光电股份有限公司 | Epitaxial growth method for improving LED epitaxial crystal quality |
| CN106252480A (en) * | 2016-08-05 | 2016-12-21 | 华灿光电（浙江）有限公司 | Light emitting diode epitaxial wafer and growth method thereof |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106653971A (en) * | 2016-11-26 | 2017-05-10 | 华灿光电（浙江）有限公司 | Epitaxial wafer of GaN-based light emitting diode and growth method thereof |
| CN106784216A (en) * | 2016-11-26 | 2017-05-31 | 华灿光电（浙江）有限公司 | Epitaxial wafer of GaN-based light emitting diode and growth method thereof |
| CN106653971B (en) * | 2016-11-26 | 2018-10-12 | 华灿光电（浙江）有限公司 | Epitaxial wafer of GaN-based light emitting diode and growth method thereof |
| CN106784216B (en) * | 2016-11-26 | 2019-04-12 | 华灿光电（浙江）有限公司 | Epitaxial wafer of GaN-based light emitting diode and growth method thereof |
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| CN109638114A (en) * | 2018-10-16 | 2019-04-16 | 华灿光电(苏州）有限公司 | A kind of LED epitaxial slice and preparation method thereof |
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| CN112687773A (en) * | 2020-12-16 | 2021-04-20 | 华灿光电(苏州）有限公司 | Epitaxial wafer of ultraviolet light-emitting diode and preparation method thereof |
| CN112687773B (en) * | 2020-12-16 | 2022-04-12 | 华灿光电(苏州）有限公司 | Epitaxial wafer of ultraviolet light-emitting diode and preparation method thereof |
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