CN109638114B - Light emitting diode epitaxial wafer and preparation method thereof - Google Patents

Light emitting diode epitaxial wafer and preparation method thereof Download PDF

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CN109638114B
CN109638114B CN201811205142.6A CN201811205142A CN109638114B CN 109638114 B CN109638114 B CN 109638114B CN 201811205142 A CN201811205142 A CN 201811205142A CN 109638114 B CN109638114 B CN 109638114B
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type gan
sublayer
superlattice structure
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CN109638114A (en
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洪威威
王倩
韦春余
周飚
胡加辉
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HC Semitek Suzhou Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

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Abstract

The invention discloses a light-emitting diode epitaxial wafer and a preparation method thereof, belonging to the field of light-emitting diode manufacturing. The low-temperature N-type GaN layer and the superlattice structure are sequentially arranged between the N-type GaN layer and the active layer, the low-temperature N-type GaN layer can enable the superlattice structure and the N-type GaN layer to be in good transition, the quality of the superlattice structure growing on the N-type GaN layer is guaranteed, excessive defects in the superlattice structure are avoided, and the active layer which is grown subsequently is influenced, the aluminum gallium nitride sublayer, the indium gallium nitride sublayer and the GaN sublayer which are alternately stacked in the superlattice structure can play a role in releasing stress in the epitaxial layer, the overall crystal quality of the epitaxial layer is improved, and the lattice constant difference among the aluminum gallium nitride sublayer, the indium gallium nitride sublayer and the GaN sublayer is large, so that the interface among the aluminum gallium nitride sublayer, the indium gallium nitride sublayer and the GaN sublayer can block dislocation, the dislocation is prevented from moving to the active layer behind the superlattice structure, and the crystal quality of the active layer is guaranteed.

Description

Light emitting diode epitaxial wafer and preparation method thereof
Technical Field
The invention relates to the field of light emitting diode manufacturing, in particular to a light emitting diode epitaxial wafer and a preparation method thereof.
Background
The light emitting diode is a semiconductor diode capable of converting electric energy into light energy, has the advantages of small volume, long service life, low power consumption and the like, and is widely applied to automobile signal lamps, traffic signal lamps, display screens and lighting equipment at present. The epitaxial wafer is a basic structure for manufacturing the light emitting diode, the structure of the epitaxial wafer comprises a substrate and an epitaxial layer on the substrate, and the epitaxial layer comprises an N-type GaN layer, an active layer and a P-type GaN layer which are sequentially grown on the substrate.
However, in this structure, due to the larger lattice mismatch between the substrate and the epitaxial layer, the epitaxial layer may generate more defects when growing on the substrate, which affects the quality of the active layer in the epitaxial layer, and the poor quality of the active layer may affect the recombination efficiency of electrons and holes in the active layer, thereby resulting in the lower light emitting efficiency of the light emitting diode.
Disclosure of Invention
The embodiment of the invention provides a light-emitting diode epitaxial wafer and a preparation method thereof, which can improve the light-emitting efficiency of a light-emitting diode. The technical scheme is as follows:
the embodiment of the invention provides an epitaxial wafer of a light emitting diode, which comprises a substrate, and an N-type GaN layer, a low-temperature N-type GaN layer, a superlattice structure, an active layer and a P-type GaN layer which are sequentially stacked on the substrate,
the superlattice structure comprises aluminum gallium nitride sublayers, indium gallium nitride sublayers and GaN sublayers which are alternately stacked, wherein Si elements are doped in the GaN sublayers.
Optionally, the aluminum gallium nitrogen sublayer is AlXGa1-XN layer, the InGaN sublayer is InZGa1-ZAnd N layers, wherein X is more than 0 and less than 1, and Z is more than 0.1 and less than 0.5.
Alternatively, 0.1 < X < 0.4, 0.1 < Z < 0.3.
Optionally, the thickness of the aluminum gallium nitride sublayer, the thickness of the indium gallium nitride sublayer and the thickness of the GaN sublayer are all 5-15 nm.
Optionally, the number of the aluminum gallium nitride sublayers, the number of the indium gallium nitride sublayers and the number of the GaN sublayers are 5 to 20.
Optionally, the doping concentration of the Si element in the GaN sublayer is 1 × 1017～1×1018cm-3。
Optionally, the thickness of the low-temperature N-type GaN layer is 30-80 nm.
The embodiment of the invention provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
growing an N-type GaN layer on the substrate;
growing a low-temperature N-type GaN layer on the N-type GaN layer;
growing a superlattice structure on the low-temperature N-type GaN layer;
growing an active layer on the superlattice structure;
growing a P-type GaN layer on the active layer,
the superlattice structure comprises aluminum gallium nitride sublayers, indium gallium nitride sublayers and GaN sublayers which are alternately stacked, wherein Si elements are doped in the GaN sublayers.
Optionally, the growth temperature of the superlattice structure is 800-900 ℃.
Optionally, the growth pressure of the superlattice structure is 50-300 Torr.
The technical scheme provided by the embodiment of the invention has the following beneficial effects: the low-temperature N-type GaN layer and the superlattice structure comprising the alternately laminated AlGaN sublayer, InGaN sublayer and GaN sublayer are sequentially arranged between the N-type GaN layer and the active layer, the arrangement of the low-temperature N-type GaN layer can realize good transition between the superlattice structure and the N-type GaN layer, the quality of the superlattice structure grown on the N-type GaN layer is ensured, the active layer which influences the subsequent growth due to too many defects in the superlattice structure is avoided, the alternately laminated AlGaN sublayer, InGaN sublayer and GaN sublayer in the superlattice structure can play a role in releasing stress in the epitaxial layer, the overall crystal quality of the epitaxial layer is improved, and as the lattice constant difference among the AlGaN sublayer, InGaN sublayer and GaN sublayer is larger, the interface among the AlGaN sublayer, InGaN sublayer and GaN sublayer can block dislocation, and dislocation is prevented from moving to the active layer behind the superlattice structure, the crystal quality of the active layer is ensured, and the luminous efficiency of the light-emitting diode can be improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present invention;
fig. 4 is a flowchart of another method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention. As shown in fig. 1, the epitaxial wafer includes a substrate 1, and an N-type GaN layer 2, a low-temperature N-type GaN layer 3, a superlattice structure 4, an active layer 5, and a P-type GaN layer 6 stacked in this order on the substrate 1.
The superlattice structure 4 comprises aluminum gallium nitride sublayers 41, indium gallium nitride sublayers 42 and GaN sublayers 43 which are alternately stacked, wherein the GaN sublayers 43 are doped with Si element.
The low-temperature N-type GaN layer 3 and the superlattice structure 4 comprising the alternately laminated AlGaN sublayers 41, InGaN sublayers 42 and GaN sublayers 43 are sequentially added between the N-type GaN layer 2 and the active layer 5, the arrangement of the low-temperature N-type GaN layer 3 can ensure good transition between the superlattice structure 4 and the N-type GaN layer 2, ensure the quality of the superlattice structure 4 growing on the N-type GaN layer 3, avoid excessive defects in the superlattice structure 4 from affecting the active layer 5 growing subsequently, the alternately laminated AlGaN sublayers 41, InGaN sublayers 42 and GaN sublayers 43 in the superlattice structure 4 can play a role in releasing stress in an epitaxial layer, improve the integral crystal quality of the epitaxial layer, and because the lattice constant difference among the AlGaN sublayers 41, the InGaN sublayers 42 and the GaN sublayers 43 is large, the interfaces among the three can block dislocation, avoiding dislocations moving into the active layer 5 behind the superlattice structure 4 ensures the crystal quality of the active layer 5.
And because the potential barrier of the indium gallium nitride sublayer 42 is lower than that of the GaN sublayer 43, the potential barrier of the GaN sublayer 43 is lower than that of the aluminum gallium nitride sublayer 41, electrons can be accumulated at the indium gallium nitride sublayer 42, and the electrons can be blocked by matching with the aluminum gallium nitride sublayer 41 with higher potential barrier, so that the electrons can be well expanded before entering the active layer 5, meanwhile, the GaN sublayer 43 doped with the Si element can be used as an electron supply source, the number of the electrons entering the active layer 5 can be increased while the current expansion is ensured, and the light emitting efficiency of the light emitting diode can be improved, and the light emitting uniformity of the light emitting diode can be improved.
Fig. 2 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present invention, and as shown in fig. 2, the epitaxial wafer may include a substrate 1, and a buffer layer 7, an N-type GaN layer 2, a low-temperature N-type GaN layer 3, a superlattice structure 4, an active layer 5, a low-temperature P-type GaN layer 8, an electron blocking layer 9, a P-type GaN layer 6, and a P-type contact layer 10 sequentially stacked on the substrate 1.
Illustratively, the buffer layer 7 may include an AlN layer 71 and an undoped GaN layer 72 stacked in sequence, and the AlN layer 71 and the undoped GaN layer 72 may be disposed to reduce the influence of lattice mismatch between the substrate 1 and the entire epitaxial layer, which is beneficial to improving the quality of an epitaxial wafer of the light emitting diode, and thus, improving the light emitting efficiency of the light emitting diode.
Wherein, the AlN buffer layer 71 may have a thickness of 15 to 40 nm. The thickness of the undoped GaN layer 72 may be 1 to 5 μm.
Alternatively, the doping element in the N-type GaN layer 2 may be Si, the thickness of the N-type GaN layer 5 may be 1-5 μm, and the doping concentration of the Si element may be 1 × 1018～1×1019cm-3The quality of the N-type GaN layer 2 obtained under the condition is better, and the quality of an epitaxial wafer of the light-emitting diode can be ensured.
Illustratively, the thickness of the low-temperature N-type GaN layer 3 may be 30-80 nm. When the thickness of the low-temperature N-type GaN layer is within the range, the quality of an epitaxial film grown on the low-temperature N-type GaN layer is better, and the effect of releasing stress of a superlattice structure grown on the low-temperature N-type GaN layer is better.
Optionally, the aluminum gallium nitrogen sublayer 41 in the superlattice structure 4 is AlXGa1-XN layer with sub-layer 42 of indium gallium nitride InZGa1-ZAnd N layers, wherein X is more than 0 and less than 1, and Z is more than 0.1 and less than 0.5. Al (Al)XGa1-XN layer and InZGa1-ZX and Z in the N layer are respectively in the range above to ensure the quality of the superlattice structure and ensure the superlatticeThe structure effectively plays a role in current expansion and improves the luminous efficiency of the light-emitting diode.
Furthermore, X is more than 0.1 and less than 0.4, and Z is more than 0.1 and less than 0.3. Under the condition, the luminous efficiency of the light-emitting diode can be improved greatly.
Preferably, the luminous efficiency of the light emitting diode can be effectively improved when x is 0.3 and z is 0.25.
Optionally, the thickness of the aluminum gallium nitride sublayer 41, the thickness of the indium gallium nitride sublayer 42, and the thickness of the GaN sublayer 43 are all 5-15 nm. When the thickness of the aluminum gallium nitride sublayer 41, the thickness of the indium gallium nitride sublayer 42 and the thickness of the GaN sublayer 43 are all in the above ranges, the superlattice structure greatly improves the light emitting efficiency of the light emitting diode.
Illustratively, the number of AlGaN sublayers 41, the number of InGaN sublayers 42, and the number of GaN sublayers 43 is 5 to 20. The superlattice structure greatly improves the luminous efficiency of the light-emitting diode.
Optionally, the doping concentration of the Si element in the GaN sublayer 43 is 1 × 1017～1×1018cm-3. When the doping concentration of the Si element in the GaN sublayer 43 is in the above range, the improvement of the light emitting efficiency of the light emitting diode is better.
Alternatively, the active layer 5 may be a multiple quantum well layer, and the active layer 5 may include an InGaN well layer 51 and a GaN barrier layer 52 that are sequentially stacked.
The number of layers of the InGaN well layer 51 and the GaN barrier layer 52 can be 5-11. The light emitting diode obtained under the condition has better luminous efficiency.
Illustratively, the thickness of the InGaN well layer 51 can be 2-3 nm, the thickness of the GaN barrier layer 52 can be 9-20 nm, and the light emitting efficiency of the obtained light emitting diode is good.
Optionally, the thickness of the low-temperature P-type GaN layer 8 can be 50-100 nm. The low-temperature P-type GaN layer is arranged between the active layer 5 and the electron blocking layer 9, can play a role in providing holes, is beneficial to increasing the number of the holes entering the active layer 5, and improves the light emitting efficiency of the light emitting diode. And when the thickness of the P-type GaN layer is in the range, the luminous efficiency of the light-emitting diode is greatly improved.
OptionallyThe electron blocking layer 9 may be p-type AlyGa1-yN layer of which 0.1<y<0.5. The electron blocking layer is p-type AlyGa1-yThe N layer can effectively play a role in blocking electrons from entering the P-type GaN layer, and can provide partial holes, so that the luminous efficiency of the light-emitting diode is improved.
p type AlyGa1-yThe thickness of the N layer may be 20-100 nm.
Illustratively, the thickness of the P-type GaN layer 6 may be 50-100 nm.
The thickness of the P-type contact layer 10 can be 10-50 nm.
Fig. 3 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the present invention, and as shown in fig. 3, the method includes:
s101: a substrate is provided.
S102: and growing an N-type GaN layer on the substrate.
S103: and growing a low-temperature N-type GaN layer on the N-type GaN layer.
S104: and growing a superlattice structure on the low-temperature N-type GaN layer.
The superlattice structure comprises aluminum gallium nitride sublayers, indium gallium nitride sublayers and GaN sublayers which are alternately stacked, wherein Si elements are doped in the GaN sublayers, and the growth temperature of the low-temperature N-type GaN layer is 800-900 ℃.
S105: an active layer is grown on the superlattice structure.
S106: and growing a P-type GaN layer on the active layer.
The epitaxial wafer structure after step S106 is performed can be seen in fig. 1.
The low-temperature N-type GaN layer and the superlattice structure comprising the alternately laminated AlGaN sublayer, InGaN sublayer and GaN sublayer are sequentially arranged between the N-type GaN layer and the active layer, the arrangement of the low-temperature N-type GaN layer can realize good transition between the superlattice structure and the N-type GaN layer, the quality of the superlattice structure grown on the N-type GaN layer is ensured, the active layer which influences the subsequent growth due to too many defects in the superlattice structure is avoided, the alternately laminated AlGaN sublayer, InGaN sublayer and GaN sublayer in the superlattice structure can play a role in releasing stress in the epitaxial layer, the overall crystal quality of the epitaxial layer is improved, and as the lattice constant difference among the AlGaN sublayer, InGaN sublayer and GaN sublayer is larger, the interface among the AlGaN sublayer, InGaN sublayer and GaN sublayer can block dislocation, and dislocation is prevented from moving to the active layer behind the superlattice structure, the crystal quality of the active layer is ensured.
And because the potential barrier of the InGaN sublayer is lower than that of the GaN sublayer, the potential barrier of the GaN sublayer is lower than that of the AlGaN sublayer, electrons can be accumulated at the InGaN sublayer, and the electrons are blocked by matching with the AlGaN sublayer with a higher potential barrier, so that the electrons can be well expanded before entering the active layer, meanwhile, the GaN sublayer doped with Si element can be used as an electron supply source, the number of the electrons entering the active layer is increased while the current expansion is ensured, and the light emitting efficiency and the light emitting uniformity of the light emitting diode can be improved.
Fig. 4 is a flowchart of another method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present invention, as shown in fig. 4, the method includes:
s201: a substrate is provided.
Wherein the substrate may be a sapphire substrate.
S202: a buffer layer is grown on a substrate.
Alternatively, the buffer layer may include an AlN layer and an undoped GaN layer sequentially grown on the substrate.
The AlN layer can be deposited on the surface of the substrate by adopting a magnetron sputtering method, and the obtained AlN layer has better quality.
Illustratively, the deposition temperature of the AlN layer may be 400-800 ℃, the sputtering power of the AlN layer during deposition may be 3000-5000W, and the pressure of the AlN layer during deposition may be 4-6 torr. The AlN layer obtained under the conditions has better quality, and is beneficial to ensuring the integral quality of the epitaxial wafer.
Optionally, the growth temperature of the undoped GaN layer can be 1000-1100 ℃, the growth pressure of the undoped GaN layer can be 100-500 Torr, and the quality of the undoped GaN layer grown under the condition is better.
The growth thickness of the undoped GaN layer can be 1-5 μm.
S203: and growing an N-type GaN layer on the buffer layer.
Wherein the growth thickness of the N-type GaN layer can be 1-5 μm.
The growth temperature of the N-type GaN layer can be 1000-1200 ℃, and the growth pressure of the N-type GaN layer can be 100-500 Torr.
S204: and growing a low-temperature N-type GaN layer on the N-type GaN layer.
Wherein the growth thickness of the low-temperature N-type GaN layer can be 30-80 nm. The growth temperature of the low-temperature N-type GaN layer can be 800-900 ℃, and the low-temperature N-type GaN layer grown under the condition can effectively improve the overall quality of the light-emitting diode and is beneficial to ensuring the light-emitting efficiency of the light-emitting diode.
When the growth thickness of the low-temperature N-type GaN layer is 50nm, the luminous efficiency of the light-emitting diode can be improved well.
Optionally, the growth pressure of the low-temperature N-type GaN layer is 100-300 Torr, and the low-temperature N-type GaN layer grown under the condition can effectively improve the overall quality of the light-emitting diode and is beneficial to ensuring the light-emitting efficiency of the light-emitting diode.
S205: and growing a superlattice structure on the low-temperature N-type GaN layer.
The superlattice structure comprises aluminum gallium nitride sublayers, indium gallium nitride sublayers and GaN sublayers which are alternately stacked, wherein Si elements are doped in the GaN sublayers.
Wherein the growth temperature of the superlattice structure is 800-900 ℃. The superlattice structure grown under the condition has good quality, and the luminous efficiency of the light-emitting diode can be effectively improved.
Illustratively, the growth pressure of the superlattice structure is 50-300 Torr. The superlattice structure grown under the condition has good quality, and the luminous efficiency of the light-emitting diode can be effectively improved.
Optionally, the growth thickness of the aluminum gallium nitride sublayer, the growth thickness of the indium gallium nitride sublayer and the growth thickness of the GaN sublayer can be 5-15 nm.
S206: an active layer is grown on the superlattice structure.
The active layer may include an InGaN well layer and a GaN barrier layer sequentially stacked.
Illustratively, the growth thickness of the InGaN well layer can be 2-3 nm, the growth thickness of the GaN barrier layer can be 9-20 nm, and the obtained light emitting diode is good in light emitting efficiency.
Optionally, the growth temperature of the InGaN well layer can be 720-830 ℃, the growth temperature of the GaN barrier layer can be 850-960 ℃, and the quality of the active layer grown under the conditions is good, so that the light emitting efficiency of the light emitting diode can be guaranteed.
Furthermore, the growth pressure of the InGaN well layer and the growth pressure of the GaN barrier layer can both be 100-500 Torr, the quality of the active layer grown under the condition is good, and the light emitting efficiency of the light emitting diode can be ensured.
S207: and growing a low-temperature P-type GaN layer on the active layer.
Optionally, the growth thickness of the low-temperature P-type GaN layer can be 50-100 nm.
The growth temperature of the low-temperature P-type GaN layer can be 600-800 ℃, and the growth pressure of the low-temperature P-type GaN layer can be 200-500 Torr. The low-temperature P-type GaN layer grown under the condition has better quality, and is beneficial to improving the luminous efficiency of the light-emitting diode.
S208: and growing an electron blocking layer on the low-temperature P-type GaN layer.
p type AlyGa1-yThe growth thickness of the N layer can be 20-100 nm.
p type AlyGa1-yThe growth temperature of the N layer can be 700-1000 ℃, and the p type AlyGa1-yThe growth pressure of the N layer can be 100 to 500 Torr. P-type Al grown under the conditionsyGa1-yThe N layer has good quality, and is beneficial to improving the luminous efficiency of the light-emitting diode.
S209: and growing a P-type GaN layer on the electron blocking layer.
Illustratively, the growth thickness of the P-type GaN layer can be 50-100 nm.
Optionally, the growth pressure of the P-type GaN layer may be 200-600 Torr, and the growth temperature of the P-type GaN layer may be 900-1000 ℃.
S210: and growing a P-type contact layer on the P-type GaN layer.
Wherein the growth thickness of the P-type contact layer is 10-50 nm.
For example, the growth temperature of the P-type contact layer may be 850-1000 ℃, and the growth pressure of the P-type contact layer may be 100-300 torr.
The structure of the epitaxial wafer after step S210 is performed can be seen in fig. 2.
It should be noted that, in the embodiments of the present invention, other structures than the AlN layer are grown by using an MOCVD (chemical vapor deposition) method. During the growth of the structure, trimethyl (or triethyl) gallium is used as a gallium source, and high-purity NH is adopted3And as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, silane is used for n-type doping, and cyclopentadienyl magnesium is used for p-type doping.
The method can also comprise the steps of reducing the temperature in the MOCVD (chemical vapor deposition) process chamber after the epitaxial structure is grown, annealing the epitaxial wafer in a nitrogen atmosphere, wherein the annealing temperature range is 650-850 ℃, annealing for 5-15 minutes, and turning to room temperature to finish the epitaxial growth. The annealing can further remove the defects in the epitaxial wafer, and is beneficial to improving the luminous efficiency of the light-emitting diode.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (8)

1. A light emitting diode epitaxial wafer is characterized by comprising a substrate, and an N-type GaN layer, a low-temperature N-type GaN layer, a superlattice structure, an active layer and a P-type GaN layer which are sequentially stacked on the substrate, wherein the low-temperature N-type GaN layer is grown at the temperature of 800-900 ℃,
the superlattice structure comprises aluminum gallium nitride sublayers, indium gallium nitride sublayers and GaN sublayers which are alternately stacked, wherein Si is doped in the GaN sublayers, and the aluminum gallium nitride sublayers are AlXGa1-XN layer, the InGaN sublayer is InZGa1-ZN layer, wherein 0.1 <X＜0.4，0.1＜Z＜0.3。
2. The epitaxial wafer of claim 1, wherein the thickness of the AlGaN sublayer, the thickness of the InGaN sublayer and the thickness of the GaN sublayer are all 5-15 nm.
3. The epitaxial wafer of claim 1, wherein the number of AlGaN sublayers, the number of InGaN sublayers, and the number of GaN sublayers are 5 to 20.
4. The epitaxial wafer of claim 1, wherein the doping concentration of the Si element in the GaN sublayers is 1 × 1017～1×1018cm-3。
5. The epitaxial wafer of claim 1, wherein the thickness of the low temperature N-type GaN layer is 30-80 nm.
6. A preparation method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing an N-type GaN layer on the substrate;
growing a low-temperature N-type GaN layer on the N-type GaN layer, wherein the growth temperature of the low-temperature N-type GaN layer is 800-900 ℃;
growing a superlattice structure on the low-temperature N-type GaN layer;
growing an active layer on the superlattice structure;
growing a P-type GaN layer on the active layer,
the superlattice structure comprises aluminum gallium nitride sublayers, indium gallium nitride sublayers and GaN sublayers which are alternately stacked, wherein Si is doped in the GaN sublayers, and the aluminum gallium nitride sublayers are AlXGa1-XN layer, the InGaN sublayer is InZGa1-ZN layer, wherein 0.1 <X＜0.4，0.1＜Z＜0.3。
7. The method according to claim 6, wherein the growth temperature of the superlattice structure is 800-900 ℃.
8. The method according to claim 6, wherein the pressure for growing the superlattice structure is 50 to 300 Torr.
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