CN109244140A - Ldmos器件及其制造方法 - Google Patents

Ldmos器件及其制造方法 Download PDF

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CN109244140A
CN109244140A CN201811144001.8A CN201811144001A CN109244140A CN 109244140 A CN109244140 A CN 109244140A CN 201811144001 A CN201811144001 A CN 201811144001A CN 109244140 A CN109244140 A CN 109244140A
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layer
polysilicon
region
polysilicon gate
common media
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许昭昭
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Priority to US16/569,135 priority patent/US11114561B2/en
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Abstract

本发明公开了一种LDMOS器件，包括：形成于第一外延层上的漂移区和体区，栅介质层和多晶硅栅，源区和漏区；还包括共用介质层，覆盖多晶硅栅的第二侧和漏区之间的漂移区表面且共用介质层会延伸到多晶硅栅的表面上，共用介质层还覆盖部分漏区的表面；未被共用介质层所覆盖的多晶硅栅、源区和漏区的表面形成有自对准金属硅化物且共用介质层作为自对准金属硅化物的生长阻挡层；在多晶硅栅的第二侧和漏区之间的共用介质层的表面形成有漏端场板；漏端场板底部的共用介质层作为场板介质层。本发明还公开了一种LDMOS器件的制造方法。本发明能降低工艺难度，提高竞争力。

Description

LDMOS器件及其制造方法
技术领域
本发明涉及半导体集成电路制造领域，特别是涉及一种LDMOS器件；本发明还涉及一种LDMOS器件的制造方法。
背景技术
双扩散金属氧化物半导体场效应管(Double-diffused MOS)由于具有耐压稿，大电流驱动能力和极低功耗等特点，目前在电源管理电路中被广泛采用。DMOS包括垂直双扩散金属氧化物半导体场效应管(VDMOS)和LDMOS(LDMOS)，在LDMOS器件中，导通电阻是一个重要的指标。BCD工艺中，LDMOS虽然与CMOS集成在同一块芯片中，但由于高耐压和低特征电阻即导通电阻(Rsp)的要求，在进行工艺整合时应尽可能防止器件表面的硅受到损伤而导致器件性能退化。
如图1所示，是现有LDMOS器件的结构示意图；以N型器件为例，现有LDMOS器件包括：
N型的第一外延层102，在所述第一外延层102的选定区域中形成有P型的漂移区104和N型的体区105；所述漂移区104和所述体区105横向隔离有距离。
在所述第一外延层102的底部形成有P型重掺杂的第一埋层101；所述第一埋层101形成于半导体衬底表面。通常，所述半导体衬底为P型掺杂的硅衬底，所述第一外延层102为硅外延层。
在所述漂移区104的选定区域中形成由漂移区场氧103。
在所述体区105的表面形成有由栅介质层如栅氧化层106和多晶硅栅107叠加而成的栅极结构，被所述多晶硅栅107覆盖的所述体区105表面用于形成沟道。
所述栅介质层6的第二侧和所述漂移区场氧103的第一侧相接触，所述多晶硅栅107的第二侧延伸到所述漂移区场氧103的表面上。
源区108a形成于所述体区105表面且所述源区108a的第二侧和所述多晶硅栅 107的第一侧自对准。
漏区108b形成于所述漂移区104中且所述漏区108b的第一侧和所述漂移区场氧103的第二侧自对准。
在所述体区105的表面还形成有N型重掺杂的体引出区109，所述体引出区109 和所述源区108a的第一侧的侧面相接触。所述体引出区109和所述源区108a会通过相同的接触孔连接到由正面金属层组成的源极。
漏区108b则会通过接触孔连接到由正面金属层组成的漏极，多晶硅栅107则会通过接触孔连接到由正面金属层组成的栅极。
图1中，漂移区场氧103形成于第一外延层102的表面上方的结构，所述漂移区场氧103采用氧化层淀积加光刻刻蚀工艺形成。这种漂移区场氧103的制造方法在漂移区场氧103刻蚀的时候需要精确控制以防止氧化层刻蚀时对底部的第一外延层102 表面即硅表面造成损伤，导致器件性能退化，如导致器件Rsp增大，击穿电压(BV) 减小。
发明内容
本发明所要解决的技术问题是提供一种LDMOS器件，能降低工艺难度，提高竞争力。为此，本发明还提供一种LDMOS器件的制造方法。
为解决上述技术问题，本发明提供的LDMOS器件包括：
第二导电类型的第一外延层，在所述第一外延层的选定区域中形成有第一导电类型的漂移区和第二导电类型的体区；所述漂移区和所述体区横向接触或隔离有距离。
在所述体区的表面形成有由栅介质层和多晶硅栅叠加而成的栅极结构，被所述多晶硅栅覆盖的所述体区表面用于形成沟道；所述栅介质层的第二侧和所述多晶硅栅的第二侧都延伸到所述漂移区的表面上。
源区形成于所述体区表面且所述源区的第二侧和所述多晶硅栅的第一侧自对准；
漏区形成于所述漂移区的选定区域中且所述漏区的第一侧和所述多晶硅栅的第二侧相隔有间距。
共用介质层，所述共用介质层覆盖所述多晶硅栅的第二侧和所述漏区之间的所述漂移区表面且所述共用介质层会延伸到所述多晶硅栅的表面上，所述共用介质层还覆盖部分所述漏区的表面；未被所述共用介质层所覆盖的所述多晶硅栅、所述源区和所述漏区的表面形成有自对准金属硅化物且所述共用介质层作为所述自对准金属硅化物的生长阻挡层。
在所述多晶硅栅的第二侧和所述漏区之间的所述共用介质层的表面形成有漏端场板，在所述漏端场板的表面也形成有自对准金属硅化物；所述漏端场板底部的所述共用介质层作为场板介质层。
进一步的改进是，在所述第一外延层的底部形成有第一导电类型重掺杂的第一埋层；所述第一埋层形成于半导体衬底表面。
进一步的改进是，所述半导体衬底为硅衬底，所述第一外延层为硅外延层。
所述栅介质层为氧化硅。
所述共用介质层的材料为氧化硅。
进一步的改进是，在所述体区的表面还形成有第二导电类型重掺杂的体引出区，所述体引出区和所述源区的第一侧的侧面相接触，所述源区表面的自对准金属硅化物也延伸到所述体引出区的表面。
进一步的改进是，还包括：
接触孔刻蚀停止层，层间膜，接触孔，正面金属层。
各所述接触孔穿过对应的所述层间膜和所述接触孔刻蚀停止层并和底部的所述自对准金属硅化物接触。
所述源区、所述漏区、所述多晶硅栅和所述漏端场板的顶部都形成有对应的接触孔，所述源区通过顶部的接触孔连接到由所述正面金属层组成的源极，所述漏区通过顶部的接触孔连接到由所述正面金属层组成的漏极，所述多晶硅栅通过顶部的接触孔连接到由所述正面金属层组成的栅极，所述漏端场板也通过顶部的接触孔连接到由所述正面金属层组成的栅极。
进一步的改进是，所述接触孔刻蚀停止层由氧化层和氮化层叠加而成。
所述层间膜由氧化层组成。
进一步的改进是，在所述多晶硅栅的侧面还形成有侧墙。
进一步的改进是，所述漏端场板包括第二多晶硅层或对所述第二多晶硅层进行表面进行自对准金属硅化形成的自对准金属硅化物；当所述第二多晶硅层的厚度减小到小于时，所述第二多晶硅层会全部转化为自对准金属硅化物，此时所述漏端场板完全由自对准金属硅化物组成。
当所述第二多晶硅层未被完全转换为自对准金属硅化物时，所述漏端场板由剩余厚度的所述第二多晶硅层和表面自对准金属硅化物叠加而成。
进一步的改进是，LDMOS为N型器件，第一导电类型为N型，第二导电类型为P 型；或者，LDMOS为P型器件，第一导电类型为P型，第二导电类型为N型。
为解决上述技术问题，本发明提供的LDMOS器件的制造方法包括如下步骤：
步骤一、提供第二导电类型的第一外延层，在所述第一外延层的选定区域中形成有第一导电类型的漂移区和第二导电类型的体区；所述漂移区和所述体区横向接触或隔离有距离。
步骤二、依次形成栅介质层和多晶硅栅并进行光刻刻蚀形成位于所述体区表面的由栅介质层和多晶硅栅叠加而成的栅极结构，被所述多晶硅栅覆盖的所述体区表面用于形成沟道；所述栅介质层的第二侧和所述多晶硅栅的第二侧都延伸到所述漂移区的表面上。
步骤三、进行第一导电类型的源漏注入同时形成源区和漏区。
所述源区形成于所述体区表面且所述源区的第二侧和所述多晶硅栅的第一侧自对准。
所述漏区形成于所述漂移区的选定区域中且所述漏区的第一侧和所述多晶硅栅的第二侧相隔有间距；所述漏区对应的选定区域通过光刻工艺定义。
步骤四、依次形成共用介质层和第二多晶硅层。
步骤五、采用光刻定义加对所述第二多晶硅层进行刻蚀，刻蚀后的所述第二多晶硅层位于所述多晶硅栅的第二侧和所述漏区之间的所述共用介质层的表面；
步骤六、对所述共用介质层进行光刻刻蚀，刻蚀后的所述共用介质层覆盖所述多晶硅栅的第二侧和所述漏区之间的所述漂移区表面且所述共用介质层会延伸到所述多晶硅栅的表面上，所述共用介质层还覆盖部分所述漏区的表面；未被所述共用介质层所覆盖的所述多晶硅栅、所述源区和所述漏区的表面暴露出来；
步骤七、以所述共用介质层作为自对准金属硅化物的生长阻挡层在暴露出来的所述多晶硅栅、所述源区和所述漏区的表面以及所述第二多晶硅层的表面形成自对准金属硅化物；所述漏端场板包括第二多晶硅层或对所述第二多晶硅层进行表面进行自对准金属硅化形成的自对准金属硅化物；所述漏端场板底部的所述共用介质层作为场板介质层。
进一步的改进是，步骤一中在所述第一外延层的底部形成有第一导电类型重掺杂的第一埋层；所述第一埋层形成于半导体衬底表面。
进一步的改进是，所述半导体衬底为硅衬底，所述第一外延层为硅外延层。
所述栅介质层为氧化硅。
所述共用介质层的材料为氧化硅。
进一步的改进是，步骤三中还包括进行第二导电类型重掺杂注入在所述体区的表面形成体引出区的步骤，所述体引出区和所述源区的第一侧的侧面相接触；步骤七中在所述源区表面形成的自对准金属硅化物也延伸到所述体引出区的表面。
进一步的改进是，还包括如下步骤：
步骤八、形成接触孔刻蚀停止层。
步骤九、形成层间膜。
步骤十、形成接触孔；所述源区、所述漏区、所述多晶硅栅和所述漏端场板的顶部都形成有对应的接触孔，各所述接触孔穿过对应的所述层间膜和所述接触孔刻蚀停止层并和底部的所述自对准金属硅化物接触。
步骤十一、形成正面金属层；采用光刻刻蚀工艺对所述正面金属层进行图形化形成源极、栅极和漏极。
所述源区通过顶部的接触孔连接到所述源极，所述漏区通过顶部的接触孔连接到所述漏极，所述多晶硅栅通过顶部的接触孔连接到所述栅极，所述漏端场板也通过顶部的接触孔连接到所述栅极。
进一步的改进是，所述接触孔刻蚀停止层由氧化层和氮化层叠加而成。
所述层间膜由氧化层组成。
进一步的改进是，步骤二中，所述栅极结构形成之后，还包括在所述多晶硅栅的侧面形成侧墙的步骤。
进一步的改进是，当所述第二多晶硅层的厚度减小到小于时，所述第二多晶硅层会全部转化为自对准金属硅化物，此时所述漏端场板完全由自对准金属硅化物组成；当所述第二多晶硅层未被完全转换为自对准金属硅化物时，所述漏端场板由剩余厚度的所述第二多晶硅层和表面自对准金属硅化物叠加而成。
本发明LDMOS器件中不单独形成漂移区场氧，作为替换，本发明采用作为自对准金属硅化物的生长阻挡层的共用介质层同时实现漂移区场氧的功能，在位于多晶硅栅到漏区的漂移区顶部的共用介质层的顶部单独形成有漏端场板，通过漏端场板的覆盖调节底部的漂移区表面的电场分布，从而能提高器件的击穿电压；由上可知，本发明采用共用介质层叠加漏端场板的结构替换了现有结构中的单独设置的漂移区场氧以及延伸到漂移区场氧顶部的由多晶硅栅组成的场板，二者都实现了对漂移区表面电场分布的调节，但是本发明的共用介质层不需要单独制造，而是同时作为自对准金属硅化物的生长阻挡层，所以本发明能降低工艺难度，提高产品工艺的竞争力；另外，本发明虽然需要采用一次光刻工艺进行漏端场板的定义，但是也同时节省了单独形成漂移区场氧时所需要采用的光刻工艺，所以本发明不会增加光刻的掩模层数，不会带来成本的增加。
附图说明
下面结合附图和具体实施方式对本发明作进一步详细的说明：
图1是现有LDMOS器件的结构示意图；
图2是本发明实施例LDMOS器件的结构示意图；
图3A-图3H是本发明实施例LDMOS器件的制造方法的各步骤中的器件结构示意图。
具体实施方式
如图2所示，是本发明实施例LDMOS器件的结构示意图，本发明实施例LDMOS器件包括：
第二导电类型的第一外延层3，在所述第一外延层3的选定区域中形成有第一导电类型的漂移区4和第二导电类型的体区5；所述漂移区4和所述体区5横向接触。在其它实施例中也能为：所述漂移区4和所述体区5隔离有距离。
在所述体区5的表面形成有由栅介质层6和多晶硅栅7叠加而成的栅极结构，被所述多晶硅栅7覆盖的所述体区5表面用于形成沟道；所述栅介质层6的第二侧和所述多晶硅栅7的第二侧都延伸到所述漂移区4的表面上。
源区8a形成于所述体区5表面且所述源区8a的第二侧和所述多晶硅栅7的第一侧自对准；
漏区8b形成于所述漂移区4的选定区域中且所述漏区8b的第一侧和所述多晶硅栅7的第二侧相隔有间距。
共用介质层11，所述共用介质层11覆盖所述多晶硅栅7的第二侧和所述漏区8b 之间的所述漂移区4表面且所述共用介质层11会延伸到所述多晶硅栅7的表面上，所述共用介质层11还覆盖部分所述漏区8b的表面；未被所述共用介质层11所覆盖的所述多晶硅栅7、所述源区8a和所述漏区8b的表面形成有自对准金属硅化物13 且所述共用介质层11作为所述自对准金属硅化物13的生长阻挡层。
在所述多晶硅栅7的第二侧和所述漏区8b之间的所述共用介质层11的表面形成有漏端场板，所述漏端场板底部的所述共用介质层11作为场板介质层。
所述漏端场板包括第二多晶硅层12或对所述第二多晶硅层12进行表面进行自对准金属硅化形成的自对准金属硅化物13；当所述第二多晶硅层12的厚度减小到小于时，所述第二多晶硅层12会全部转化为自对准金属硅化物13，此时所述漏端场板完全由自对准金属硅化物13组成。
当所述第二多晶硅层12未被完全转换为自对准金属硅化物13时，所述漏端场板由剩余厚度的所述第二多晶硅层12和表面自对准金属硅化物13叠加而成。
本发明实施例中，在所述第一外延层3的底部形成有第一导电类型重掺杂的第一埋层2；所述第一埋层2形成于半导体衬底1表面。所述半导体衬底1通常采用P型掺杂。
所述半导体衬底1为硅衬底，所述第一外延层3为硅外延层。
所述栅介质层6为氧化硅。
所述共用介质层11的材料为氧化硅。
在所述体区5的表面还形成有第二导电类型重掺杂的体引出区9，所述体引出区 9和所述源区8a的第一侧的侧面相接触，所述源区8a表面的自对准金属硅化物13 也延伸到所述体引出区9的表面。
还包括：
接触孔刻蚀停止层14，层间膜15，接触孔16，正面金属层17。
各所述接触孔16穿过对应的所述层间膜15和所述接触孔刻蚀停止层14并和底部的所述自对准金属硅化物13接触。
所述源区8a、所述漏区8b、所述多晶硅栅7和所述漏端场板的顶部都形成有对应的接触孔16，所述源区8a通过顶部的接触孔16连接到由所述正面金属层17组成的源极，所述漏区8b通过顶部的接触孔16连接到由所述正面金属层17组成的漏极，所述多晶硅栅7通过顶部的接触孔16连接到由所述正面金属层17组成的栅极，所述漏端场板也通过顶部的接触孔16连接到由所述正面金属层17组成的栅极。
所述接触孔刻蚀停止层14由氧化层和氮化层叠加而成。
所述层间膜15由氧化层组成。
在所述多晶硅栅7的侧面还形成有侧墙10。所述侧墙10可以参考图3D所示，图3D中所述侧墙10的材料包括了氧化硅和氮化硅。
本发明实施例中，LDMOS为N型器件，第一导电类型为N型，第二导电类型为P 型。在其它实施例中也能为：LDMOS为P型器件，第一导电类型为P型，第二导电类型为N型。
本发明实施例LDMOS器件中不单独形成漂移区4场氧，作为替换，本发明实施例采用作为自对准金属硅化物13的生长阻挡层的共用介质层11同时实现漂移区4场氧的功能，在位于多晶硅栅7到漏区8b的漂移区4顶部的共用介质层11的顶部单独形成有漏端场板，通过漏端场板的覆盖调节底部的漂移区4表面的电场分布，从而能提高器件的击穿电压；由上可知，本发明实施例采用共用介质层11叠加漏端场板的结构替换了现有结构中的单独设置的漂移区4场氧以及延伸到漂移区4场氧顶部的由多晶硅栅7组成的场板，二者都实现了对漂移区4表面电场分布的调节，但是本发明实施例的共用介质层11不需要单独制造，而是同时作为自对准金属硅化物13的生长阻挡层，所以本发明实施例能降低工艺难度，提高产品工艺的竞争力；另外，本发明实施例虽然需要采用一次光刻工艺进行漏端场板的定义，但是也同时节省了单独形成漂移区4场氧时所需要采用的光刻工艺，所以本发明实施例不会增加光刻的掩模层数，不会带来成本的增加。
如图3A至图3H所示，是本发明实施例LDMOS器件的制造方法的各步骤中的器件结构示意图，本发明提供的LDMOS器件的制造方法包括如下步骤：
步骤一、如图3A所示，提供第二导电类型的第一外延层3。
如图3B所示，在所述第一外延层3的选定区域中形成有第一导电类型的漂移区4和第二导电类型的体区5；所述漂移区4和所述体区5横向接触。在其它实施例方法中也能为：所述漂移区4和所述体区5隔离有距离。
本发明实施例方法中，在所述第一外延层3的底部形成有第一导电类型重掺杂的第一埋层2；所述第一埋层2形成于半导体衬底1表面。
所述半导体衬底1为硅衬底，所述第一外延层3为硅外延层。
步骤二、如图3C所示，依次形成栅介质层6和多晶硅栅7并进行光刻刻蚀形成位于所述体区5表面的由栅介质层6和多晶硅栅7叠加而成的栅极结构，被所述多晶硅栅7覆盖的所述体区5表面用于形成沟道；所述栅介质层6的第二侧和所述多晶硅栅7的第二侧都延伸到所述漂移区4的表面上。
所述栅介质层6为氧化硅。
如图3D所示，在所述多晶硅栅7的侧面形成侧墙10。本发明实施例方法中，所述侧墙10由氧化层和氮化层叠加而成，形成时先依次沉积氧化层和氮化层，之后依次进行氮化层和氧化层的全面刻蚀形成所述侧墙10。
步骤三、如图3D所示，进行第一导电类型的源漏注入同时形成源区8a和漏区8b。
所述源区8a形成于所述体区5表面且所述源区8a的第二侧和所述多晶硅栅7的第一侧自对准。
所述漏区8b形成于所述漂移区4的选定区域中且所述漏区8b的第一侧和所述多晶硅栅7的第二侧相隔有间距；所述漏区8b对应的选定区域通过光刻工艺定义。
之后还包括进行第二导电类型重掺杂注入在所述体区5的表面形成体引出区9的步骤，所述体引出区9和所述源区8a的第一侧的侧面相接触。
步骤四、如图3E所示，依次形成共用介质层11和第二多晶硅层12。
所述共用介质层11的材料为氧化硅。
步骤五、如图3F所示，采用光刻定义加对所述第二多晶硅层12进行刻蚀，刻蚀后的所述第二多晶硅层12位于所述多晶硅栅7的第二侧和所述漏区8b之间的所述共用介质层11的表面。
步骤六、如图3G所示，对所述共用介质层11进行光刻刻蚀，刻蚀后的所述共用介质层11覆盖所述多晶硅栅7的第二侧和所述漏区8b之间的所述漂移区4表面且所述共用介质层11会延伸到所述多晶硅栅7的表面上，所述共用介质层11还覆盖部分所述漏区8b的表面；未被所述共用介质层11所覆盖的所述多晶硅栅7、所述源区8a 和所述漏区8b的表面暴露出来。
步骤七、如图3G所示，以所述共用介质层11作为自对准金属硅化物13的生长阻挡层在暴露出来的所述多晶硅栅7、所述源区8a和所述漏区8b的表面以及所述第二多晶硅层12的表面形成自对准金属硅化物13；所述漏端场板包括第二多晶硅层12 或对所述第二多晶硅层12进行表面进行自对准金属硅化形成的自对准金属硅化物 13；所述漏端场板底部的所述共用介质层作为场板介质层。在所述源区8a表面形成的自对准金属硅化物13也延伸到所述体引出区9的表面。
当所述第二多晶硅层12的厚度减小到小于时，所述第二多晶硅层12会全部转化为自对准金属硅化物13，此时所述漏端场板完全由自对准金属硅化物13组成。
当所述第二多晶硅层12未被完全转换为自对准金属硅化物13时，所述漏端场板由剩余厚度的所述第二多晶硅层12和表面自对准金属硅化物13叠加而成。
还包括如下步骤：
步骤八、形成接触孔刻蚀停止层14。所述接触孔刻蚀停止层14由氧化层和氮化层叠加而成。
步骤九、形成层间膜15。所述层间膜15由氧化层组成。
步骤十、形成接触孔16；所述源区8a、所述漏区8b、所述多晶硅栅7和所述漏端场板的顶部都形成有对应的接触孔16，各所述接触孔16穿过对应的所述层间膜15 和所述接触孔刻蚀停止层14并和底部的所述自对准金属硅化物13接触。
步骤十一、形成正面金属层17；采用光刻刻蚀工艺对所述正面金属层17进行图形化形成源极、栅极和漏极。
所述源区8a通过顶部的接触孔16连接到所述源极，所述漏区8b通过顶部的接触孔16连接到所述漏极，所述多晶硅栅7通过顶部的接触孔16连接到所述栅极，所述漏端场板也通过顶部的接触孔16连接到所述栅极。
以上通过具体实施例对本发明进行了详细的说明，但这些并非构成对本发明的限制。在不脱离本发明原理的情况下，本领域的技术人员还可做出许多变形和改进，这些也应视为本发明的保护范围。

Claims (15)

1.一种LDMOS器件，其特征在于，包括：
第二导电类型的第一外延层，在所述第一外延层的选定区域中形成有第一导电类型的漂移区和第二导电类型的体区；所述漂移区和所述体区横向接触或隔离有距离；
在所述体区的表面形成有由栅介质层和多晶硅栅叠加而成的栅极结构，被所述多晶硅栅覆盖的所述体区表面用于形成沟道；所述栅介质层的第二侧和所述多晶硅栅的第二侧都延伸到所述漂移区的表面上；
源区形成于所述体区表面且所述源区的第二侧和所述多晶硅栅的第一侧自对准；
漏区形成于所述漂移区的选定区域中且所述漏区的第一侧和所述多晶硅栅的第二侧相隔有间距；
共用介质层，所述共用介质层覆盖所述多晶硅栅的第二侧和所述漏区之间的所述漂移区表面且所述共用介质层会延伸到所述多晶硅栅的表面上，所述共用介质层还覆盖部分所述漏区的表面；未被所述共用介质层所覆盖的所述多晶硅栅、所述源区和所述漏区的表面形成有自对准金属硅化物且所述共用介质层作为所述自对准金属硅化物的生长阻挡层；
在所述多晶硅栅的第二侧和所述漏区之间的所述共用介质层的表面形成有漏端场板；所述漏端场板底部的所述共用介质层作为场板介质层。
2.如权利要求1所述的LDMOS器件，其特征在于：在所述第一外延层的底部形成有第一导电类型重掺杂的第一埋层；所述第一埋层形成于半导体衬底表面。
3.如权利要求2所述的LDMOS器件，其特征在于：所述半导体衬底为硅衬底，所述第一外延层为硅外延层；
所述栅介质层为氧化硅；
所述共用介质层的材料为氧化硅。
4.如权利要求1所述的LDMOS器件，其特征在于：在所述体区的表面还形成有第二导电类型重掺杂的体引出区，所述体引出区和所述源区的第一侧的侧面相接触，所述源区表面的自对准金属硅化物也延伸到所述体引出区的表面。
5.如权利要求1所述的LDMOS器件，其特征在于，还包括：
接触孔刻蚀停止层，层间膜，接触孔，正面金属层；
各所述接触孔穿过对应的所述层间膜和所述接触孔刻蚀停止层并和底部的所述自对准金属硅化物接触；
所述源区、所述漏区、所述多晶硅栅和所述漏端场板的顶部都形成有对应的接触孔，所述源区通过顶部的接触孔连接到由所述正面金属层组成的源极，所述漏区通过顶部的接触孔连接到由所述正面金属层组成的漏极，所述多晶硅栅通过顶部的接触孔连接到由所述正面金属层组成的栅极，所述漏端场板也通过顶部的接触孔连接到由所述正面金属层组成的栅极。
6.如权利要求5所述的LDMOS器件，其特征在于：所述接触孔刻蚀停止层由氧化层和氮化层叠加而成；
所述层间膜由氧化层组成。
7.如权利要求1所述的LDMOS器件，其特征在于：在所述多晶硅栅的侧面还形成有侧墙。
8.如权利要求1所述的LDMOS器件，其特征在于：所述漏端场板包括第二多晶硅层或对所述第二多晶硅层进行表面进行自对准金属硅化形成的自对准金属硅化物；当所述第二多晶硅层的厚度减小到小于时，所述第二多晶硅层会全部转化为自对准金属硅化物，此时所述漏端场板完全由自对准金属硅化物组成；
当所述第二多晶硅层未被完全转换为自对准金属硅化物时，所述漏端场板由剩余厚度的所述第二多晶硅层和表面自对准金属硅化物叠加而成。
9.一种LDMOS器件的制造方法，其特征在于，包括如下步骤：
步骤一、提供第二导电类型的第一外延层，在所述第一外延层的选定区域中形成有第一导电类型的漂移区和第二导电类型的体区；所述漂移区和所述体区横向接触或隔离有距离；
步骤二、依次形成栅介质层和多晶硅栅并进行光刻刻蚀形成位于所述体区表面的由栅介质层和多晶硅栅叠加而成的栅极结构，被所述多晶硅栅覆盖的所述体区表面用于形成沟道；所述栅介质层的第二侧和所述多晶硅栅的第二侧都延伸到所述漂移区的表面上；
步骤三、进行第一导电类型的源漏注入同时形成源区和漏区；
所述源区形成于所述体区表面且所述源区的第二侧和所述多晶硅栅的第一侧自对准；
所述漏区形成于所述漂移区的选定区域中且所述漏区的第一侧和所述多晶硅栅的第二侧相隔有间距；所述漏区对应的选定区域通过光刻工艺定义；
步骤四、依次形成共用介质层和第二多晶硅层；
步骤五、采用光刻定义加对所述第二多晶硅层进行刻蚀，刻蚀后的所述第二多晶硅层位于所述多晶硅栅的第二侧和所述漏区之间的所述共用介质层的表面；
步骤六、对所述共用介质层进行光刻刻蚀，刻蚀后的所述共用介质层覆盖所述多晶硅栅的第二侧和所述漏区之间的所述漂移区表面且所述共用介质层会延伸到所述多晶硅栅的表面上，所述共用介质层还覆盖部分所述漏区的表面；未被所述共用介质层所覆盖的所述多晶硅栅、所述源区和所述漏区的表面暴露出来；
步骤七、以所述共用介质层作为自对准金属硅化物的生长阻挡层在暴露出来的所述多晶硅栅、所述源区和所述漏区的表面以及所述第二多晶硅层的表面形成自对准金属硅化物；所述漏端场板包括第二多晶硅层或对所述第二多晶硅层进行表面进行自对准金属硅化形成的自对准金属硅化物；所述漏端场板底部的所述共用介质层作为场板介质层。
10.如权利要求1所述的LDMOS器件的制造方法，其特征在于：步骤一中在所述第一外延层的底部形成有第一导电类型重掺杂的第一埋层；所述第一埋层形成于半导体衬底表面。
11.如权利要求10所述的LDMOS器件的制造方法，其特征在于：所述半导体衬底为硅衬底，所述第一外延层为硅外延层；
所述栅介质层为氧化硅；
所述共用介质层的材料为氧化硅。
12.如权利要求9所述的LDMOS器件的制造方法，其特征在于：步骤三中还包括进行第二导电类型重掺杂注入在所述体区的表面形成体引出区的步骤，所述体引出区和所述源区的第一侧的侧面相接触；步骤七中在所述源区表面形成的自对准金属硅化物也延伸到所述体引出区的表面。
13.如权利要求9所述的LDMOS器件的制造方法，其特征在于，还包括如下步骤：
步骤八、形成接触孔刻蚀停止层；
步骤九、形成层间膜；
步骤十、形成接触孔；所述源区、所述漏区、所述多晶硅栅和所述漏端场板的顶部都形成有对应的接触孔，各所述接触孔穿过对应的所述层间膜和所述接触孔刻蚀停止层并和底部的所述自对准金属硅化物接触；
步骤十一、形成正面金属层；采用光刻刻蚀工艺对所述正面金属层进行图形化形成源极、栅极和漏极；
所述源区通过顶部的接触孔连接到所述源极，所述漏区通过顶部的接触孔连接到所述漏极，所述多晶硅栅通过顶部的接触孔连接到所述栅极，所述漏端场板也通过顶部的接触孔连接到所述栅极。
14.如权利要求13所述的LDMOS器件的制造方法，其特征在于：所述接触孔刻蚀停止层由氧化层和氮化层叠加而成；
所述层间膜由氧化层组成。
15.如权利要求9所述的LDMOS器件的制造方法，其特征在于：当所述第二多晶硅层的厚度减小到小于时，所述第二多晶硅层会全部转化为自对准金属硅化物，此时所述漏端场板完全由自对准金属硅化物组成；
当所述第二多晶硅层未被完全转换为自对准金属硅化物时，所述漏端场板由剩余厚度的所述第二多晶硅层和表面自对准金属硅化物叠加而成。
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