CN109216205B - 氮化钨阻挡层沉积 - Google Patents
氮化钨阻挡层沉积 Download PDFInfo
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- CN109216205B CN109216205B CN201810708233.5A CN201810708233A CN109216205B CN 109216205 B CN109216205 B CN 109216205B CN 201810708233 A CN201810708233 A CN 201810708233A CN 109216205 B CN109216205 B CN 109216205B
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- layer
- tungsten
- sige
- deposition
- silicon germanium
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- 230000008021 deposition Effects 0.000 title claims abstract description 80
- 229910052721 tungsten Inorganic materials 0.000 title claims abstract description 73
- 239000010937 tungsten Substances 0.000 title claims abstract description 73
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- -1 Tungsten nitride Chemical class 0.000 title abstract description 6
- 238000000034 method Methods 0.000 claims abstract description 148
- 238000000151 deposition Methods 0.000 claims abstract description 112
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims abstract description 107
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims abstract description 69
- NXHILIPIEUBEPD-UHFFFAOYSA-H tungsten hexafluoride Chemical compound F[W](F)(F)(F)(F)F NXHILIPIEUBEPD-UHFFFAOYSA-H 0.000 claims abstract description 26
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 20
- 239000011737 fluorine Substances 0.000 claims abstract description 19
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims abstract description 16
- IVHJCRXBQPGLOV-UHFFFAOYSA-N azanylidynetungsten Chemical compound [W]#N IVHJCRXBQPGLOV-UHFFFAOYSA-N 0.000 claims abstract description 10
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910021342 tungsten silicide Inorganic materials 0.000 claims abstract description 8
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims abstract 2
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- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical group N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 12
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 10
- 239000001257 hydrogen Substances 0.000 claims description 9
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- 229910021529 ammonia Inorganic materials 0.000 claims description 6
- 150000002831 nitrogen free-radicals Chemical class 0.000 claims description 6
- 238000009616 inductively coupled plasma Methods 0.000 claims description 5
- 229910052786 argon Inorganic materials 0.000 claims description 4
- ZOCHARZZJNPSEU-UHFFFAOYSA-N diboron Chemical group B#B ZOCHARZZJNPSEU-UHFFFAOYSA-N 0.000 claims description 3
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 229910052796 boron Inorganic materials 0.000 description 7
- 238000005137 deposition process Methods 0.000 description 7
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- 229910052736 halogen Inorganic materials 0.000 description 7
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- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 6
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- 229910052760 oxygen Inorganic materials 0.000 description 6
- 238000010926 purge Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 150000001875 compounds Chemical class 0.000 description 5
- 238000005695 dehalogenation reaction Methods 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 150000002431 hydrogen Chemical class 0.000 description 5
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 239000012159 carrier gas Substances 0.000 description 4
- 239000003153 chemical reaction reagent Substances 0.000 description 4
- 125000004122 cyclic group Chemical group 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen(.) Chemical compound [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 4
- 229910021332 silicide Inorganic materials 0.000 description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- UORVGPXVDQYIDP-UHFFFAOYSA-N borane Chemical compound B UORVGPXVDQYIDP-UHFFFAOYSA-N 0.000 description 3
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- 150000003254 radicals Chemical class 0.000 description 3
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- 229910052732 germanium Inorganic materials 0.000 description 2
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- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- KPGXUAIFQMJJFB-UHFFFAOYSA-H tungsten hexachloride Chemical compound Cl[W](Cl)(Cl)(Cl)(Cl)Cl KPGXUAIFQMJJFB-UHFFFAOYSA-H 0.000 description 2
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- 235000019687 Lamb Nutrition 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 238000003917 TEM image Methods 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000003848 UV Light-Curing Methods 0.000 description 1
- 238000003491 array Methods 0.000 description 1
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- 238000001723 curing Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000005430 electron energy loss spectroscopy Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000012625 in-situ measurement Methods 0.000 description 1
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- 238000001004 secondary ion mass spectrometry Methods 0.000 description 1
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- 150000004756 silanes Chemical class 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- WNUPENMBHHEARK-UHFFFAOYSA-N silicon tungsten Chemical compound [Si].[W] WNUPENMBHHEARK-UHFFFAOYSA-N 0.000 description 1
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- 230000001052 transient effect Effects 0.000 description 1
- UONOETXJSWQNOL-UHFFFAOYSA-N tungsten carbide Chemical compound [W+]#[C-] UONOETXJSWQNOL-UHFFFAOYSA-N 0.000 description 1
- WIDQNNDDTXUPAN-UHFFFAOYSA-I tungsten(v) chloride Chemical compound Cl[W](Cl)(Cl)(Cl)Cl WIDQNNDDTXUPAN-UHFFFAOYSA-I 0.000 description 1
- 238000004876 x-ray fluorescence Methods 0.000 description 1
Classifications
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
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- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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Abstract
本发明涉及氮化钨阻挡层沉积,具体提供了氮化钨(WN)沉积的方法。还提供了用于钨(W)触点与锗化硅(SiGe)层的叠层以及用于形成它们的方法。叠层包括SiGe/硅化钨(WSix)/WN/W层,其中WSix提供SiGe和WN层之间的欧姆接触。还提供了在使用六氟化钨(WF6)沉积含W膜中减少氟(F)对下层的侵蚀的方法。还提供了执行这些方法的装置。
Description
技术领域
本发明总体上涉及半导体制造工艺,具体涉及氮化钨阻挡层沉积。
背景技术
使用化学气相沉积(CVD)技术的钨(W)膜沉积是半导体制造工艺的组成部分。例如,钨膜可以相邻金属层之间的水平互连、通孔,以及第一金属层和硅衬底上的器件之间的触头的形式被用作为低电阻率的电气连接。在一钨沉积工艺的示例中,氮化钛(TiN)阻挡层被沉积在介电衬底上,然后跟着钨膜的薄成核层的沉积。之后,剩余的钨膜被沉积在该成核层上作为体层(bulk layer)。通常,钨体层通过在CVD工艺中用氢(H2)还原六氟化钨(WF6)来形成。
钨膜也可用于各种存储器应用中,包括用于形成用于动态随机存取存储器(DRAM)结构的触点中。
发明内容
本公开的一个方面涉及一种在特征上沉积氮化钨(WN)阻挡层的方法。该方法包括在衬底上提供特征。该特征可以形成在介电层和硅锗(SiGe)层中并且包括SiGe表面。该方法涉及将SiGe表面暴露于氮自由基以处理SiGe表面,在经处理的SiGe表面上沉积钨(W)层,并沉积与该特征共形的氮化钨(WN)层。在一些实施方式中,该方法涉及用钨(W)填充该特征。氮自由基可以在由氮(N2)气产生的感应耦合等离子体中产生。
在一些实施方式中,W层厚度在5埃和30埃之间。在SiGe表面上沉积W层的过程中,W层的全部或一部分被转换成硅化钨层。在一些实施方式中,该方法还包括在SiGe表面上形成氮化物层。在一些实施方式中,在经处理的SiGe表面上沉积W层包括将衬底暴露于六氟化钨(WF6)和还原剂(例如硅烷(SiH4))的交替脉冲。在一些实施方式中,经处理的SiGe表面防止氟从WF6扩散到经处理的SiGe表面下方的SiGe中。
在一些实施方式中,沉积WN层包括使特征暴露于交替脉冲的六氟化钨(WF6)、还原剂和氮化剂。在一些这样的实施方式中,还原剂是乙硼烷(B2H6)并且氮化剂是氨(NH3)。在一些这样的实施方案中,特征暴露所针对的WF6与还原剂分子的比率大于2:1。在一些实施方式中,该比率大于2.5:1。
在一些实施方式中,该方法涉及使WN层脱卤。可以通过将WN层暴露于由氢(H2)和氩(Ar)产生的等离子体来执行脱卤。
具体而言,本发明的一些方面可以阐述如下:
1.一种方法,其包括:
提供形成在衬底上的介电层和硅锗(SiGe)层中的特征,其中所述特征包括SiGe表面;
将所述SiGe表面暴露于氮自由基以处理所述SiGe表面;
在经处理的所述SiGe表面上沉积钨(W)层;以及
沉积与所述特征共形的氮化钨(WN)层。
2.根据条款1所述的方法,其还包括用钨(W)填充所述特征。
3.根据条款1所述的方法,其中氮自由基在由氮(N2)气产生的电感耦合等离子体中产生。
4.根据条款1所述的方法,其还包括在所述SiGe表面上形成氮化物层。
5.根据条款1所述的方法,其中在经处理的所述SiGe表面上沉积所述W层包括将所述衬底暴露于六氟化钨(WF6)和还原剂的交替脉冲。
6.根据条款5所述的方法,其中所述还原剂是硅烷(SiH4)。
7.根据条款5所述的方法,其中经处理的所述SiGe表面防止氟从所述WF6扩散到处于经处理的所述SiGe表面下方的SiGe中。
8.根据条款1所述的方法,其中所述W层的厚度在5埃和30埃之间。
9.根据条款1所述的方法,其中沉积WN层包括将所述特征暴露于六氟化钨(WF6)、还原剂和氮化剂的交替脉冲。
10.根据条款9所述的方法,其中所述还原剂是乙硼烷(B2H6)并且所述氮化剂是氨(NH3)。
11.根据条款9所述的方法,其中所述特征暴露于WF6与还原剂分子,所述WF6与所述还原剂分子的比率大于2:1。
12.根据条款11所述的方法,其中所述比率大于2.5:1。
13.根据条款1所述的方法,其还包括使所述WN层脱卤。
14.根据条款13所述的方法,其中使所述WN层脱卤包括使其暴露于由氢(H2)和氩(Ar)产生的等离子体。
15.根据条款1所述的方法,其中在所述SiGe表面上沉积所述W层期间,所述W层的全部或一部分被转换成硅化钨层。
下面参考附图进一步描述这些方面以及其他方面。
附图说明
图1是根据某些实施方式的钨(W)触点与硅锗(SiGe)层的示意图的示例。
图2是根据某些实施方式的包括形成W触点与SiGe层的方法中的操作的流程图。
图3A-3D图示了参照图2描述的方法中的某些操作的示意图的示例。
图4示出了根据沉积在2k埃SiGe上的某些实施方式的对于三层覆盖膜叠层在不同厚度处的电阻率。
图5是根据实施方式的适合于进行沉积工艺的处理系统的框图。
图6是示出根据某些实施方式可以使用的歧管系统的基本特征的示意图。
具体实施方式
在接下来的描述中,许多具体细节被阐述以提供对所呈现的实施方式的透彻理解。所公开的实施方式可在没有这些具体细节中的一些或全部的情况下被实施。另一方面,公知的工艺操作没有被详细描述以免不必要地模糊所公开的实施方式。虽然所公开的实施方式将结合具体实施方式进行描述,但应当理解,这并非意图限制所公开的实施方式。
半导体器件制造往往涉及例如在沟槽或通孔中钨(W)膜的沉积,以形成互连。在沉积W膜的常规方法中,W成核层首先被沉积到通孔或触头中。通常,成核层是薄共形层,用于促进主体材料在其上面的后续形成。W成核层可被沉积为共形地涂覆特征的侧壁和底部。与底下特征的底部和侧壁共形对支撑高品质的沉积而言可以是关键的。成核层往往利用原子层沉积(ALD)方法或脉冲成核层(PNL)方法进行沉积。
在PNL技术中,反应剂的脉冲按顺序注入并典型地通过反应剂之间的吹扫气体(purge gas)的脉冲而从反应室清除。第一反应剂可被吸附到衬底上,可用于与下一反应剂反应。该工艺以循环方式重复,直到达到希望的厚度。PNL类似于ALD技术。PNL通常与ALD的区别在于它的较高的操作压强范围(大于1托(Torr))和它的较高的每周期生长速率(大于每周期1单层膜生长)。PNL沉积过程中的室压可在从约1托至约400托的范围。然而,在本文所提供的描述的上下文中,PNL广泛地体现了顺序添加用于半导体衬底上的反应的反应剂的任何循环工艺。因此,该构思具体体现通常称为ALD的技术。在所公开的实施方式的上下文中,CVD体现了反应剂被一起引入到反应器的工艺。PNL和ALD工艺不同于CVD工艺,反之亦然。
在W成核层被沉积之后,通常通过化学气相沉积(CVD)工艺、通过使用诸如氢(H2)之类的还原剂还原六氟化钨(WF6)来沉积体W。以下给出用于沉积含W膜的PNL和CVD工艺的更多细节。
对于某些钨金属化应用,可以使用氮化钨(WN)扩散阻挡层。一种这样的应用是与硅锗(SiGe)特征接触的DRAM金属触点。WN阻挡层具有优于诸如钛粘附层/氮化钛阻挡层(Ti/TiN)双层之类的阻挡层的多个优点。这些优点包括共形沉积薄WN层的能力和将WN直接沉积在没有粘合层的电介质上的能力。这些优点使更多的空间可用W填充,从而降低了整体接触电阻。此外,WN层的沉积可以在比Ti/TiN低得多的温度下进行,从而使得其对于低热预算应用是有利的。
本文提供了WN沉积的方法。还提供了用于W触点与SiGe层的叠层以及用于形成它们的方法。叠层包括SiGe/硅化钨(WSix)/WN/W层,其中WSix提供SiGe和WN层之间的欧姆接触。WSix是指任何硅化钨,其中x是任何适当的大于0的整数或非整数。锗(Ge)可以存在于WSix层中。可以在沉积钨闪镀层期间形成硅化物,以避免了对高温退火的需要,使得该工艺对于低热预算应用是有利的。还提供了在使用WF6沉积含W膜中减少F对下层的侵蚀的方法。还提供了执行这些方法的装置。
尽管下面的描述集中于WN沉积作为用于W触点与SiGe特征的扩散阻挡层,但是这些方法可以用于其他环境。例如,这些方法可用于在易受氟(F)或其他卤素侵蚀的任何表面上形成WN层。类似地,虽然下面的描述集中于使用含氟WF6作为含钨前体,但是所述方法也可以用于防止卤素扩散到其他例如六氯化钨(WCl6)或五氯化钨(WCl5)之类的含卤钨前体中。
图1是根据某些实施方式的W触点7与SiGe层5的示意图的示例。SiGe层5可以是例如DRAM架构中的电容器的一部分。W触点7形成在介电层3中。介电层的示例包括硅氧化物。在一些实施方式中,介电层3是由原硅酸四乙酯(TEOS)形成的二氧化硅层。这样的层可以被称为TEOS氧化物层。在W触点7和介电层3之间布置WN阻挡层12。硅化钨(WSix)层14在SiGe层5和WN阻挡层12之间提供欧姆接触。在一些实施方式中,存在SiGe和WN之间的欧姆接触对于W触点的操作是重要的。然而,为了形成WSix层14和WN层12,可以使用WF6作为钨前体。来自WF6的F物质可以扩散到一个或多个下层中并且侵蚀SiGe层5。
根据各种实施方式,本文描述的方法可以包括以下方面中的一个或多个:1)在沉积WN阻挡层之前沉积W闪镀层;2)在沉积含W层之前处理SiGe层;3)在W闪光层和WN层沉积期间高WF6:还原剂比率以减少氟掺入膜叠层中;和4)先前沉积的WN层的脱卤。参考图2和3A-3D讨论这些方面中的每一个的示例性实施方式,并且随后讨论每个方面的进一步的细节。
图2描述了形成可以包括这些方面中的每一个的W触点到SiGe层上的方法。然而,应意识到,可以实施包括仅一个方面或两个或更多个方面的任何组合的特定实施方式。图3A-3D示出了方法200中的某些操作的示意图的示例。
图2图示了根据某些实施方式的形成W触点到SiGe层上的方法200中的操作。该方法开始于提供在SiGe和介电层中形成的特征(202)。例如,该特征可以是通过先前的图案化操作的接触孔形式。该特征的底部是暴露的SiGe表面,该特征的至少一些侧壁具有暴露的氧化硅或其他介电表面。介电表面的示例包括氧化物表面、氮化物表面和碳化物表面。在一些实施方式中,特征可以通过具有高深宽比和/或窄开口来表征。特征的深宽比是深度与开口尺寸的比率。在一些实施方式中,特征的深宽比可以是6:1、10:1、15:1或更大。示例性开口可以在80nm至200nm的范围内。
图3A示出了形成在SiGe层5和介电层3中的特征18的示例。该特征包括侧壁表面20和底表面22。侧壁表面20包括介电层3的暴露表面和朝向特征18的底部的暴露SiGe层5的暴露表面。根据各种实施方式,侧壁表面可以包括或不包括SiGe层5的暴露表面。
回到图2,方法200继续进行,预处理暴露的SiGe表面(204)。根据多种实施方式,预处理涉及暴露的SiGe表面的氮化。这可能涉及将暴露的SiGe表面暴露于含氮等离子体。这种等离子体可以由分子氮(N2)气体产生。示例性的等离子体暴露时间范围从10秒到120秒。在一些实施方式中,通过氮化SiGe层来形成非常薄的氮化物层,例如氮化硅层。该氮化物层作为氟扩散到SiGe层中的瞬态阻挡层,否则可能在随后的操作过程中发生氟扩散到SiGe层中。N2的替代物可以包括其他含氮气体,例如氨(NH3)或肼(N2H2)。在一些实施方式中,等离子体由N2/H2气体产生。在一些实施方式中,可以使用电感耦合等离子体(ICP)。等离子体可以远离衬底产生,使得衬底位于等离子体产生的下游。在一些实施方式中,衬底暴露于具有较高自由基含量而几乎没有或没有离子物质的等离子体。SiGe表面可以被氮自由基饱和以与SiGe反应并形成氮化物。
接下来,在经处理的SiGe层上沉积W层(206)。该层可以被称为W闪镀层。W闪镀层可以通过将衬底暴露于WF6和还原剂来沉积。在一些实施方式中,使用诸如SiH4之类的硅烷作为还原剂。W闪镀层的厚度可以被限制以避免干扰随后的WN沉积并且防止或最小化介电表面上的沉积。在闪镀层沉积过程中的温度可以在从200℃到300℃的范围内,在沉积期间全部或部分W闪镀层被转换成硅化钨层。W闪镀层的示例厚度(包括硅化物部分)在从5埃到30埃的范围内。因为在沉积过程中形成硅化物,所以在一些实施方式中,该工艺可以在没有后续热退火的情况下进行以形成硅化物。
图3B示出了在SiGe层5的暴露部分上包括W闪镀层13的特征18的示例。薄氮化物层(未示出)位于SiGe表面5和W闪镀层之间的界面处并且保护SiGe层5不受在W闪镀层的沉积期间产生的并且否则将扩散到SiGe层5中的氟自由基的影响。
方法200继续进行,沉积与特征共形的WN层(208)。沉积WN层可以通过在热(非等离子体)PNL或ALD工艺中将特征暴露于顺序脉冲的WF6、还原剂和氮化剂来执行。在某些实施方式中,乙硼烷(B2H6)用作还原剂,氨(NH3)是氮化剂。可以使用含硼的还原剂(例如B2H6)而不是含硅还原剂(例如硅烷(SiH4)),因为后者会导致用于WN沉积的成核的延迟显著变长。
在其中WN层的沉积涉及WF6和B2H6脉冲的某些实施方式中,WF6:B2H6的比例为至少2.9:1。高的WF6:B2H6比率减少了氟的侵蚀。用于沉积的示例性衬底温度范围包括250℃至400℃,例如250℃至350℃。在一些实施方式中,使用相对较低的温度来改善台阶覆盖。例如,将温度从325℃降低到300℃,可将台阶覆盖率从69%提高到89%。WN层的厚度可以变化;在一些实施方式中,它在80埃到100埃之间。图3C示出了包括WN阻挡层12的特征18的示例,WN阻挡层12与特征18共形。WN层通常具有至少是W闪镀层的厚度的两倍的厚度并且其厚度可以是W闪镀层的厚度的至少二十倍,其中示例厚度为到/>
方法200继续进行,将WN表面(210)脱卤。WN沉积工艺会在膜中留下残留的氟杂质,这些氟杂质会扩散到下层并侵蚀SiGe层。使表面脱卤可能涉及将表面暴露于由诸如H2之类的含氢气体产生的等离子体。在一些实施方式中,等离子体由Ar/H2混合物或N2/H2混合物产生。等离子体中的H自由基与氟杂质反应形成HF气体,HF气体可从处理室排出。
然后用W填充该特征(212)。特征填充会涉及使用含W前体和还原剂的W体层的CVD沉积。例如,可以使用WF6和H2。图3D显示了现在已用钨填充以形成W触点7的特征18的示例。
如上所述,本文描述的方法可以包括以下方面中的任何一个或多个:1)在沉积WN阻挡层之前沉积W闪镀层;2)在使用含卤化学物质沉积含钨层之前处理SiGe层;3)在WN层沉积期间的高WF6:还原剂比率以减少氟掺入;和4)WN层的脱卤。每个的更多细节在下面提供:
W闪镀层的沉积:在沉积WN阻挡层之前,在SiGe或其他表面上提供W闪镀层。W闪镀层可以与SiGe层反应以形成二元或三元化合物并且提供WN阻挡层和SiGe层或其他下层之间的欧姆接触。在一些实施方式中,形成硅化钨层。
在一些实施方式中,W闪镀层的厚度可以被限制为约5埃至约30埃。在覆盖膜叠层上,较薄的W闪镀层导致较低的电阻率。如果W闪镀层太厚,则可能导致高深宽比特征的底部侧壁处的不连续的WN生长。这可能是闪镀层沉积的影响。在一个实例中,在17:1的深宽比,90nm的开口特征中沉积的16埃的W闪镀层导致连续的WN沉积,而在相同尺寸的特征中沉积约32埃厚的W闪镀层导致不连续WN沉积。此外,通过限制沉积循环的数量和W闪镀层厚度,可以防止或限制特征中的介电表面上的沉积。在一些实施方式中,介于5埃至30埃之间的W闪镀层导致可接受的低电阻率和连续的WN生长。
为了对W闪镀层的厚度保持严格的控制,使用诸如PNL或ALD工艺之类的表面介导工艺。将含钨前体和还原剂的脉冲顺序地引入容纳衬底的室中。在一些实施方式中,硅烷被用作还原剂而不是硼烷。已经发现,使用SiH4沉积在SiGe层上的W闪镀层比使用B2H6作为还原剂沉积的W闪镀层导致更低的电阻率接触。
图4示出了对于沉积在SiGe上的三个覆盖膜叠层在不同厚度下的电阻率。叠层A包括使用七个WF6/SiH4沉积的W闪镀层和使用WF6/B2H6/NH3循环沉积的WN层。叠层B包括使用七个WF6/SiH4沉积的W闪镀层和使用WF6/B2H6/NH3循环沉积的WN层。A和B工艺中WN层的工艺条件是不同的。叠层C不包括W闪镀层,其仅具有使用与用于沉积叠层A的WN层的工艺相同的工艺沉积的WN层。
箭头表示包括闪镀层的膜叠层与没有闪镀层的膜叠层在和/>时的比较。在/>时,W闪镀层导致电阻率降低约40%;而在/>时,其导致电阻率降低约15%。
在沉积含钨层之前处理SiGe层:通过将SiGe层暴露于诸如N2之类的含氮气体,可以形成非常薄的氮化物层。也可以使用其他含氮气体,如NH3或N2H2。可以避免含氧气体,因为其会导致形成诸如氧化硅之类的氧化物。虽然氧化物也可以保护SiGe层免受氟扩散,但它们可以导致更高电阻率的膜。
氮气预处理还可以防止氧气渗透。来自环境中的氧气可能会侵蚀SiGe并导致更高的电阻率。例如,氟可以蚀刻SiGe层,允许W穿透。然后W可能被穿透SiGe层的氧(O)氧化,导致更高的电阻率。
表1显示了以下三种工艺中的每一个的比较结果:工艺1-无预处理,无W闪镀层,以及有WN层;工艺2-无预处理,有WF6/SiH4沉积的W闪镀层,和WN层;和工艺3-N2等离子体预处理,WF6/SiH4沉积的W闪镀层,和WN层。
从TEM图像中观察到SiGe侵蚀,使用电子能量损失光谱(EELS)和二次离子质谱(SIMS)分析下面的SiGe层中的F和O浓度。
表1:各种工艺顺序的电阻率和杂质结果
表1中的结果表明,预处理对于低电阻率和低杂质是关键的。
在W闪镀层和WN的沉积期间的高WF6:还原剂比率:通过在WN阻挡层沉积工艺中使用高WF6:还原剂比率(就达到晶片表面的总分子量而言),可以减少SiGe侵蚀。导致这种情况发生的机理是通过减少表面上的吸附还原剂的位点的数目,从而减少将使WF6发生反应的位点的数目。因此,尽管沉积室中有更多的氟物质,但在表面附近会发生较少的反应。在一些实施方式中,还原剂可以用惰性气体稀释。
表2示出了在SiGe层中以特征形式沉积WN中各种WF6:B2H6的比率的SiGe侵蚀结果。
表2:在WN沉积中各种WF6:B2H6比率的SiGe侵蚀观察
通过透射电子显微镜(TEM)图像确定SiGe层的完整性。比率大于2:1的WF6:B2H6可用于减少或防止SiGe侵蚀。在一些实施方案中,WF6:B2H6的比率大于2.5:1或大于3:1。
WF6:B2H6的比率是指衬底暴露所针对的分子比可用于反应的分子的比率。它可以从以下计算得出:
管线增压是加压分配,并在下面参考图6进一步讨论。投配时间是指投配(也称为脉冲)持续的时间量。虽然上述数值针对WF6被B2H6还原而给出的,但是对于SiH4还原WF6也观察到类似的效果。因此,WF6:SiH4的比率大于2:1,大于2.5:1或大于3:1。
考虑到反应化学计量比,还可以计算其他卤化的含W前体和/或其他还原剂的合适比率。
WN表面的脱卤:这涉及与扩散的卤素反应以形成所形成的化合物(例如HF)的H自由基。在一些实施方式中,由H2和惰性气体如氩(Ar)产生等离子体。Ar轰击表面可以通过解吸吸附在WN表面上的卤素来促进脱卤。等离子体强度可以针对氟杂质的量调整。对于某些工艺,在衬底上没有施加偏置的温和等离子体有效去除氟。在一些实施方式中,如果存在显著量的氟,则可以使用包括施加的衬底偏置的更具腐蚀性的工艺。在一些实施方式中,使用远程ICP等离子体源来产生等离子体。
本文公开的方法涉及用于沉积薄层和特征填充的PNL和CVD工艺。下面给出含钨膜的沉积的进一步的细节。在一些实现方式中,本文所述的方法涉及在沉积体层之前沉积钨成核层。如上所述,成核层通常是薄的共形层,其有利于随后在其上沉积含钨主体材料。根据各种实现方式,可以在特征的任何填充之前和/或在填充特征期间的随后的时点沉积成核层。
在某些实施方式中,使用PNL技术沉积成核层和其他层。在PNL技术中,还原剂、任选吹扫气体和含钨前体的脉冲被顺序地注入反应室并从反应室清除。该过程以循环方式重复,直到达到所需的厚度。PNL广泛地体现了连续添加用于在半导体衬底上反应的反应物的任何循环过程,其包括原子层沉积(ALD)技术。用于沉积钨成核层的PNL技术在美国专利No.6,635,965;No.7,005,372;No.7,141,494;No.7,589,017,No.7,772,114,No.7,955,972和No.8,058,170,以及美国专利公开No.2010-0267235中有记载,所有这些专利通过引用整体并入本文。成核层厚度可取决于成核层沉积方法以及所希望的主体沉积质量。通常,成核层厚度足以支撑高质量,均匀的主体沉积。示例的范围可以从10埃到100埃。
在某些实现方式中,主体钨可以直接沉积在特征中而不使用成核层。例如,在一些实施方式中,特征表面和/或已经沉积的底层支撑主体钨沉积。在一些实现方式中,可以执行不使用成核层的主体钨沉积工艺。例如,2012年7月27日提交的美国专利申请No.13/560,688(其通过引用并入本文)描述了在没有成核层的情况下沉积钨主体层。
在各种实现方式中,钨成核层沉积可涉及暴露于诸如六氟化钨(WF6)或六氯化钨(WCl6)之类的含钨前体。
还原剂的示例可以包括:含硼还原剂,其包括乙硼烷(B2H6)和其他硼烷;含硅还原剂,其包括硅烷(SiH4)和其他硅烷;肼和锗烷。在一些实现方式中,含钨前体的脉冲可以与一种或多种还原剂的脉冲交替,例如S/W/S/W/B/W等,W代表含钨前体,S代表含硅前体,B代表含硼前体。
根据各种实现方式,氢气可以或可以不在背景中运行。此外,在一些实现方式中,可以在钨成核层的沉积之后进行一个或多个处理操作,接着再进行钨主体沉积。处理沉积的钨成核层以降低电阻率在例如美国专利No.7,772,114和No.8,058,170以及美国专利公开No.2010-0267235中描述,这些专利通过引用并入本发明。
这里描述的WN层的沉积也可以由PNL执行。这样的工艺包括含钨前体、还原剂和氮化剂的脉冲。合适的氮化剂的实例包括NH3和N2H4。
在许多实现方式中,钨主体沉积可以通过CVD工艺进行,其中还原剂和含钨前驱物流入沉积室以在该特征中沉积主体填充层。可以使用惰性载气来输送一种或多种反应物流,其可以预先混合或者可以不预先混合。与PNL或ALD工艺不同,该操作通常涉及使反应物连续地流动直到期望的量被沉积。在某些实现方式中,CVD操作可以以多个阶段进行,反应物的多个连续和同时流动的多个时段被转向的一个或多个反应物流的时段分开。
包括但不限于WF6、WCl6和W(CO)6的各种含钨气体可用作含钨前体。在某些实现方式中,含钨前体是含卤素的化合物,例如WF6。在某些实现方式中,还原剂是氢气,但是可以使用其他还原剂,包括硅烷(SiH4)、乙硅烷(Si2H6)、肼(N2H4)、乙硼烷(B2H6)和锗烷(GeH4)。在许多实现方式中,在CVD工艺中使用氢气作为还原剂。在一些其他实现方式中,可以使用可以分解以形成主体钨层的钨前体。使用其他类型的工艺(包括ALD工艺)也可以进行主体沉积。
温度的示例可以在200℃至500℃的范围内。根据各种实现方式,本文所述的任何CVD W操作可采用低温CVD W填充,例如在约250℃-350℃或约300℃进行。
沉积可根据各种实现方式进行,直到实现某一特征轮廓和/或沉积一定量的钨为止。在一些实现方式中,沉积时间和其他相关参数可以通过建模和/或试错误来确定。在一些实施方式中,处理室可配备有各种传感器以执行用于沉积操作的终点检测的原位计量测量。原位测量的示例包括用于确定沉积的膜的厚度的光学显微镜和X射线荧光(XRF)。
应该理解的是,本文所述的钨膜可以包括一定量的其他化合物、掺杂剂和/或杂质,例如氮、碳、氧、硼、磷、硫、硅、锗等,具体取决于所使用的特定的前体和工艺。该膜中的钨含量范围可以从20%到100%(原子)的钨。在许多实现方式中,所述膜是富含钨的,具有至少50%(原子)钨,或甚至至少约60%、75%、90%或99%(原子)的钨。在一些实现方式中,膜可以是金属或元素钨(W)和其他含钨化合物(如碳化钨(WC)、氮化钨(WN)等)的混合物。
特征内材料的分布可以通过其台阶覆盖率来表征。台阶覆盖率是两个厚度的比率,即在特征内部材料的厚度除以开口附近材料的厚度。对于特征填充,高台阶覆盖率可能是合乎期望的。
装置
任何合适的室可被用于执行所公开的实施方式。示例沉积装置包括各种系统,例如,可从加利福尼亚州费里蒙特市的朗姆研究公司获得的和/>Max、或者各种其他市售处理系统中的任何一种。工艺可在多个沉积站上平行执行。
图5是适于根据本发明的实施方式进行沉积工艺的处理系统的框图。系统500包括传送模块503。传送模块503提供清洁、加压的环境以最小化处理中的衬底在它们在各反应器模块之间移动时的污染风险。安装在传送模块503上的是能够根据本发明的实施方式执行PNL沉积和CVD沉积的多站反应器509。室509可包括可顺序执行这些操作的多个站511、513、515和517。例如,室509可被配置使得站511和513执行W闪镀层和WN层的沉积,而站513和515执行CVD。每个沉积站可以包括加热的晶片基架以及喷头、分散板或其他气体入口。
在传送模块503上还可安装能够执行等离子体或化学(非等离子体)预清洁的一或多个单一或多站模块507。在这里描述的实施方式中,一个或多个模块507可以用于执行上述的等离子体预处理和等离子体后处理。
系统500还包括在处理之前和之后储存晶片的一或多个(在该实例中为两个)晶片源模块501。大气传送室519中的大气机械手(未图示)首先将晶片从源模块501转移到装载锁521。传送模块503中的晶片传送设备(通常为机械臂单元)将晶片从装载锁521移动到安装在传送模块503上的模块并在安装在传送模块503上的模块中传送。
在一定的实施方式中,系统控制器529被采用来控制沉积过程中的工艺条件。控制器将通常包括一或多个存储器设备和一或多个处理器。处理器可包括CPU或计算器、模拟和/或数字输入/输出连接部、步进马达控制器板,等等。
在一些实施方式中,控制器是系统的组成部分,该系统可以是上述实施例的组成部分。这种系统可包括半导体处理设备,半导体处理设备包括一或多个处理工具、一或多个室、用于处理的一或多个平台、和/或具体处理部件(晶片基架、气体流系统等)。这些系统可与用于在半导体晶片或衬底的处理之前、之中以及之后控制它们的操作的电子器件集成。电子器件可指“控制器”,控制器可控制一或多个系统的各种部件或子部。根据处理要求和/或系统类型,控制器可被编程以控制此处所公开的任何工艺,包括工艺气体的输送、温度设置(例如,加热和/或冷却)、压强设置、真空设置、功率设置、射频(RF)发生器设置、RF匹配电路设置、频率设置、流率设置、流体输送设置、定位和操作设置、进出工具和其他传送工具和/或连接到或与具体系统交接的装载锁的晶片传送。
广义地说,控制器可被定义为接收指令、发布指令、控制操作、实现清洁操作、实现端点测量等的具有各种集成电路、逻辑、存储器和/或软件的电子器件。集成电路可包括存储程序指令的固件形式的芯片、数字信号处理器(DSP)、限定为专用集成电路(ASIC)的芯片、和/或一或多个微处理器、或执行程序指令(例如,软件)的微控制器。程序指令可以是以种种个体设置(或程序文件)的形式与控制器通信、定义用于在半导体晶片上或为半导体晶片或者对系统执行特定工艺的操作参数的指令。在一些实施方式中,操作参数可以是配方的组成部分,配方由工艺工程师定义以在晶片的一或多个层、材料、金属、氧化物、硅、二氧化硅、表面、电路和/或裸片的制造过程中完成一或多个处理步骤。
在一些实施方式中,控制器可以是计算机的组成部分或耦合到计算机,计算机与该系统集成或耦合到该系统、否则网络连接到该系统、或者它们的组合。例如,控制器可在“云”中或者是工厂主机计算机系统的整体或组成部分,可允许晶片处理的远程访问。计算机可实现对该系统的远程访问以监控制造操作的当前进程、检查过去的制造操作的历史、检查来自多个制造操作的趋势或性能指标,以改变当前工艺的参数,以设置处理步骤从而跟随当前工艺,或者以开始新的工艺。在一些实施例中,远程计算机(例如,服务器)可通过网络提供工艺配方给系统,网络可包括局域网或互联网。远程计算机可包括实现参数和/或设置的输入或编程的用户界面,参数和/或设置接着从远程计算机被传送给该系统。在一些实施例中,控制器接收数据形式的指令,所述数据指明要在一或多个操作期间执行的处理步骤中的每一个步骤的参数。应当理解,所述参数针对待执行的工艺的类型和工具的类型可以是特定的,控制器被配置为与所述工具交接或控制所述工具。因此,如前所述,控制器可以是分布式的,比如通过包括被网络连接在一起且为共同目的(比如本文所述的工艺和控制)工作的一或多个分立控制器。为这种目的的分布式控制器的示例可以是在与位于远程的(比如在平台层面或者作为远程计算机的组成部分)一或多个集成电路通信的室上的一或多个集成电路,其结合来控制该室上的工艺。
示例系统可包括但不限于等离子体蚀刻室或模块、沉积室或模块、旋转漂洗室或模块、金属电镀室或模块、清洁室或模块、倒角蚀刻室或模块、物理气相沉积(PVD)室或模块、化学气相沉(CVD)积室或模块、原子层沉积(ALD)室或模块、原子层蚀刻(ALE)室或模块、离子注入室或模块、跟踪室或模块、以及可与半导体晶片的制造和/或生产相关联或者在半导体晶片的制造和/或生产中使用的任何其他半导体处理系统。
如前所述,根据待由工具执行的一或多个工艺步骤,控制器可与其他工具电路或模块、其他工具部件、簇工具、其他工具接口、相邻工具、邻近工具、纵贯工厂、主机、另一控制器分布的工具、或者在带着晶片容器往来于半导体制造工厂中的工具位置和/或装载端口的材料运输中使用的工具中的一或多个通信。
控制器可控制沉积装置的活动中的全部。系统控制器执行系统控制软件,系统控制软件包括用于控制定时、气体的混合物、室压、室温、晶片温度、射频(RF)功率电平(如果使用)、晶片卡盘或基架位置以及特殊工艺的其他参数的成组的指令。存储在与控制器相关联的存储器设备的其他计算机程序可在一些实施方式中被采用。
通常会有与控制器相关联的用户界面。用户界面可包括显示屏、该装置和/或工艺条件的图形软件显示器以及诸如指点设备、键盘、触摸屏、话筒等用户输入设备。
系统控制逻辑可以用任何合适的方式来配置。一般而言,该逻辑可被设计或配置在硬件和/或软件中。用于控制驱动电路的指令可被硬编码或被提供为软件。指令可通过“编程”提供。这种编程被理解为包括任何形式的逻辑,包括数字信号处理器、专用集成电路以及具有实现为硬件的具体算法的其他器件中的硬编码逻辑。编程还被理解为包括可在通用处理器上执行的软件或固件指令。系统控制软件可以任何合适的计算机可读编程语言进行编码。替代地,控制逻辑可被硬编码在控制器中。为了这些目的,专用集成电路、可编程逻辑器件(例如,现场可编程门阵列或FPGA)等可被使用。在接下来的讨论中,只要“软件”或“代码”被使用的地方,在该位置可使用功能类似的硬编码逻辑。
用于控制沉积和工艺序列中的其他工艺的计算机程序代码可以任何常用计算机可读编程语言编写:例如,汇编语言、C、C++、Pascal、Fortran或其他。编译的目标代码或脚本由处理器执行以完成程序中所识别的任务。
控制器参数与工艺条件有关,比如,例如工艺气体组分和流率、温度、压强、等离子体条件(比如RF功率电平和低频RF频率)、冷却气压、以及室壁温度。这些参数以配方的形式被提供给用户,且可利用用户界面输入。
用于监控工艺的信号可通过系统控制器的模拟和/或数字输入连接部被提供。用于控制工艺的信号在沉积装置的模拟和数字输出连接部上被输出。
系统软件可以许多不同方式被设计或配置。例如,各种室部件子例程或控制对象可被编写来控制执行创造性的沉积工艺所需要的室部件的操作。用于此目的的程序或程序段的示例包括衬底放置代码、工艺气体控制代码、压强控制代码、加热器控制代码和等离子体控制代码。
衬底放置程序可包括用于控制用来将衬底装载到基架或卡盘上以及用来控制衬底和其他室部件(比如气体入口)和/或标靶之间的间隔的室部件的程序代码。工艺气体控制程序可包括用于控制气体组分和流率以及可选地用于在沉积之前使气体流入室中以便稳定室中的压强的代码。压强控制程序可包括用于通过调整例如室的排放系统中的节流阀来控制室中的压强的代码。加热器控制程序可包括用于控制到用于加热衬底的加热单元的电流的代码。替代地,加热器控制程序可控制传热气体(比如氦)到晶片卡盘的输送。
在沉积过程中可被监控的室传感器的示例包括位于基架或卡盘中的质量流量控制器、压力传感器(比如压力计)和热电耦。经恰当编程的反馈和控制算法可与来自这些传感器的数据一起用来维持希望的工艺条件。前述内容描述了所公开的实施方式在单或多室半导体处理工具中的实施。
该装置可以包括气体歧管系统,其向各种气体分配管线提供管线增压(linecharges),如图6中示意性所示。歧管604具有来自含钨前体气体源(未示出)的输入端602,歧管611具有来自硅烷源、乙硼烷源或其他还原气体源(未示出)的输入端609并且歧管621具有来自氮化剂源(未示出)的输入端619。歧管604、611和621分别通过阀控分配管线605、613和625向沉积室提供含钨前体气体、还原气体和氮化剂。打开或关闭各种阀以提供管线增压,即对分配管线加压。例如,为了分配管线605加压,阀606相对于真空关闭,阀608关闭。在合适的时间增量之后,打开阀608并将含钨前体气体输送至室。在输送气体的合适时间之后,关闭阀608。然后可以通过相对于真空打开阀606将腔室清除至真空。
使用类似的方法来输送还原气体和氮化剂。为了引入还原气体,例如通过关闭阀615并相对于真空关闭阀617来给分配管线613增压。打开阀615使得能将还原气体输送到室。类似地,为了引入氮化剂,通过关闭阀627并相对于真空关闭阀623以将给分配管线625增压。阀627的打开允许将氨或其他氮化剂输送到室。管线增压所允许的时间量改变了初始输送气体的数量和时间。下面列出了合适的管线增压时间的一些示例。
图6还示出了真空泵,其中阀606、617和623分别可以打开以清扫系统。通过各种分配管线供应的气体由控制器控制,控制器例如由微处理器、数字信号处理器等控制的质量流量控制器,该控制器以流率、流动持续时间以及过程的顺序编程。
如果该工艺使用含硼还原剂和硅烷还原剂两者,则还原剂可以有两个子系统:一个用于含硼还原剂,另一个用于硅烷。
注意,上述PNL工艺可能需要在PNL-W或PNL-WN沉积期间对阀和向半导体衬底提供试剂脉冲的质量流量控制器(MFC)进行精确定时。在使这成为可能的一种方式中,将阀和MFC命令以包含用于全部或部分PNL沉积序列的所有时间关键命令的指令的离散信息包传送到嵌入式数字输入-输出控制器(IOC)中。朗姆研究公司(Lam Research)的ALTUS系统提供至少一个IOC序列。IOC可以在物理上位于装置的不同位置;例如在处理模块内或在离开处理模块一定距离的独立动力机架上。通常在每个模块中有多个IOC(例如,每个模块3个)。关于序列中包含的实际指令,所有用于控制阀的和设定MFC(用于所有载气和反应气体)的流量的命令都可以包含在单个IOC序列中。这确保了所有设备的定时从绝对的角度以及相对于彼此被严格控制。通常有多个IOC序列在任何给定时间运行。例如,这允许PNL在工作站1-2处运行,并且所有定时都受控于在这些工作站上沉积PNL-WN所需的所有硬件组件。第二序列可能同时运行,以在同一模块中的其他沉积站沉积CVD-W。控制试剂输送到站3-4的设备的相对定时在该组设备内是重要的,但是站1-2处的PNL工艺的相对定时可以从站3-4处的CVD的相对定时偏移。IOC以分组序列翻译信息,并将数字或模拟命令信号直接传送给MFC或控制阀的气动电磁阀组。
在一个示例中,为了实现良好的响应性和可重复性,氮化剂流可以通过以下方式引入:首先使流能够通过氮化剂质量流量控制器(MFC)并且将流转移到工艺真空泵以稳定流,然后将所述剂引入沉积室。为了稳定氮化剂流,在转向阀623打开的同时关闭出口阀627。然后歧管系统对输送管线625加压,以通过在工艺出口阀627关闭大约0.10和3秒之间的情况下关闭转向阀623来确保氮化剂的受控初始脉冲。接着,系统朝向沉积室打开出口阀627,关闭转向阀以在沉积期间将氮化剂递送到处理室。如上所述,使用嵌入式输入-输出控制器命令序列可以控制阀定时。上述工艺可以应用于使用PNL或CVD沉积含钨成核层和体层。
用于将含硼气体(例如乙硼烷)输送到室的一个歧管系统序列涉及以下操作。首先,当MFC或其他流量控制装置稳定时,系统将乙硼烷载气混合物转移到真空泵持续一段时间。在一个示例中,这在使用在氮气载气中的5体积%的乙硼烷的混合物进行约0.5秒至5秒。接下来,系统通过关闭转向阀和沉积室的出口来给乙硼烷输送歧管加压。在一个实现方式中,这在约0.1至5秒之间的时间段内完成。当打开沉积室的出口时,这会产生初始的试剂脉冲。在一个实现方式中,出口阀打开约0.1至10秒之间的时间段。在这之后,接着使用合适的载气从室中清除乙硼烷。
含钨气体的脉冲可以如下产生。最初,当MFC或其他流量控制装置稳定时,系统将WF6转移到真空泵一段时间。在一个示例中,这可以进行约0.5至5秒的时间段。接着,系统通过关闭转移阀606和沉积室的出口608来对钨气体输送歧管加压。例如,这可以进行约0.1和5秒之间的时间,以便当打开沉积室的出口时产生初始的试剂脉冲。在一个示例中,这通过打开出口阀308持续约0.1至10秒来完成。之后,使用合适的吹扫气体将含钨气体从沉积室中清除。
硅烷或其他还原气体的脉冲流可以通过控制转向阀617和出口阀615以类似的方式实施。转向、管线加压和流动步骤针对含钨气体示例可以如上所述定时。在用还原性气体施以脉冲约0.1至10秒之后,关闭出口阀615,并使吹扫气体流过室。
前述内容描述了所公开的实施方式在单或多室半导体处理工具中的实施。本文所述的装置和工艺可结合光刻图案化工具或工艺被用于例如半导体器件、显示器、LED、光伏板等的制造或生产。通常但不是必须,这种工具/工艺会在通用制造设施中被一起使用或执行。膜的光刻图案化通常包括下列步骤中的一些或全部,每个步骤具有若干可用工具:(1)使用旋涂或喷涂工具将光致抗蚀剂施加到工件(即衬底)上;(2)使用热板或炉子或UV固化工具固化光致抗蚀剂;(3)使用诸如步进式晶片曝光器之类的工具将光致抗蚀剂暴露于可见光或UV光或x射线;(4)使用诸如湿式工作台之类的工具将抗蚀剂显影以便选择性地去除抗蚀剂从而使其图案化;(5)通过使用干法或等离子体辅助蚀刻工具将抗蚀剂图案转印到下层膜或工件中;以及(6)使用诸如RF或微波等离子体抗蚀剂剥离器之类的工具去除抗蚀剂。
结论
虽然出于清楚理解的目的对前述实施方式进行了一定程度的详细描述,但应当理解,某些改变和修改可在所附权利要求的范围内进行。应当注意,实现所呈现的实施方式的工艺、系统、以及装置有许多替代方式。据此,所呈现的实施方式应当被视为说明性的而非限制性的,且这些实施方式并不受限于此处给出的细节。
Claims (15)
1.一种方法,其包括:
提供形成在衬底上的介电层和硅锗(SiGe)层中的特征,其中所述特征包括硅锗(SiGe)表面;
将所述硅锗(SiGe)表面暴露于氮自由基以处理所述硅锗(SiGe)表面;
在经处理的所述硅锗(SiGe)表面上沉积钨(W)层;以及
沉积与所述特征共形的氮化钨(WN)层。
2.根据权利要求1所述的方法,其还包括用钨(W)填充所述特征。
3.根据权利要求1所述的方法,其中氮自由基在由氮(N2)气产生的电感耦合等离子体中产生。
4.根据权利要求1所述的方法,其还包括在所述硅锗(SiGe)表面上形成氮化物层。
5.根据权利要求1所述的方法,其中在经处理的所述硅锗(SiGe)表面上沉积所述钨(W)层包括将所述衬底暴露于六氟化钨(WF6)和还原剂的交替脉冲。
6.根据权利要求5所述的方法,其中所述还原剂是硅烷(SiH4)。
7.根据权利要求5所述的方法,其中经处理的所述硅锗(SiGe)表面防止氟从所述六氟化钨(WF6)扩散到处于经处理的所述硅锗(SiGe)表面下方的硅锗(SiGe)中。
8.根据权利要求1所述的方法,其中所述钨(W)层的厚度在5埃和30埃之间。
9.根据权利要求1所述的方法,其中沉积氮化钨(WN)层包括将所述特征暴露于六氟化钨(WF6)、还原剂和氮化剂的交替脉冲。
10.根据权利要求9所述的方法,其中所述还原剂是乙硼烷(B2H6)并且所述氮化剂是氨(NH3)。
11.根据权利要求9所述的方法,其中所述特征暴露于六氟化钨(WF6)与还原剂分子,所述六氟化钨(WF6)与所述还原剂分子的比率大于2:1。
12.根据权利要求11所述的方法,其中所述比率大于2.5:1。
13.根据权利要求1所述的方法,其还包括使所述氮化钨(WN)层脱卤。
14.根据权利要求13所述的方法,其中使所述氮化钨(WN)层脱卤包括使其暴露于由氢(H2)和氩(Ar)产生的等离子体。
15.根据权利要求1所述的方法,其中在所述硅锗(SiGe)表面上沉积所述钨(W)层期间,所述钨(W)层的全部或一部分被转换成硅化钨层。
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