CN109148400B - 用于解决电迁移的布局构造 - Google Patents

用于解决电迁移的布局构造 Download PDF

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Publication number
CN109148400B
CN109148400B CN201811322947.9A CN201811322947A CN109148400B CN 109148400 B CN109148400 B CN 109148400B CN 201811322947 A CN201811322947 A CN 201811322947A CN 109148400 B CN109148400 B CN 109148400B
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Prior art keywords
interconnect
pmos
interconnects
nmos
drains
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Chinese (zh)
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CN109148400A (zh
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S·H·拉苏里
A·达塔
O·翁
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Qualcomm Inc
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Qualcomm Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/168—Modifications for eliminating interference voltages or currents in composite switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/482—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes for individual devices provided for in groups H10D8/00 - H10D48/00, e.g. for power transistors
    • H10W20/484—Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN201811322947.9A 2013-08-23 2014-08-21 用于解决电迁移的布局构造 Active CN109148400B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US13/975,074 US9786663B2 (en) 2013-08-23 2013-08-23 Layout construction for addressing electromigration
US13/975,074 2013-08-23
PCT/US2014/052020 WO2015027025A1 (en) 2013-08-23 2014-08-21 Layout construction for addressing electromigration
CN201480046232.9A CN105474393B (zh) 2013-08-23 2014-08-21 用于解决电迁移的布局构造

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN201480046232.9A Division CN105474393B (zh) 2013-08-23 2014-08-21 用于解决电迁移的布局构造

Publications (2)

Publication Number Publication Date
CN109148400A CN109148400A (zh) 2019-01-04
CN109148400B true CN109148400B (zh) 2022-05-10

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CN201480046232.9A Active CN105474393B (zh) 2013-08-23 2014-08-21 用于解决电迁移的布局构造

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US (4) US9786663B2 (https=)
EP (1) EP3036768B1 (https=)
JP (2) JP6199494B2 (https=)
CN (2) CN109148400B (https=)
DE (1) DE602014007453C5 (https=)
WO (1) WO2015027025A1 (https=)

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US9972624B2 (en) 2013-08-23 2018-05-15 Qualcomm Incorporated Layout construction for addressing electromigration
EP3838512A1 (en) 2014-09-17 2021-06-23 Soft Robotics, Inc. Reinforced soft robotic actuators
US10189168B2 (en) 2014-11-18 2019-01-29 Soft Robotics, Inc. Soft robotic actuator enhancements
US10157254B2 (en) * 2015-12-29 2018-12-18 Taiwan Semiconductor Manufacturing Co., Ltd. Techniques based on electromigration characteristics of cell interconnect
US9990454B2 (en) 2016-06-03 2018-06-05 International Business Machines Corporation Early analysis and mitigation of self-heating in design flows
CN112585752B (zh) * 2018-09-05 2023-09-19 东京毅力科创株式会社 3d逻辑和存储器的配电网络
US11738893B2 (en) 2019-04-30 2023-08-29 Soft Robotics, Inc. Picking, placing, and scanning bagged clothing and other articles
DE102020104141B4 (de) * 2020-02-18 2021-09-02 Infineon Technologies Ag Chip und verfahren zur herstellung eines chips

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Also Published As

Publication number Publication date
US20170221826A1 (en) 2017-08-03
JP2018014507A (ja) 2018-01-25
US20180342515A1 (en) 2018-11-29
US11437375B2 (en) 2022-09-06
CN105474393B (zh) 2018-11-30
JP6199494B2 (ja) 2017-09-20
CN109148400A (zh) 2019-01-04
EP3036768B1 (en) 2017-03-08
US9786663B2 (en) 2017-10-10
US20200152630A1 (en) 2020-05-14
US10074609B2 (en) 2018-09-11
US10580774B2 (en) 2020-03-03
US20150054567A1 (en) 2015-02-26
WO2015027025A1 (en) 2015-02-26
JP2016535454A (ja) 2016-11-10
EP3036768A1 (en) 2016-06-29
JP6449394B2 (ja) 2019-01-09
CN105474393A (zh) 2016-04-06
DE602014007453C5 (de) 2023-06-22

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