CN108155194A - 显示装置 - Google Patents

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Publication number
CN108155194A
CN108155194A CN201711192163.4A CN201711192163A CN108155194A CN 108155194 A CN108155194 A CN 108155194A CN 201711192163 A CN201711192163 A CN 201711192163A CN 108155194 A CN108155194 A CN 108155194A
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CN
China
Prior art keywords
area
semiconductor layer
display device
gallium
oxide semiconductor
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Granted
Application number
CN201711192163.4A
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English (en)
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CN108155194B (zh
Inventor
刘敏钻
许乃方
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Innolux Corp
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Innolux Display Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
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    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G—PHYSICS
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
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    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
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    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/047—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using sets of wires, e.g. crossed wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
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    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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    • H10K59/131—Interconnections, e.g. wiring lines or terminals
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs

Abstract

本揭露提供一显示装置，包含：一第一基板；一第一晶体管设置于该第一基板之上，其中，该第一晶体管包含一氧化物半导体层；以及一第二晶体管设置于该第一基板之上，其中，该第二晶体管包含一硅半导体层，其中，该氧化物半导体层包含铟、镓、以及氧；且在该氧化物半导体层中，氧的原子百分比比上铟和镓的原子百分比的和大于或等于1且小于或等于3。

Description

显示装置
技术领域
本揭露关于一种显示装置，更具体地，关于一种具有包含各种元素浓度的氧化物半导体层的晶体管的显示装置。
背景技术
随着显示器相关技术的不断进步，所有的显示面板现今均朝体积小、厚度薄、和亮度高发展。这种趋势使薄型显示器，如液晶显示面板、有机发光二极管显示面板和无机发光二极管显示面板，将阴极射线管显示器取代为市场上的主流显示装置。薄型显示器的应用很多，大多数应用于日常使用的电子产品，例如手机、笔记本电脑、摄影机、静态照相机、音乐播放器、移动导航装置和电视机均采用这样的显示面板。
虽然液晶显示装置和有机发光二极管显示装置在市场上很受欢迎，特别是其中LCD显示装置享有技术成熟度，但是制造商甚至付出更多努力在显示质量方面来改善显示装置，从而应对显示装置的持续的技术发展和消费者日益增长的需求。
薄膜晶体管(TFT)可以是具有高载子移动率的多晶硅薄膜晶体管(TFT)，或具有低泄漏的金属氧化物薄膜晶体管(TFT)。目前没有组合这两种晶体管形式的显示器，因为用于制造这两种晶体管的制造过程并不兼容，使这种显示装置的整体制造变得复杂(例如通过需要更多次的化学气相沉积)。
有鉴于此，有需要改进和简化用于制造具有多晶硅薄膜晶体管(TFT)和金属氧化物薄膜晶体管(TFT)的薄膜晶体管(TFT)基板的过程。
发明内容
本揭露的目的为提供一包含具有氧化物半导体层的晶体管的显示装置，其中，调整该氧化物半导体层中元素的原子百分比以提供改善的电气性能或可靠度。
于本揭露的一形式，显示装置包含：一第一基板；一第一晶体管设置于该第一基板之上，其中，该第一晶体管包含一氧化物半导体层；以及一第二晶体管设置于该第一基板之上，其中，该第二晶体管包含一硅半导体层，其中，该氧化物半导体层包含铟、镓、以及氧；且在该氧化物半导体层中，氧的原子百分比比上铟和镓的原子百分比的和大于或等于1且小于或等于3。
于本揭露的另一形式，显示装置包含：一第一基板；以及一第一晶体管设置于该第一基板之上，其中，该第一晶体管包含一氧化物半导体层，其中，该氧化物半导体层包含铟、镓、锌、以及氧；在该氧化物半导体层中，氧的原子百分比比上铟和镓的原子百分比的和大于或等于1且小于或等于3；以及在该氧化物半导体层中，铟和镓的原子百分比的和比上锌的原子百分比大于或等于1且小于或等于3。
在上述两形式的显示装置中，调整于第一晶体管中氧化物半导体层的元素的原子百分比，更具体地，在氧化物半导体层中，氧的原子百分比比上铟和镓的原子百分比的和大于或等于1且小于或等于3，即1≦O/(In+Ga)≦3。
当氧化物半导体层中的原子百分比在上述范围内时，包含氧化物半导体层的第一晶体管具有改善的电气性能和可靠度。
从下列结合附图的详细描述中，本揭露的其他目的、优点和新颖特征将变得更加明显。
附图说明
图1为根据本揭露一实施例的显示装置的剖面示意图。
图2为根据本揭露一实施例的显示装置的俯视图。
图3为根据本揭露一实施例的显示装置的像素的等效电路图。
图4为根据本揭露一实施例的显示装置的剖面示意图。
图5为根据本揭露一实施例的晶体管的剖面示意图。
图6为沿着图5所示的线L1-L1’的氧化物半导体层的通道区域的分析结果。
图7为沿着图5所示的线L2-L2’的氧化物半导体层的源极和漏极接触区域的分析结果。
【符号说明】
1 第一基板 T1 驱动薄膜晶体管
2 第二基板 T2 切换薄膜晶体管
3 显示介质 T3 重置薄膜晶体管
11 印刷电路板 T4 发光薄膜晶体管
12 IC Sn 扫描信号
13 解多任务器 Data 数据信号
14 驱动电路 Vini 初始化电压
15 像素单元 RST 重置信号
13a 硅半导体层 En 发光控制信号
131 源极区域 C1 第一电容器
132 通道区域 Cst 第二电容器
133 漏极区域 VDD 驱动电压
151、43 栅极电极 OLED 有机发光二极管
152 第一栅极电极 VSS 共同电压
171 源极电极 AA 显示区域
172 漏极电极 B 周边区域
191、192、45 氧化物半导体层 41 第一缓冲层
201、202”、46 第一源极电极 42 第二缓冲层
202、203、47 第一漏极电极 44 栅极绝缘层
23 第一显示电极 48 钝化层
25 有机发光层 451 第一区域
26 第二显示电极 452 第二区域
具体实施方式
当与附图一起阅读以下实施例时，可清楚地展现本揭露的上述和其他技术内容、特征以及效果，通过特定实施例的说明，人们将更了解本揭露用以达成上述目的的技术手段和效果。此外，由于本揭露应轻易地被理解且可通过本领域的技术人员实现，所有与本揭露不背离的等效改变或修饰应被包含在所附权利要求保护范围中。
再者，说明书与请求项中所述的序数例如“第一”、“第二”等仅作为描述所请求的组件，并非暗示或表示该请求组件有任何进行的序数，也不代表某一请求组件与另一请求组件的顺序、或是制造方法上的顺序，该些序数的使用仅用来使具有某命名的一请求组件得以和另一具有相同命名的请求组件能作出清楚区分。
此外，说明书与请求项中所述的例如“上面”、“之上”或“上”表示不仅是直接地与另一第一基板或膜接触，也表示间接地与另一第一基板或膜接触。
实施例
图1为本实施例的显示装置的剖面示意图。其中，该实施装置包含：一第一基板1；与该第一基板1相对的一第二基板2；以及一显示介质层3位于该第一基板1和该第二基板2之间。在本实施例中，该第一基板1和该第二基板2可由玻璃、塑料、可挠材料或薄膜制备；但本揭露并不局限于此。当该第一基板1和该第二基板2由塑料、可挠材料或薄膜制备时，该显示装置可为一可挠式显示装置。在本实施例中，该显示介质3可包含一液晶层或一发光二极管(例如：一无机发光二极管或一有机发光二极管)；但本揭露并不局限于此。此外，在本揭露的另一实施例中，当该显示介质3为发光二极管时，该显示装置可以选择性地不包含第二基板2。
图2为本实施例的显示装置的俯视图。如图1和2所示，本实施例的显示装置包含：一显示区域AA和一周边区域B，且该周边区域B与该显示区域AA相邻。如图2所示，本实施例的显示装置包含：一印刷电路板11部分设置于该周边区域B上；一IC 12设置于该周边区域B上，且与该印刷电路板11电性连接；一解多任务器(demultiplexer)13设置于该周边区域B上，且与该IC 12电性连接；一驱动电路14设置于该周边区域B上，且与该IC 12电性连接；以及多个像素单元15设置于该显示区域AA上，其中，该像素单元15接收来自该驱动电路14和解多任务器13的信号。
在本实施例的显示装置中，该第一基板1设有多个像素单元15，这些像素单元之一可以设计为例如图3所示的等效电路图。在图3的等效电路图中，该像素单元包含：一驱动薄膜晶体管T1；一切换薄膜晶体管T2，其中，扫描信号Sn和数据信号Data被传输至该切换薄膜晶体管T2；一重置薄膜晶体管(reset thin film transistor)T3，其中，初始化电压Vini和重置信号RST被传输至该重置薄膜晶体管T3，用以初始化该驱动薄膜晶体管T1；一发光薄膜晶体管T4，其中，发光控制信号En被传输至该发光薄膜晶体管T4；一第一电容器C1；以及一第二电容器Cst。因此，图3所示的等效电路图为一4T2C电路。此外，驱动电压VDD被传输至有机发光二极管OLED；且有机发光二极管OLED的阴极连接至共同电压VSS。在此，该有机发光二极管显示装置为例示性的。然而，本揭露并不局限于此，且上述等效电路图也可以应用于无机发光二极管显示装置或液晶显示装置。
如图2和图3所示，这些像素单元15中的一个包含多个晶体管；且这些晶体管中的每一个可以分别为一包含一硅半导体层的晶体管(例如：低温多晶硅(LTPS)薄膜晶体管)，或一包含一氧化物半导体层的晶体管(例如：IGZO薄膜晶体管)。与IGZO薄膜晶体管相比，LTPS薄膜晶体管具有较高的充电能力；与LTPS薄膜晶体管相比，IGZO薄膜晶体管具有较高的工艺均匀性、较好的阈值电压均匀性以及较低的电流泄漏。在本实施例中，这些像素单元15包含LTPS薄膜晶体管以及IGZO薄膜晶体管两者，再者，在另一实施例中，这些像素单元15可以只包含IGZO薄膜晶体管。
此外，如图2所示，该驱动电路14和该解多任务器13也可以包含多个晶体管，用于该驱动电路14和该解多任务器13的晶体管可以是包含一硅半导体层的晶体管(例如：低温多晶硅(LTPS)薄膜晶体管)，用于窄边框设计。此外，该LTPS薄膜晶体管可以用于具有良好TFT性能均匀性的较小特定区域。
图4为本实施例的显示装置的剖面示意图。在此，本实施例的显示装置包含：一第一基板1；一LTPS薄膜晶体管(即一第二晶体管)设置于该第一基板1之上；二IGZO薄膜晶体管(即第一晶体管)设置于该第一基板1之上。在此，该LTPS薄膜晶体管包含：一硅半导体层13a，包含一源极区域131、一通道区域132以及一漏极区域133；一栅极电极151与该第一半导体层13a相对设置；一源极电极171和一漏极电极172设置于该栅极电极上，且与分别与该第一半导体层13a的源极区域131和漏极区域133电性连接。该IGZO薄膜晶体管中的一个包含：一氧化物半导体层191；以及一第一源极电极201和一第一漏极电极202设置于该氧化物半导体层191上，其中，该LTPS薄膜晶体管的漏极电极172也可以做为该IGZO薄膜晶体管的栅极电极。另一个IGZO薄膜晶体管中包含：一第一栅极电极152设置于该第一基板1之上；另一氧化物半导体层192与该第一栅极电极152相对设置；另一第一源极电极202”和另一第一漏极电极203设置于该氧化物半导体层192上。此外，本实施例的显示装置还包含一显示介质层(即该有机发光二极管单元，包含该第一显示电极23、该有机发光层25和该第二显示电极26)设置于该第一基板1上。在本揭露的本实施例或另一实施例中，图4所示的LTPS薄膜晶体管可以包含在像素单元15或图2所示的驱动电路14和解多任务器13中。此外，应注意的是，图4仅为本揭露的显示装置的一个例子，且本揭露并不局限于此。包含LTPS薄膜晶体管和IGZO薄膜晶体管的任何显示装置皆在本揭露的范围内，即使其结构不同于图4所示。
如图4所示，该氧化物半导体层191和192具有一双层结构。下面简要地描述具有该双层结构的IGZO TFT的制造过程。
图5为本揭露的晶体管的剖面示意图，其为一IGZO薄膜晶体管(TFT)。首先，提供一第一基板1，接着，在该第一基板1上形成一第一缓冲层41和一第二缓冲层42。在此，用于该第一基板1的材料如上所述，不再重复说明。并且，该第一缓冲层41和该第二缓冲层42可以通过任何绝缘材料如氧化硅、氮化硅、氮氧化硅或其组合来制备。接下来，在该第二缓冲层42上形成一栅极电极43，然后在该栅极电极43上形成一栅极绝缘层44。之后，在该栅极绝缘层44上形成一氧化物半导体层45，接着在该氧化物半导体层45上形成一第一源极电极46和一第一漏极电极47。最后，在该第一源极电极46和该第一漏极电极47上形成一钝化层48，得到本实施例的IGZO TFT。在此，该栅极电极43、该第一源极电极46和该第一漏极电极47可以通过金属(例如：Cu、Al、Ti、Cr、Mo或其合金)，或其他电极材料(例如：透明导电氧化物，如ITO、IZO、ITZO等)制备；但本揭露并不局限于此。此外，该栅极绝缘层44和该钝化层48可以通过氧化硅制备。
因此，在上述处理后，获得本实施例的显示装置，其包含：一第一基板1；以及一第一晶体管设置于该第一基板1之上，其中，该第一晶体管包含一氧化物半导体层45。
在本实施例中，该氧化物半导体层45包含铟、镓、锌以及氧。IGZO TFT的电气性能与金属氧化物层的氧的浓度有关，因为当金属氧化物层的氧的浓度高时，该金属氧化物层的导电度会接近绝缘体的导电度。相反地，当金属氧化物层的氧的浓度低时，该金属氧化物层的导电度会接近导体的导电度。在此，在该氧化物半导体层45中，氧的原子百分比比上铟和镓的原子百分比的和大于或等于1且小于或等于3，即1≦O/(In+Ga)≦3。当该IGZO层的氧的浓度在上述比例内时，该IGZO TFT具有较佳的电气特性。此外，在该氧化物半导体层45中，铟和镓的原子百分比的和比上锌的原子百分比大于或等于1且小于或等于3，即1≦(In+Ga)/Zn≦3。当铟、镓以及锌的浓度比例在上述范围内时，该IGZO TFT具有较佳的电压应力和电流应力性能。因此，该IGZO TFT具有良好的可靠度。
此外，该氧化物半导体层45具有一第一区域451和一第二区域452，且该第一区域451位于该第二区域452与该第一基板1之间。在此，该第一区域451和该第二区域452可通过使用具有相同成分但原子浓度不同的两个靶(target)所制成；或通过引入具有相同成分但原子比例不同的组成物所制成。然而，本揭露并不局限于此。
在本实施例中，该第一区域451和该第二区域452是由具有相同成分但不同原子浓度的IGZO材料制成的两个不同层。在另一实施例中，该第一区域451和该第二区域452可以是在IGZO制成的同一层中的两个区域。在TFT操作期间，电流在该第一区域451中发生，因此该第一区域451受到电压应力和电流应力影响，导致在操作一段时间后，阈值电压(threshold voltage)偏移。当IGZO层在该第一区域451具有较高的铟浓度以及较高的锌浓度时，该IGZO TFT具有较高的电流和较佳的稳定性，除此之外，该第二区域452在用以形成该源极电极和该漏极电极的刻蚀过程期间被损坏。当IGZO层在该第二区域452具有较高的镓浓度时，其为IGZO层提供额外的保护，作为在接着的刻蚀过程中避免损伤。因此，该第一区域451为一富含锌和富含铟的区域，且该第二区域452为一富含镓的区域。更具体地，在该第一区域451中铟的浓度大于在该第二区域452中铟的浓度；在该第一区域451中锌的浓度大于在该第二区域452中锌的浓度；且在该第一区域451中镓的浓度小于在该第二区域452中镓的浓度。当该氧化物半导体层45包含上述第一区域452和上述第二区域452时，获得的IGZO薄膜晶体管可以改善电气性能或可靠度。
特别地，该氧化物半导体层45的第一区域451形成TFT载子通道。若该第一区域451为富含锌和富含铟的区域，可以增加在IGZO TFT通道中该半导体载子的移动率。
此外，如图5所示，该第一晶体管还包含：一第一栅极电极43设置于该氧化物半导体层45之下；以及一第一源极电极46和一第一漏极电极47设置于该氧化物半导体层45上，其中，该第一源极电极46和该第一漏极电极47与该第二区域接触。因此，在本实施例中，本实施例的IGZO TFT为一下栅极结构(bottom gate structured)IGZO TFT。
在制备该下栅极结构IGZO TFT的工艺中，于形成该氧化物半导体层45后，该第一源极电极46和该第一漏极电极47通过干式刻蚀(dry-etching)制成或其他制成形成。因此，该氧化物半导体层45的最上层(即该第二区域452)可能由于用于形成该第一源极电极46和该第一漏极电极47的连续干式刻蚀工艺或其他制成而劣化(deteriorate)。由于镓在IGZO中与氧离子形成强的化学键能，而形成的强化学键能可以稳定IGZO材料的非晶状态，并减少缺氧形成。因此，在本实施例的显示装置中，该第二区域452被设计成富含镓的区域，以提高其制成耐久性和电稳定性。
此外，当该第二区域452为富含镓的区域时，可以减少该IGZO TFT的电流泄漏，且可以达到在该第二区域452和该第一源极电极46/该第一漏极电极47之间良好的欧姆接触。此外，因为减少在该第二区域452的锌和铟的浓度，也可以降低在该IGZO TFT中电流泄漏和缺氧的发生。
如图5所示，该第一源极电极46和该第一漏极电极47与该第二区域452接触。在此，该第一源极电极46和该第一漏极电极47的金属可以是Mo、Ti或其他透明导电氧化物。当具有高的氧亲和力的金属(例如Ti)用作该第一源极电极46和该第一漏极电极47与该第二区域452直接接触的底层时，通过使用富含镓的层作为该第二区域452，可以减少在IGZO(氧化物半导体层45)中缺氧的形成。
另外，如上所述，在本实施例中的显示装置中包括包含硅半导体层的晶体管(例如LTPS TFT)，以及包含氧化物半导体层的晶体管(例如IGZO TFT)。LTPS TFT的移动率约为IGZO TFT的移动率的十倍。当该IGZO TFT的氧化物半导体层45具有上述两层结构时，不仅该IGZO TFT可以维持低的电流泄漏特性，也可以进一步改善该IGZO TFT的移动率。因此，IGZO TFT的移动率可以更好地匹配FTPS TFT的移动率。
如图5所示，本实施例的显示装置还包含：一栅极绝缘层44设置于该氧化物半导体层45之下，以及一钝化层48设置于该氧化物半导体层45上。即使该栅极绝缘层44和该钝化层48是由氧化硅所制成，在该栅极绝缘层44和该钝化层48中的氧化硅的氧的浓度是不相同的。在本实施例的显示装置中，该氧化物半导体层45的第一区域451形成TFT载子通道。如果在该栅极绝缘层44中氧化硅的氧的浓度太高时，该栅极绝缘层44的绝缘特性将会降低，因此，在本实施例的显示装置中，在该栅极绝缘层44中氧化硅的氧的浓度低于在该钝化层48中氧化硅的氧的浓度。
测试例
使用TEM-EDX装置检查在上述实施例中获得的显示装置；并通过线扫描分析模式分析该氧化物半导体层的IGZO组成，分析结果显示于图6和7中。其中，图6为沿着图5所示的线L1-L1’的氧化物半导体层的通道区域的分析结果，图7为沿着图5所示的线L2-L2’的氧化物半导体层的源极和漏极接触区域的分析结果。在图6和图7中，术语”GI”是指栅极绝缘层；术语“PA”是指钝化层；以及术语“S/D”是指第一源极/漏极电极。
对于TEM-EDX的分析方法，切割TFT以形成一狭缝，并获得该TFT的剖面图。接着，开始TEM-EDX的扫描步骤，具体地，开始线L1-L1’和线L2-L2’的扫描。在TFT通道区域的中间形成L1-L1’的扫描线，以扫描在TFT半导体层的原子浓度。为了进一步了解该半导体层和该绝缘层周围界面的关系，将线L1-L1’从栅极绝缘层开始扫描至半导体层的第一区域和第二区域，并在钝化层结束。同时扫描线L2-L2’，以进一步了解该半导体和该接触源极/漏极电极的界面相互作用，因此线L2-L2’在TFT的源极/漏极电极的末端的一处形成。线L2-L2’在该栅极绝缘层开始，进入该半导体层的第一区域和第二区域，并在结束于钝化层之前，进一步进入该源极/漏极电极的金属层。
包含在氧化物半导体层的通道区域中的元素的原子百分比(％)列于下表1中。应当注意得是，显示于表中的数值是在该层的中厚部分(middle-thickness portion)测量的元素的原子百分比的平均值，材料分析无法得到每个元素的精准浓度。如表1所示，在该第一区域中，铟、镓以及锌的测量原子百分比为16.34％、19.22％以及17.28％。然而，如图6所示，在该第一区域中，铟、镓以及锌的原子百分比测量误差分别为正负1.1％、1.6％以及0.5％。如图1所示，在该第二区域中，铟、镓以及锌的测量原子百分比为13.36％、25.86％以及10.62％。然而，如图6所示，在该第二区域中，铟、镓以及锌的原子百分比测量误差分别为正负2.96％、2.16％以及1.82％。同样地，在该栅极绝缘层中、该IGZO的第一区域中、该IGZO的第二区域中、以及该钝化层中，硅的原子百分比测量误差分别为正负1.8％、0.5％、1.14％以及3％。如图6和下表1所示，在该氧化物半导体层的通道区域中，该氧化物半导体层的第二区域富含镓。
表1
层 铟(％) 镓(％) 锌(％) 硅(％)
栅极绝缘层 - - - 42.36
IGZO，第一区域 16.34 19.22 17.28 0.50
IGZO，第二区域 13.36 25.86 10.62 2.03
钝化层 - - - 37.24
此外，如图7所示，在该氧化物半导体层的源极和漏极接触区域中，该氧化物半导体层的第二区域也富含镓。在此，该第一源极/漏极电极由Ti制成。由于在IGZO中，镓与氧离子形成一强化学键，而形成的强化学键可以稳定IGZO材料的非晶状态，且减少缺氧的形成，因此，可以减少Ti向该第二区域的扩散。如果该氧化物半导体层的第二区域不富含镓，则在IGZO中可能通过扩散的Ti和氧形成TiO2，而形成的TiO2为一绝缘体，会导致在IGZO与该第一源极/漏极电极之间欧姆接触减少，因此，当该氧化物半导体层的第二区域富含镓时，可以减少在该第二区域中Ti扩散和缺氧。
其他实施例
如前所述的本揭露的任何实施例所述制造的显示装置，可与触控面板合并以形成一触控显示装置。此外，如前所述的本揭露的任何实施例所述制造的显示装置或触控显示装置，可应用于本技术领域已知的任何需要显示屏幕的电子装置上，例如显示器、手机、笔记本电脑、摄影机、静态照相机、音乐播放器、移动导航装置、电视以及其他显示影像的电子装置上。
虽然已经根据其实施例说明了本揭露，但应当理解的是，在不脱离如下文所要求保护的本揭露的精神和范围下，可以进行其他可能的修饰和变化。

Claims (10)

1.一种显示装置，包含：
一第一基板；
一第一晶体管设置于该第一基板之上，其中，该第一晶体管包含一氧化物半导体层；以及
一第二晶体管设置于该第一基板之上，其中，该第二晶体管包含一硅半导体层，
其中，该氧化物半导体层包含铟、镓、以及氧；且在该氧化物半导体层中，氧的原子百分比比上铟和镓的原子百分比的和大于或等于1且小于或等于3。
2.如权利要求1所述的显示装置，其中，该氧化物半导体层具有一第一区域及一第二区域，该第一区域位于该第二区域与该第一基板之间，且该第一区域中铟的浓度大于该第二区域中铟的浓度。
3.如权利要求2所述的显示装置，其中，该第一区域中镓的浓度小于该第二区域中镓的浓度。
4.如权利要求3所述的显示装置，其中，该第一晶体管还包含一第一源极电极和一第一漏极电极，该第一源极电极和该第一漏极电极设置于该氧化物半导体层上，且该第一源极电极和该第一漏极电极与该第二区域接触。
5.如权利要求2所述的显示装置，其中，该氧化物半导体层还包含锌，且该第一区域中锌的浓度大于该第二区域中锌的浓度。
6.如权利要求1所述的显示装置，其中，该氧化物半导体层还包含锌，且在该氧化物半导体层中，铟和镓的原子百分比的和比上锌的原子百分比大于或等于1且小于或等于3。
7.如权利要求1所述的显示装置，还包含一栅极绝缘层设置于该氧化物半导体层之下，以及一钝化层设置于该氧化物半导体层上，其中，该栅极绝缘层和该钝化层分别包含氧化硅，且该栅极绝缘层中氧化硅的氧的浓度小于该钝化层中氧化硅的氧的浓度。
8.如权利要求1所述的显示装置，还包含一显示区域和一周边区域，其中该周边区域与该显示区域相邻，且该第一晶体管设置于该显示区域中，且该第二晶体管设置于该周边区域中。
9.如权利要求1所述的显示装置，还包含一显示区域和一周边区域，其中该周边区域与该显示区域相邻，且该第一晶体管和该第二晶体管设置于该显示区域中。
10.一显示装置，包含：
一第一基板；以及
一第一晶体管设置于该第一基板之上，其中，该第一晶体管包含一氧化物半导体层，
其中，该氧化物半导体层包含铟、镓、锌、以及氧；在该氧化物半导体层中，氧的原子百分比比上铟和镓的原子百分比的和大于或等于1且小于或等于3；且在该氧化物半导体层中，铟和镓的原子百分比的和比上锌的原子百分比大于或等于1且小于或等于3。
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