CN107924847A - 安装结构以及模块 - Google Patents

安装结构以及模块 Download PDF

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CN107924847A
CN107924847A CN201780002482.6A CN201780002482A CN107924847A CN 107924847 A CN107924847 A CN 107924847A CN 201780002482 A CN201780002482 A CN 201780002482A CN 107924847 A CN107924847 A CN 107924847A
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terminal
distribution
dielectric film
mentioned
mounting structure
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CN107924847B (zh
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松丸幸平
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Fujikura Ltd
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Fujikura Ltd
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
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Abstract

本发明提供一种安装结构，具备：半导体装置，其具有第一端子；配线基板，其具有第二端子、配线以及感光性绝缘膜，上述第二端子与上述第一端子对置配置并具有第一端部，上述配线从上述第一端部的端面引出，上述感光性绝缘膜覆盖上述配线以及上述第一端部；以及凸块，其将上述第一端子与上述第二端子之间电连接。

Description

安装结构以及模块
技术领域
本发明涉及在配线基板上安装有半导体装置的安装结构以及具备该安装结构的模块。
本申请基于2016年2月29日向日本申请的特愿2016-038207号主张优先权，并将其内容引用至此。
背景技术
为了响应电子设备的小型化以及高速化的要求，在半导体装置的安装技术中也追求小型化以及高速化。对于倒装焊接而言，由于与引线焊接相比能够缩小半导体装置的安装面积并且缩短配线的长度的优点，所以在各种电子设备中作为半导体装置的安装方式采用。
倒装焊接是指使IC等半导体装置的多个端子与配线基板的多个端子对置并以面朝下的形式经由焊锡等的凸块将各端子一并连接的安装方式(例如，参照专利文献1)。为了保护配线，作为阻焊剂而设置有感光性绝缘膜。
专利文献1：日本特开2003-23243号公报
图9A以及图9B中示出现有技术的问题点。在图9A以及图9B中，从经由凸块16与半导体装置(图示省略)的端子21连接的配线基板(图示省略)的端子13延伸的配线12具有未被感光性绝缘膜15包覆的部分。在该情况下，配线12露出，从凸块16向配线12上产生焊锡的一部分的湿润扩展。若在较细的配线12上形成有突出部16a，则存在因突出部16a的热应力导致配线12断裂的担忧。另外，若焊锡从端子13湿润扩展至较细的配线12上，则焊锡的形状无法控制，存在失去凸块16的形状的对称性的担忧。特别是在半导体装置与配线之间传输高频信号的情况下，存在突出部16a成为振荡部、或成为短截线而使传输损失恶化的可能性，因而不优选。
若使感光性绝缘膜的开口小于配线基板的端子，则能够避免焊锡从端子向配线的湿润扩展。然而，在通过光刻法在配线基板上形成感光性绝缘膜时也需要与半导体装置的端子同等高的精度，结果导致配线基板的制造成本上升。
在专利文献1中记载了一项通过使感光性绝缘膜的开口大于配线基板的端子并利用感光性绝缘膜包覆露出的配线来防止焊锡的湿润扩展的技术。然而，该技术只在配线基板与感光性绝缘膜之间位置校准完全一致的情况下起效。在专利文献1的0035～0039段中存在端子尺寸为0.15～0.85mm、配线宽度为0.1～0.15mm之类的例示，但进行进一步的小型化，因设备的性能、偏差等产生的校准的偏移就会成为问题。即，若在端子与感光性绝缘膜之间校准发生偏移，则无法利用感光性绝缘膜覆盖配线整体，无法防止图9A以及图9B所示的焊锡向配线12上的湿润扩展。
在从端子沿基板的深度方向引出配线的情况下，即便感光性绝缘膜的开口从端子的位置偏移，配线也不会露出，因而能够防止焊锡的湿润扩展。然而，为了使配线基板多层化导致工序增加，制造成本上升。另外，在通过多层化从端子向下方引出配线的结构中，在利用凸块连接半导体装置的端子与配线基板的端子时，伴随着焊锡的凝固而在凸块的正下方产生收缩等的应力，因而存在连接的可靠性恶化的担忧。并且，多层结构成为利用导体夹着层间绝缘膜的结构，因而存在因电容(capacitance)成分的增加而使传输损失恶化的担忧。另外，若在导体间配置有绝缘膜，则引起传输至导体的信号的波长缩短，与不形成为多层结构的情况相比，频率特性发生变化，因而存在设计复杂化的问题。
发明内容
本发明是鉴于上述情况而完成的，其课题在于提供能够容易地抑制凸块向配线上的湿润扩展的安装结构以及具备该安装结构的模块。
为了解决上述课题，本发明的第一形态所涉及的安装结构具备：半导体装置，其具有第一端子；配线基板，其具有第二端子、配线以及感光性绝缘膜，上述第二端子与上述第一端子对置配置并具有第一端部，上述配线从上述第一端部的端面引出，上述感光性绝缘膜覆盖上述配线以及上述第一端部；以及凸块，其将上述第一端子与上述第二端子之间电连接。
也可以构成为上述半导体装置具有多个上述第一端子，上述配线基板具有多个上述第二端子以及多个上述配线，在上述多个上述第一端子与上述多个上述第二端子之间设置有多个上述凸块，上述多个上述第一端子并列设置于上述半导体装置的周边部，与上述多个上述第一端子对应地并列设置上述多个上述第二端子以及上述多个上述凸块。
也可以构成为在上述多个上述配线的与上述多个上述第二端子相反的端部设置有多个第三端子，上述多个上述第三端子以比上述多个上述第一端子宽大的间距并列设置。
也可以构成为上述感光性绝缘膜包覆上述多个上述第二端子的包覆率在上述多个上述第二端子之间相等。
也可以构成为上述配线基板具有多个上述第一端部，包覆上述多个上述第一端部的上述感光性绝缘膜的端部沿着上述多个上述第二端子的并列方向形成。
本发明的第二形态所涉及的模块具备上述形态所涉及的安装结构。
根据上述形态，能够在感光性绝缘膜包覆引出有第二端子的配线的一侧的位置允许校准的偏移，因而能够容易地抑制凸块向配线上的湿润扩展。
附图说明
图1A是表示本发明的一实施方式所涉及的安装结构的剖视图。
图1B是表示本发明的一实施方式所涉及的安装结构的俯视图。
图2是对感光性绝缘膜与第二端子的位置关系进行说明的俯视图。
图3A是表示实施例1的安装结构的俯视图。
图3B是表示实施例1的安装结构的剖视图。
图4A是表示实施例2的安装结构的俯视图。
图4B是表示实施例2的安装结构的剖视图。
图5A是表示实施例3的安装结构的俯视图。
图5B是表示实施例3的安装结构的剖视图。
图6是表示实施例4的配线基板的俯视图。
图7A是表示比较例1的安装结构的俯视图。
图7B是表示比较例1的安装结构的剖视图。
图7C是表示示出比较例1的安装结构的凸块的周边的放大俯视图。
图8A是表示比较例2的安装结构的俯视图。
图8B是表示比较例2的安装结构的剖视图。
图8C是表示示出比较例2的安装结构的凸块的周边的放大俯视图。
图9A是对焊锡从凸块向配线上的湿润扩展进行说明的俯视图。
图9B是对焊锡从凸块向配线上的湿润扩展进行说明的立体图。
具体实施方式
以下，根据优选的实施方式，参照附图对本发明进行说明。
图1A以及图1B中示出本发明的一个实施方式所涉及的安装结构。如图1A以及图1B所示，本实施方式所涉及的安装结构具备：半导体装置20，其具有第一端子21；配线基板10，其具有与第一端子21对置配置的第二端子13；以及凸块16，其将第一端子21与第二端子13之间电连接。
如图1A所示，配线基板10在绝缘基板11上具有配线12以及端子13、14。在本说明书中，经由凸块16与第一端子21连接的端子13为第二端子13，设置于配线12的与第二端子13相反的端部的端子14为第三端子14。第一端子21是半导体装置20的端子21。在配线基板10中，配线12之上遍及全长地被感光性绝缘膜15覆盖。感光性绝缘膜15设置为阻焊剂。
如图1B所示，各端子13、14的宽度大于配线12的宽度。而且，感光性绝缘膜15在第二端子13上仅包覆引出有配线12的一侧(构成第二端子13的一部分的第一端部13b)。即，第二端子13具有未被感光性绝缘膜15覆盖的露出部13a和被感光性绝缘膜15覆盖的包覆部13b，包覆部13b仅配置于从第二端子13(第二端子13中的第一端部13b的端面13e)引出有配线12的一侧(构成第二端子13的一部分的第一端部13b)。换言之，包覆部13b构成第二端子13的一部分，包覆部13b与第一端部13b对应。由此，感光性绝缘膜15的端部15a横切第二端子13之上的长度大于配线12的宽度。另外，感光性绝缘膜15的端部15a具有沿多个第二端子13并列的方向延伸为大致直线状的形状。
露出部13a设置于第二端子13中与引出有配线12的一侧(第一端部)相反的一侧的端部(第二端部)。优选露出部13a的平面上的尺寸(面积)与对置的第一端子21的尺寸(面积)等同或比其宽大。即，优选露出部13a在配线基板10上设置于与第一端子21对置的区域的外侧(外部)。由此，凸块16难以从露出部13a向外侧湿润扩展，即便焊锡向外侧凸出，也在感光性绝缘膜15之上，因而能够防止附着于配线12。
在宽度狭小的配线12上不附着焊锡，由此能够抑制热应力等引起的配线12的断裂、损伤等，提高可靠性。能够通过感光性绝缘膜15的端部15a控制凸块16的形状，能够抑制突出等非对称的形状。形成为凸块16的形状的对称性较高、微小的凹凸较少的形状，由此即便在传输高频信号的情况下，也能够抑制信号恶化。作为第二端子13或第二端子13的露出部13a的形状的对称性，例如能够举出相对于配线12的引出方向(长度方向)的线对称性、相对于宽度方向的线对称性。
从第二端子13(第二端子13中的第一端部13b的端面13e)沿配线基板10的平面方向引出配线12，因而配线12不会配置于凸块16的正下，伴随着焊锡的凝固的收缩等的应力难以影响到配线12，能够确保可靠性。另外，配线12与第二端子13直接连接，多层化的情况下的层间绝缘膜那样的绝缘体(电介质)不夹装于配线12与第二端子13之间，配线12为单层，因而还能够抑制电容成分引起的传输损失。
在图1A以及图1B中，配线12的引出方向为左右方向(从第三端子朝向第二端子的方向)，但优选在左右方向上，配线基板10的第二端子13的长度比半导体装置20的第一端子21的长度长。优选第二端子13的长度与第一端子21的长度的差跟校准偏移的长度等同或比其大。根据本实施方式，能够使在配线基板10上通过光刻法对感光性绝缘膜15进行图案形成时的精度比半导体装置20的端子21的位置精度低(误差大)，因而能够使用比较廉价的工序以及装置。由此，能够实现安装工序的低成本化。
如图1B所示，在本实施方式中，多个第三端子14以比多个第二端子13宽大的间距并列设置。第三端子14将配线基板10与外部电路(图示省略)电连接，能够使用于信号传输、电力供给等。第三端子14的周围被感光性绝缘膜15覆盖，第三端子14的上表面通过感光性绝缘膜15的开口15b露出。感光性绝缘膜15的端部15a的位置精度也可以较低，因而能够通过扩大第三端子14的间距，使开口15b的位置精度也较低。
在本实施方式中，多个第一端子21并列设置于半导体装置20的下表面中的周边部。第二端子13与第一端子21对置设置，在各个第一端子21与第二端子13的对置位置设置有凸块16。因此，第二端子13的间距与第一端子21的间距等同。第三端子14配置于配线基板10的周边部，因而不受半导体装置20的尺寸制约，能够确保宽大的间距。
优选在第一端子21与第二端子13之间不配置感光性绝缘膜15。由此，在第一端子21与第二端子13之间配置绝缘膜的情况下，能够选择介电常数与介质损耗低的材料(树脂)，能够通过波长缩短抑制频率变化的影响。感光性绝缘膜15的选择也可以是介电常数与介质损耗低的材料(树脂)，但从感光性、光刻法的工艺等观点考虑，能够选择更优选的材料。
如图2所示，第二端子13的包覆部13b具有跟沿着第二端子13和配线12的边界的直线L1与沿着感光性绝缘膜15的端部15a的直线L2的距离相当的尺寸(长度)。因此，只要感光性绝缘膜15的端部15a的偏移不达到比直线L1更靠配线12侧的位置(接近配线12的位置)，就能够防止配线12的露出。因此，优选设计上的直线L1与直线L2的距离大于感光性绝缘膜15相对于配线12的图案的校准偏移引起的误差范围。由此，即便存在校准偏移，也能够使配线12不从感光性绝缘膜15露出。
在设置有多个第二端子13的情况下，包覆部13b的面积相对于第二端子13的面积(露出部13a以及包覆部13b的总面积)的比例为感光性绝缘膜15包覆第二端子13的包覆率。优选多个第二端子13中各第二端子13的包覆率等同。
各第二端子13的包覆率相等，由此形成于露出部13a上的凸块16的尺寸(大小)均一，能够抑制端子间的偏差。作为包覆率，例如能够举出第二端子13的面积的50％以下例如30％左右、20％左右、10％左右、5％左右等。作为包覆率的偏差，能够举出第二端子13的面积的20％以下、10％以下、5％以下等。
优选沿着多个第二端子13的包覆部13b的感光性绝缘膜15的端部15a沿着多个第二端子13的并列方向。由此，即便存在校准偏移，也能够抑制沿相同的并列方向的各第二端子13的包覆率的偏差。
以上，根据优选的实施方式对本发明进行了说明，但本发明并不限定于上述实施方式，能够在不脱离本发明的主旨的范围内进行各种改变。作为改变，能够举出构成要素的附加、省略、替换以及其他变更。
作为半导体装置20，能够举出IC(集成电路)等半导体电路。作为半导体装置20中的第一端子21的配置，优选沿着半导体装置20的边一列一列地并列配置于一条边或两条边以上。配置有第一端子21的边的配置例如能够举出对置的两条边、邻接的两条边、半导体装置20大致呈四边形的情况下的四条边。
作为配线基板10，能够举出FPC(柔性打印电路)等中介层基板。作为配线基板10的绝缘基板11，不特别限定，能够举出聚酰亚胺等的树脂基板、玻璃基板、纸复合基板、各种绝缘性基板。
构成配线12以及端子13、14的导体不特别限定，能够举出Cu、Ag、Al、Ni、Cr、Au、Ti、合金等一种或两种以上。配线12以及端子13、14等导体图案能够在绝缘基板11的单面或两面通过镀覆、蚀刻、粘贴等形成。作为配线12的宽度，为100μm以下，进一步地为70μm以下，例如可例示为20～70μm。作为第二端子13的尺寸，为200μm以下、150μm以下，进一步地为100μm以下，例如例示为30～100μm。
作为感光性绝缘膜15，能够举出感光性环氧树脂等阻焊剂。
作为凸块16，能够举出熔融焊锡、镀覆柱、短柱凸块(stud bump)等。对于配线基板10的上表面与半导体装置20的下表面的间隙而言，至少在凸块16的周围能够填充底部填充剂、侧部填充剂等绝缘材料。作为填充用的绝缘材料，能够举出环氧系等的热固化树脂。
实施例
(实施例1)
图3A以及图3B中示出实施例1的安装结构。实施例1所涉及的安装结构构成作为半导体装置20而安装有IC的中介层基板的模块结构。实施例1的配线基板10A是中介层基板，连接100μm左右的狭小间距的IC端子(第一端子21)与500μm左右的宽大间距的FPC端子(第三端子14)。
感光性绝缘膜15完全包覆配线12，但在由IC用I/O端子(第二端子13)围起的区域中，在端部15a的内侧感光性绝缘膜15形成开口。第二端子13的宽度(间距方向的尺寸、多个第二端子所排列的方向上的第二端子13的宽度)例如为70μm。配线12的宽度例如为30μm。配线12与端子13、14形成于绝缘基板11的同一平面上。
感光性绝缘膜15在从配线12与端子13的连接部(第二端子13中的第一端部13b的端面13e)至开口的端部15a之间覆盖端子13上的长度(图1B中示出的第二端子13a的较长方向上的包覆部(第一端部)13b的长度)是能够吸收配线12与感光性绝缘膜15的校准偏移(例如20μm)的尺寸(例如为30μm)。端子13的引出配线12的方向上的长度例如为端子13的宽度与能够吸收校准偏移的尺寸的和(例如为100μm)。
未被感光性绝缘膜15包覆而露出(能够与凸块16连接)的部分的端子13的形状为四边形，具有对称性。在凸块16的周围，出于应力缓和的目的而填充有环氧系等的底部填充剂17。凸块16由焊锡形成，凸块16的高度例如为50μm。
(实施例2)
图4A以及图4B中示出实施例2的安装结构。在实施例2中，配线基板10B的结构与实施例1同样，但配置于凸块16的周围的绝缘材料为侧部填充剂18。侧部填充剂18(例如环氧系等)通过粘度的调整仅配置于半导体装置20的下表面中设置有第一端子21以及凸块16的周边部。在半导体装置20与配线基板10B之间(详细地说为与绝缘基板11之间)形成有空洞19。在高频传输用途的情况下，存在因IC与中介层间的电介质导致传输损失恶化的情况。通过使用侧部填充剂18，从而在空洞19配置有介电常数低的气体(空气等)，因而与实施例1的底部填充剂17相比，不会使传输损失恶化，能够获得应力缓和功能。
(实施例3)
图5A以及图5B中示出实施例3的安装结构。实施例3的配线基板10C的第三端子14构成卡缘连接器。对于半导体装置20的正下的结构而言，在图5A以及图5B中例示了使用与实施例1同样的底部填充剂17的情况，但也能够像实施例2那样使用侧部填充剂18。与卡缘连接器接触的感光性绝缘膜15的端部15c例如呈直线状。
(实施例4)
图6中示出实施例4的配线基板中的第二端子以及感光性绝缘膜的形状。在图2中，第二端子13呈四边形，但在图6中，第二端子13大致呈圆形。实施例4中的第二端子13的平面形状呈椭圆形等长圆形，例如能够举出使长方形的两短边结合半圆形的形状(卵圆形状)。通过去除端子13的角能够防止应力集中，提高端子13相对于绝缘基板11的粘接强度。图6所示的感光性绝缘膜15的端部15a针对每个端子13呈具有弯曲部的波状，在端子13间呈尖形(尖点状)。在该情况下，对于第二端子13的露出部13a的形状而言，包覆部13b侧与包覆部13b的相反侧均呈弯曲状，凸块16的形状的对称性较高，因而优选。
(比较例1)
图7A～图7C中示出比较例1的安装结构。感光性绝缘膜15针对每个第二端子13具有开口15d，开口15d的周边部遍及整周地覆盖第二端子13的周边部。通过使感光性绝缘膜15的开口15d小于端子13能够防止配线12的露出，避免焊锡从端子13向配线12的湿润扩展。然而，通过光刻法形成感光性绝缘膜15时需要高的精度，结果导致配线基板的制造成本上升。
(比较例2)
图8A～图8C中示出比较例2的安装结构。从端子13沿绝缘基板11的深度方向引出配线12，在配线12与端子13之间设置层间绝缘膜31。根据比较例2所涉及的结构，即便感光性绝缘膜15的开口15d从端子13的位置偏移，配线12也不露出，因而能够防止焊锡的湿润扩展。然而，为了将配线基板多层化，增加如下工序，即在层间绝缘膜31形成开口，在层间绝缘膜31的开口设置导电体33、34并连接端子13、14与配线12之间等，从而制造成本上升。
另外，连接端子13与配线12的导电体33配置于凸块16的下方，因而若凸块16的焊锡凝固时在凸块16的正下产生应力，则存在连接可靠性恶化的担忧。另外，在配线12与端子13、14之间夹装层间绝缘膜31，因而担心因电容成分引起的传输损失的恶化、因波长缩短引起的设计的复杂化。
附图标记说明：
10、10A、10B、10C…配线基板；11…绝缘基板；12…配线；13…第二端子；13b…包覆部(第一端部)；13e…端面(第二端子中的第一端部的端面)；14…第三端子；15…感光性绝缘膜；16…凸块；20…半导体装置；21…第一端子。

Claims (6)

1.一种安装结构，其中，具备：
半导体装置，其具有第一端子；
配线基板，其具有第二端子、配线以及感光性绝缘膜，所述第二端子与所述第一端子对置配置并具有第一端部，所述配线从所述第一端部的端面引出，所述感光性绝缘膜覆盖所述配线以及所述第一端部；以及
凸块，其将所述第一端子与所述第二端子之间电连接。
2.根据权利要求1所述的安装结构，其中，
所述半导体装置具有多个所述第一端子，
所述配线基板具有多个所述第二端子以及多个所述配线，
在所述多个所述第一端子与所述多个所述第二端子之间设置有多个所述凸块，
所述多个所述第一端子并列设置于所述半导体装置的周边部，
与所述多个所述第一端子对应地并列设置所述多个所述第二端子以及所述多个所述凸块。
3.根据权利要求2所述的安装结构，其中，
在所述多个所述配线的与所述多个所述第二端子相反的端部设置有多个第三端子，
所述多个所述第三端子以比所述多个所述第一端子宽大的间距并列设置。
4.根据权利要求2或3所述的安装结构，其中，
所述感光性绝缘膜包覆所述多个所述第二端子的包覆率在所述多个所述第二端子之间相等。
5.根据权利要求2～4中任一项所述的安装结构，其中，
所述配线基板具有多个所述第一端部，
包覆所述多个所述第一端部的所述感光性绝缘膜的端部沿着所述多个所述第二端子的并列方向形成。
6.一种模块，其中，
具备权利要求1～5中任一项所述的安装结构。
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