CN107710361B - 介电组合物、介电元件、电子部件和层叠电子部件 - Google Patents

介电组合物、介电元件、电子部件和层叠电子部件 Download PDF

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CN107710361B
CN107710361B CN201680039255.6A CN201680039255A CN107710361B CN 107710361 B CN107710361 B CN 107710361B CN 201680039255 A CN201680039255 A CN 201680039255A CN 107710361 B CN107710361 B CN 107710361B
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dielectric
laminated
internal electrode
dielectric composition
electronic component
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CN107710361A (zh
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井村智也
寺田智宏
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TDK Corp
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Epcos AG
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Abstract

本发明提供一种具有优良的DC偏置特性并且还具有在高温下的高绝缘电阻的介电组合物,并且还提供介电元件、电子部件和层叠电子部件。介电组合物为其中主要组分包括Bi、Na、Sr、Ln和Ti的钙钛矿化合物,并且Ln为至少一种类型的稀土元素,其特征在于,平均晶粒尺寸在0.1μm至0.99μm之间。

Description

介电组合物、介电元件、电子部件和层叠电子部件
[技术领域]
本发明涉及有利地用于高额定电压的中压和高压应用和还有利地在高温环境下使用的介电组合物、介电元件、电子部件和层叠电子部件。
[现有技术]
诸如层叠陶瓷电容器的层叠电子部件被广泛用作紧凑、大容量和高可靠性电子部件。随着近年来装置已经变得更紧凑和更高性能,在电子部件特别是在诸如层叠陶瓷电容器的层叠电子部件方面存在对更加小型化、增大的容量、更低的成本和更高的可靠性的越来越强的要求。
层叠陶瓷电容器通常通过使用片工艺或印刷工艺等来层叠用于内部电极层的糊剂和用于介电层的糊剂,然后同时烘烤层叠体中的内部电极层和介电层来制备。
常规而言,包含具有高介电常数的钛酸钡作为主要组分的钛酸钡基介电组合物被广泛地知道作为用作介电层的介电组合物。然而,钛酸钡基介电组合物存在的问题在于在100℃或以上的高温下其绝缘电阻显着降低。
另外,电容器可以用于其上叠加有AC电压的DC电压。当电容器用于其上叠加有AC电压的DC电压时,DC偏置特性是重要的。DC偏置特性表示取决于施加的DC电压的介电常数的变化。DC偏置特性越高,相对于施加的DC电压介电常数的变化越小。已知采用常规的钛酸钡基介电组合物的电容器具有低的DC偏置特性,并且DC电压越大,介电常数越低。
此外,当为了使层叠陶瓷电容器更加紧凑并且增加其容量,介电层被制造得更薄时,当施加DC电压时施加到介电层的电场变得更加强,因此存在DC偏置特性的进一步降低。
另外,Pd或Pd合金通常用作层叠陶瓷电容器中的内部电极层的导电材料。然而,由于Pd是昂贵的,所以近年来已经还用诸如Ni和Cu等相对不贵的贱金属来制造。
当使用诸如Ni或Cu的贱金属作为内部电极层的导电材料时,当在大气下被烘烤时,内部电极层氧化。这意味着对介电层和内部电极层在还原气氛下同时被烘烤是必要的。然而,当在还原气氛下进行烘烤时,介电层被还原,并且存在绝缘电阻的降低。
鉴于此,存在具有优良的DC偏置特性并且在高温下具有高绝缘电阻的非还原性介电组合物的需要。
作为解决这种情况的手段,例如专利文献1描述了一种具有优良的DC偏置特性和在高温下的高绝缘电阻的层叠陶瓷电容器以及适合该层叠陶瓷电容器的钛酸钡基介电组合物。
然而,虽然在专利文献1中的介电组合物的介电常数在施加5V/μm的DC电场时相对高为900至950左右,但在施加甚至更高的DC电场时介电常数降低,因此DC偏置特性不足以应对伴随尺寸减小和容量增加,使这些层变薄。
另外,专利文献1中的介电组合物在150℃的高温下具有相对高的绝缘电阻。然而,与近年来所要求的绝缘电阻的大小相比,这还是不够的。
[引文列表]
[专利文献]
[专利文献1]JP 3334607 B2
[发明内容]
[本发明要解决的问题]
本发明是鉴于这种情况而设计的,并且其目的在于提供具有优良的DC偏置特性和在高温下的高绝缘电阻的介电组合物,并且还在于提供一种介电元件、电子部件和层叠电子部件。
[解决问题的方案]
作为解决该问题的手段,根据本发明的介电组合物是主要组分包括Bi、Na、Sr、Ln和Ti钙钛矿化合物,并且Ln为至少一种类型的稀土元素,其特征在于平均晶粒尺寸在0.1μm至0.99μm之间。
具有这种组成的介电组合物可以实现优良的DC偏置特性和在高温下的高绝缘电阻。
优选地,根据本发明的介电组合物具有由(BiaNabSrcLnd)TiO3表示的主要组分,其中a、b、c和d分别满足以下条件:0<a<0.50,0<b<0.50,0<c≤0.80,0<d≤0.20和0.90≤a+b+c+d≤1.05。
相对于主要组分中所含的100摩尔份的Ti,根据本发明的介电组合物优选地含有5摩尔份和18摩尔份之间的选自Li和K构成的组的至少一种作为辅助组分。
相对于主要组分中所含的100摩尔份的Ti,根据本发明的介电组合物优选地含有0.2摩尔份和1摩尔份之间的选自Cu、Mn、Zn、Mg和Co构成的组的至少一种作为辅助组分。其结果是,烧结特性得到改善并且能够实现高绝缘电阻。
根据本发明的介电元件包括上述介电组合物。
根据本发明的介电元件包括上述介电组合物,并且因此可以被制造得更紧凑和性能更高。
根据本发明的电子部件设置有包含上述介电组合物的介电层。
根据本发明的层叠电子部件具有层叠部,该层叠部通过交替地层叠内部电极层和包含上述介电组合物的介电层而形成。
根据本发明的电子部件和层叠电子部件设置有包含上述介电组合物的介电层并且因此可以被制造得更紧凑和性能更高。
附图说明
图1是根据本发明的实施方式的方式的层叠陶瓷电容器的示意图。
具体实施方式
下面将参照附图对根据本发明的实施方式的方式的层叠陶瓷电容器进行描述。
如图1中所示,根据本发明的实施方式的方式的层叠陶瓷电容器1包括具有其中介电层2和内部电极层3交替地堆叠的结构的电容器元件主体10。内部电极层3以这样的方式进行堆叠:其端部表面在电容器元件主体10的两个相对端部处交替地露出。一对外部电极4形成在电容器元件主体10的两个端部处并且连接至交替地布置的内部电极层3的露出端部表面以形成电容器电路。
电容器元件主体10通常具有立方体形状,但不被特别限制于此。此外,不存在对电容器元件主体的尺寸的特别限制。一般地,尺寸通常为(长边)×(短边)×(高度)=(0.6mm至7.0mm)×(0.3mm至6.4mm)×(0.3mm至2.5mm)。
根据本发明的实施方式的方式的层叠陶瓷电容器1的介电层2包括由具有包括Bi、Na、Sr、Ln(其中,Ln为稀土元素)和Ti的钙钛矿化合物作为主要组分的介电组合物的晶粒形成的烧结体。
介电组合物具有根据以下通式(1)的组成,其中a、b、c和d分别满足以下条件:0<a<0.50,0<b<0.50,0<c≤0.80,0<d≤0.20和0.90≤a+b+c+d≤1.05。
(BiaNabSrcLnd)TiO3...(1)
根据本发明的介电组合物包含Ln(稀土元素)的原因是为了提高施加DC偏置时介电组合物的介电常数和绝缘电阻率。
应当注意的是,a、b、c和d各自表示Ti的原子数为1时的Bi、Na、Sr和Ln的原子数的比例。
在层叠陶瓷电容器中a、b、c和d优选在上述范围内的原因是因为当施加DC偏置时表现出高介电常数,并且在高温下表现出高绝缘电阻。另外,还因为当介电颗粒(稍后描述)被烘烤时,这有助于抑制晶粒生长。
此外,应当注意的是,短语“施加DC偏置时”是指向层叠陶瓷电容器施加在0.02V/μm(优选为0.2V/μm或更大,更优选为0.5V/μm或更大)至5V/μm之间的AC电场和叠加在其上的1V/μm至8V/μm之间的DC电场的情况。根据本发明,重要的是即使在施加DC电场,特别是大于5V/μm且不大于8V/μm的DC电场的情况下,介电常数仍是高的。
另外,当a、b、c和d分别满足以下条件:0.20≤a≤0.40,0.20≤b≤0.40,0.15≤c≤0.50,0.01≤d≤0.15和0.90≤a+b+c+d≤1.01时,能够在施加DC偏置时实现高介电常数,并且能够在高温下实现高绝缘电阻。
接下来将对形成介电层2的晶粒(以下称为“介电颗粒”)进行描述。
介电颗粒形成上述介电层2,并且本发明的特征在于介电颗粒的平均晶粒尺寸在0.10μm至1.0μm之间的事实。通过将介电颗粒的平均晶粒尺寸设定在0.10μm至1.0μm之间,最终制造的层叠陶瓷电容器1具有优良的DC偏置特性,并且即使在150℃的高温下也具有高绝缘电阻。另外,介电组合物中包含的介电颗粒的平均晶粒尺寸优选地在0.10μm至0.50μm之间。当介电颗粒的平均晶粒尺寸在0.10μm至0.50μm之间时,当施加DC偏置时能够实现高介电常数并且实现在高温下的高绝缘电阻。当a、b、c和d分别满足以下条件并且同时介电颗粒的平均晶粒尺寸在0.10μm至0.50μm之间时,本发明的效果特别显著:0.20≤a≤0.40,0.20≤b≤0.40,0.15≤c≤0.50,0.01≤d≤0.15和0.90≤a+b+c+d≤1.01。
介电颗粒的平均晶粒尺寸可以通过该技术领域中的常规方法进行调整。不存在关于调整平均晶粒尺寸的方法的特别限制。例如,可以通过改变介电颗粒的起始材料的粒径或烘烤条件(烘烤时间、烘烤温度等)来改变平均晶粒尺寸。
如果介电颗粒的平均晶粒尺寸小于0.10μm,则当施加8V/μm的DC偏置时,介电常数显着降低并且变为800或小于800。另外,如果介电颗粒的平均晶粒尺寸超过1.0μm,则高温下的绝缘电阻存在劣化并且在150℃处的绝缘电阻变得小于1012Ω·cm。
根据本发明的介电颗粒的平均晶粒尺寸通过弦法来确定。下面将对用于通过弦法来确定平均晶粒尺寸的方法进行描述。应当注意的是,在下面的说明中,平均晶粒尺寸可以被称为D。
首先,在测量表面上通过显微镜来捕获图像以测量平均晶粒尺寸D。在图像中的任意地方绘制直线,并且将图像内的直线的长度视为L。测量直线与晶界之间的交点的数目N,并将L除以N以获得晶界之间的平均长度。如果介电颗粒被假定为同等尺寸的大球体,则将对应于上述平均长度的值乘以1.5视为平均晶粒尺寸D。
应当注意的是,虽然不存在对图像的放大倍数的特别限制,但是优选以5000倍到50000倍的放大倍数来捕获图像。另外,在多个图像中以这样的方式绘制多条直线:交点的数目N至少为100,并且优选地至少为300。不存在关于线的数目的特别限制。
在本申请中,假定介电颗粒是用于测量平均晶粒尺寸D的相等尺寸的大球体。也就是说,在本申请中,平均晶粒尺寸D通过式(2)来计算。
D=1.5×(L/N)...(2)
另外,根据本发明的介电组合物还可以含有氧化锂(Li2O)和/或氧化钾(K2O)作为辅助组分。在下面的描述中,这些辅助组分可以被称为辅助组分A。在烘烤期间,辅助组分A具有促进低温下的烧结的作用,并且具有抑制介电颗粒中晶粒生长的作用。当主要组分Ti的含量为100摩尔份时,辅助组分A的含量优选地为至少5摩尔份,以充分实现上述效果。另外,为了保持高绝缘电阻,辅助组分A的含量优选地不大于18摩尔份。应当注意的是,辅助组分A的含量是作为Li当量的氧化锂的含量与作为K当量的氧化钾的含量的总和。
另外,根据本发明的介电组合物可以与辅助组分A分开地含有选自氧化铜(CuO)、氧化锰(MnO2)、氧化锌(ZnO)、氧化镁(MgO)和氧化钴(Co3O4)构成的组的一种或多种氧化物。在以下的描述中,这些辅助组分也称为辅助组分M。辅助组分M表现出促进烧结的效果和抑制还原气氛下的烘烤期间绝缘电阻的降低的效果。也就是说,辅助组分M具有使介电组合物接近非还原的效果。当主要组分Ti的含量为100摩尔份时,辅助组分M的含量优选地在0.2摩尔份至1.5摩尔份之间,并且更优选地在0.2摩尔份至0.5摩尔份之间,以充分展示上述效果。应当注意的是,辅助组分M的含量是作为Cu当量的氧化铜的含量、作为Mn当量的氧化锰的含量、作为Zn当量的氧化锌的含量、作为Mg当量的氧化镁的含量和作为Co当量的氧化钴的含量的总和。
诸如介电层2的层叠的数目和厚度等的各种条件应根据目的或应用根据需要被确定。从紧凑性观点来看介电层2的厚度通常为不大于30μm,并且优选地为不大于10μm。
当介电层2的厚度减小到不大于10μm时,根据本发明的实施方式的方式的层叠陶瓷电容器1可以增大容量并且可以适当地保持高温下的绝缘电阻。应当注意的是,不存在针对介电层2的厚度的下限的特别限制,但为了有助于适当地保持在高温下的绝缘电阻,优选为不小于1μm。另外,介电层2中的层叠的数目通常为50至1000左右。
内部电极层3交替地设置有介电层2,并且以这样的方式进行堆叠:其端部表面在电容器元件主体10的两个相对端部处交替地露出。另外,一对外部电极4是形成在电容器元件主体10的两个端部处并且连接至交替布置的内部电极层3的露出端面以形成层叠陶瓷电容器1。
内部电极层3是由实质上用作电极的贵金属或贱金属的导电材料形成的。具体地,贵金属或贱金属导电材料包括Ag、Ag合金、Cu或Cu合金中的任一种。不存在对于Ag合金或Cu合金中所括的Ag或Cu以外的金属的特别限制,但是优选选自Ni、Mn、Cr、Co、Al和W中的一种或更多种金属。另外,如果使用Ag合金,则当Ag合金视为100重量%时,Ag含量优选地为至少95重量%。如果使用Cu合金,则当Cu合金视为100重量%时,Cu含量优选地为至少95重量%。
各种微量组分诸如P、C、Nb、Fe、Cl、B、Li、Na、K、F和S也可以被包含在导电材料中,其总量不超过0.1%。
诸如内部电极层3的层叠的数目和厚度等的各种条件应根据目的或应用根据需要来确定。内部电极层3的厚度优选为0.1μm至4.0μm左右,并且更优选地为0.2μm至3.0μm。
外部电极4是与交替地设置在层叠的介电元件主体10内部的内部电极层3导通的电极,并且在层叠的介电元件主体10的两个端部形成为一对。不存在对于形成外部电极4的金属的特别限制。可以单独使用选自Ni、Pd、Ag、Au、Cu、Pt、Rh、Ru和Ir等中的一种类型的金属,或者可以使用两种或更多种金属的合金。对于外部电极4通常使用Cu、Cu合金、Ni、Ni合金、Ag、Ag-Pd合金或In-Ga合金等。
外部电极4的厚度应根据应用等根据需要来确定。外部电极4的厚度优选为10μm至200μm左右。
(用于制造层叠陶瓷电容器的方法)
不存在关于根据本发明的用于制造层叠陶瓷电容器的方法的特别限制。例如,可以以与常规层叠陶瓷电容器的方式相同的方式来制造,通过使用通常片材法或采用糊剂的印刷方法来制备生芯片,烘烤生芯片然后印刷或转录外部电极,然后烘烤。以下将对用于制造层叠陶瓷电容器的方法进行具体描述。
不存在对于用于介电陶瓷层的糊剂的类型的特别限制。例如,糊剂可以是包含介电起始材料和有机载体的混合物的有机涂料,或者可以是包含介电起始材料和含水载体的混合物的含水涂料。
对于介电起始材料,可以使用包含在主要组分和辅助组分中的金属,例如可以使用选自Bi、Na、Sr、Ln、Ti、Li、K、Cu、Mn、Zn、Mg和Co构成的组的金属的氧化物或它们的混合物,或者复合氧化物。此外,介电起始材料可以从作为烘烤的结果的形成上述氧化物或复合氧化物的各种类型的化合物中适当地选择,例如碳酸盐、草酸盐、硝酸盐、氢氧化物和有机金属化合物等,并且这些可以混合使用。介电起始材料中的每种化合物的含量应当以在烘烤后形成上述介电组合物的方式来确定。具有0.1μm至3μm的量级的平均颗粒尺寸的粉末通常用作介电起始材料。介电起始材料优选地为具有0.1μm至1μm的平均颗粒尺寸的粉末。另外,介电起始材料的平均颗粒尺寸可以通过适当改变混合起始材料的时间来调整。
在用于介电层的糊剂为有机涂料的情况下,粘合剂等溶解于有机溶剂中的有机载体和介电起始材料应当被混合。不存在对于在有机载体中使用的粘合剂的特别限制,并且应当从诸如乙基纤维素、聚乙烯醇缩丁醛的各种通常粘合剂中适当选择。另外,不存在对于有机载体中使用的有机溶剂的特别限制,并且应当根据使用的方法即印刷方法或片材方法等从诸如萜品醇、丁基卡必醇、丙酮和甲苯的各种类型的有机溶剂中适当选择。
另外,在用于介电层的糊剂为含水涂料的情况下,水溶性粘合剂和分散剂等溶解于水中的含水载体和介电起始材料应当被混合。不存在对含水载体中使用的水溶性粘合剂的特别限制,并且可以使用的粘合剂的示例包括聚乙烯醇、纤维素和水溶性丙烯酸树脂。
用于内部电极层的糊剂通过将包含各种类型的上述金属或合金的导电材料、或在烘烤之后形成导电材料的各种类型的化合物、有机金属化合物树脂酸盐等与上述有机载体或含水载体混合来制备。用于外部电极的糊剂可以以与用于内部电极的糊剂的方式相同的方式制备。
当使用有机载体制备上述糊剂时,不存在对所述有机载体的含量的特别限制。例如,粘合剂可以以1重量%至5重量%的量级的量存在,并且有机溶剂可以以10重量%至50重量%的量级的量存在。另外,糊剂可以根据需要含有选自各种类型的分散剂、增塑剂、介电材料和绝缘体等中的添加剂。这些添加剂的总含量优选地不大于10重量%。
当使用印刷方法时,将用于介电层的糊剂和用于内部电极层的糊剂印刷在由聚对苯二甲酸乙二醇酯(PET)等制成的基板上的层中,并且切割成预定形状,之后将它们从基板上剥离以形成生芯片。另外,当使用片材方法时,使用用于介电层的糊剂形成生片,并且将用于内部电极层的糊剂印刷在生片上,之后将生片层叠以形成生芯片。
在对生芯片烘烤之前,进行脱脂处理。不存在对脱脂处理的条件的特别限制,并且应当在通常条件下进行。
当使用包括诸如Cu或Cu合金的贱金属的单一贱金属或合金作为用于内部电极层的导电材料时,优选在还原性气氛下进行脱脂处理。不存在对还原气氛的类型的特别限制,并且例如可以使用加湿的N2气体或者包括加湿的N2和H2的混合气体。
不存在对脱脂处理中的温度增加速率、温度保持率或温度保持时间的特别限制。温度增加速度优选为0.1℃/小时至100℃/小时,并且更优选为1℃/小时至10℃/小时。保持温度优选为200℃至500℃,并且更优选为300℃至450℃。温度保持时间优选为1小时至48小时,并且更优选为2小时至24小时。粘合剂组分等的有机组分优选通过脱脂处理除去至300ppm左右,并且更优选地除去至200ppm左右。
为了获得电容器元件主体对生芯片进行烘烤的气氛应当根据用于内部电极层的糊剂中的导电材料的类型进行适当选择。
当使用包括诸如Cu或Cu合金的贱金属的单一的贱金属或合金用作用于内部电极层的糊剂中的导电材料时,在烘烤气氛中的氧分压优选在10-6atm至10-8atm之间。通过将氧分压设定在10-8atm或以上,可以抑制绝缘电阻的下降和形成介电层的组分的劣化。另外,通过将氧分压设定在10-6atm或更小,可以抑制内部电极层的氧化。
另外,烘烤期间的保持温度优选为900℃至1100℃,并且更优选为950℃至1050℃。通过将保持温度设定为900℃或更高,这使得烘烤引起的致密化更可能充分地进行。另外,通过将保持温度设定为1100℃或更低,这有助于抑制形成内部电极层的各种材料的扩散和内部电极层的异常烧结。通过抑制内部电极层的异常烧结,这有助于防止内部电极的损坏。通过抑制形成内部电极层的各种材料的扩散,这有助于防止DC偏置特性的劣化。
通过将烘烤期间的保持温度适当地设定在上述温度范围内,这有助于获得所需的晶粒尺寸。另外,不存在对烘烤气氛的特别限制。为了抑制内部电极层的氧化,烘烤气氛优选为还原气氛。不存在对气体气氛的特别限制。例如,包括N2和H2的混合气体优选被加湿以用作气体气氛。另外,不存在对烘烤时间的特别限制。
当制造根据实施方式的方式的层叠陶瓷电容器时,可以进行退火(再氧化)。退火应当在通常条件下进行。不存在对退火气氛的特别限制。例如,可以使用加湿的N2气体或包括加湿的N2和H2的混合气体。
为了加湿N2气体或包括N2和H2的混合气体,在上述脱脂、烘烤和退火中,例如应当使用湿润器等。在这种情况下,水温优选在20℃至90℃左右。
脱脂、烘烤和退火可以连续或独立进行。当连续进行时,优选进行脱脂,之后在没有冷却的情况下改变气氛,然后将温度升高至烘烤保持温度并进行烘烤。另一方面,当它们独立进行时,在烘烤期间,温度优选在N2气氛下升高到用于脱脂处理的保持温度,之后改变气氛并且然后继续进一步升温,并且在烘烤之后,优选进行冷却至用于脱脂处理的保持温度,之后再次将气氛变成N2气体气氛,并且继续进一步冷却。应当注意的是,上述的N2气体可以被加湿或者可以不被加湿。
以这种方式获得的电容器元件主体的端部表面例如通过滚筒抛光或喷砂等进行抛光,例如,将用于外部电极的糊剂印刷或转录到其上,进行烘烤并且形成外部电极。用于外部电极的糊剂优选在600℃至800℃下在加湿的N2和H2的混合气体下烘烤10分钟至1小时左右的时间。根据需要,通过电镀等在外部电极表面上形成涂层。
不存在对以这样的方式制造的根据本发明的实施方式的方式的层叠陶瓷电容器的应用的特别限制。例如,可以通过焊料等将其安装在印刷电路板等上,或者可以用于各种类型的电子设备,例如移动电话或数字电视等。
上面已经描述了根据本发明的实施方式的方式的层叠陶瓷电容器及用于制造层叠陶瓷电容器的方法,但是本发明不以任何方式受限于该实施方式的方式,并且各种方式当然可以在不脱离本发明的要点的范围内实现。
[示例性实施方式]
下面将借助于示例性实施方式和比较例来进一步详细描述本发明。然而,本发明不限于以下示例性实施方式。
首先将由以下指示的用于主要组分的起始材料粉末和用于辅助组分的起始材料粉末制备为用于制造介电陶瓷层的起始材料。应当注意的是,所制备的起始材料粉末的平均粒径在所有情况下为0.1μm至1μm。
以如下方式对主要组分(Bi2O3、Na2CO3、SrCO3、Ln2O3和TiO2)的起始材料粉末进行称重:烘烤之后的介电组合物满足表1至表3中的组合物,然后通过球磨机将它们湿式混合,之后将所得到的混合物在空气中在750℃至850℃下煅烧2小时,并且制备主要组分粉末。Ln是选自La、Nd、Sm、Gd、Dy和Yb中的一种元素。在表1至表3中,a、b、c和d表示下式(1)中的a、b、c和d的数值。
(BiaNabSrcLnd)TiO3...(1)
然后制备辅助组分(Li2CO3、K2CO3、CuO、MnCO3、ZnO、MgO和Co3O4)的起始材料粉末。以如下方式对起始材料粉末进行称重:相对于100摩尔份主要组分中的Ti含量,烘烤之后的组合物达到表1至表3所示的摩尔份数,然后将它们与主要组分粉末混合并且获得混合粉末。
然后将有机溶剂和有机载体加入到混合粉末中,并且使用球磨机将材料湿式混合以制备用于介电层的糊剂。同时,将Ag粉末、Ag-Pd合金粉末或Cu粉末与有机载体混合作为导电材料粉末,并且制备用于各种类型的内部电极层的Ag、Ag-Pd合金或Cu糊剂。然后,通过片模塑法将用于介电层的糊剂模塑成片状,并且获得具有10μm的厚度的陶瓷生片。
通过丝网印刷将用于内部电极层的糊剂涂覆在陶瓷生片上以印刷内部电极层。将其上印刷有内部电极层的陶瓷生片层叠,之后将其切割成具有4.5×4.3×1.0mm的尺寸的块状,由此制备层叠的生芯片。内部电极层的厚度为2μm并且层叠的数目为10。层叠的生芯片经受在300℃至500℃下脱脂并且将有机组分减除至300ppm左右。在脱脂后,在大气下或在850℃至1100℃的还原气氛下对生芯片进行烘烤。根据需要改变烘烤时间。当在还原气氛下进行烘烤时,使用的气体气氛是包括加湿的N2和H2的混合气体。在烘烤后,对内部电极的暴露表面进行抛光,将具有Ag或Cu的用于外部电极的糊剂作为导电材料涂覆在其上,并且获得层叠陶瓷电容器。
此外,确认的是,通过将烘烤的层叠生芯片的介电层溶解在溶剂中并进行ICP光发射光谱分析,组合物与表1至表3中所示的那些组合物相同。
还测量了形成介电层的介电颗粒的平均晶粒尺寸。弦法用于测量介电颗粒的平均晶粒尺寸。使用电子显微镜(Hitachi High-Tech,S-4700)在10000倍至20000倍的放大倍数下捕获了介电层的照片。以这样的方式在多张照片上绘制了直线:直线与晶界之间的交点的数目N为约300,并且计算了平均晶粒尺寸D。
对制备好的层叠陶瓷电容器中的每个进行在叠加了0.1V/μm的AC电压的情况下在25℃的室温下的施加8V/μm的DC偏置时的电容和在150℃的绝缘电阻的进一步测量。由电容、绝缘电阻、电极表面积和介电层之间的距离进一步计算介电常数和绝缘电阻。
将DC高压电源(Glassman High Voltage,WX10P90)连接至数字LCR仪(Hewlett-Packard,4284A),并且在将8V/μm的DC偏置电压施加到层叠陶瓷电容器中的每个上的同时通过所述数字LCR仪在25℃的室温下测量电容。
通过使用DC高压电源(Glassman High Voltage,WX10P90)向层叠陶瓷电容器中的每个施加与8V/μm对应的电压并且测量在150℃下的恒温槽内的电流值,由此获得绝缘电阻。
在表1至表3中示出了对示例性实施方式和比较例中的每个的当在25℃的室温下施加8V/μm的DC偏置时的介电常数以及在150℃下的绝缘电阻。当施加8V/μm的DC偏置时,800或更大的介电常数被认为是好的。另外,1012Ω·cm或更高的绝缘电阻率被认为是好的。
Figure GDA0001978727020000131
Figure GDA0001978727020000141
Figure GDA0001978727020000151
Figure GDA0001978727020000161
Figure GDA0001978727020000171
Figure GDA0001978727020000181
根据表1至表3清楚的是,确认了当主要组分包括Bi、Na、Sr、Ln和Ti并且介电颗粒的平均晶粒尺寸为0.1μm至1μm(示例性实施方式1至102)时,在150℃下的绝缘电阻率为1012Ω·cm或更大,并且当施加8V/μm的DC偏置时的介电常数为800或更大。
另一方面,结果示出了在介电颗粒的平均晶粒尺寸超过1μm并且主要组分不包含稀土元素Ln的比较例1和2中,介电常数和绝缘电阻率两者都过低。结果还示出了在主要组分不含有稀土元素Ln的比较例3中,介电常数和电阻率两者都过低,即使介电颗粒的平均晶粒尺寸在0.1μm至1μm的范围内。
结果还示出在介电颗粒的平均晶粒尺寸为1.23μm的比较例4中,在150℃下的绝缘电阻率过低为7×1011Ω·cm。结果还示出了在介电颗粒的平均晶粒尺寸为0.09μm的比较例5中,当施加DC偏置时的介电常数过低为650。
[附图标记]
1...层叠陶瓷电容器
2...介电层
3...内部电极层
4...外部电极
10...电容器元件主体

Claims (14)

1.一种介电组合物,所述介电组合物为其中主要组分包括Bi、Na、Sr、Ln和Ti的钙钛矿化合物,并且Ln为至少一种类型的稀土元素,其中,所述稀土元素选自La、Gd、Nd和Sm构成的组,其特征在于,平均晶粒尺寸在0.1μm和0.99μm之间。
2.根据权利要求1所述的介电组合物,其中,所述主要组分由(BiaNabSrcLnd)TiO3表示,其中a、b、c和d分别满足以下条件:0<a<0.50,0<b<0.50,0<c≤0.80,0<d≤0.20和0.90≤a+b+c+d≤1.05。
3.根据权利要求1或2所述的介电组合物,其中,相对于所述主要组分中所含的100摩尔份的Ti,所述介电组合物含有5摩尔份和18摩尔份之间的选自Li和K构成的组的至少一种作为辅助组分。
4.根据权利要求1至2中的任一项所述的介电组合物,其中,相对于所述主要组分中所含的100摩尔份的Ti,所述介电组合物含有0.2摩尔份和1摩尔份之间的选自Cu、Mn、Zn、Mg和Co构成的组的至少一种作为辅助组分。
5.一种介电元件,包含根据权利要求1至4中的任一项所述的介电组合物。
6.一种电子部件,设置有包含根据权利要求1至4中的任一项所述的介电组合物的介电层。
7.一种层叠电子部件,具有层叠部,所述层叠部通过交替地层叠内部电极层和包含根据权利要求1至4中的任一项所述的介电组合物的介电层而形成。
8.根据权利要求7所述的层叠电子部件,其中,所述内部电极层由实质上用作电极的贵金属或贱金属的导电材料形成。
9.根据权利要求8所述的层叠电子部件,其中,贵金属导电材料或贱金属导电材料包括Cu或Cu合金。
10.根据权利要求7至9中的任一项所述的层叠电子部件,包括由金属形成的外部电极。
11.根据权利要求10所述的层叠电子部件,其中,所述外部电极由单独使用的选自Ni、Pd、Ag、Au、Cu、Pt、Rh、Ru和Ir中的一种金属、或选自Ni、Pd、Ag、Au、Cu、Pt、Rh、Ru和Ir中的两种或更多种金属的合金形成。
12.根据权利要求7至9中的任一项所述的层叠电子部件,其产生层叠陶瓷电容器。
13.一种制造层叠陶瓷电容器的方法,其中,首先,制备如下指出的用于主要组分的起始材料粉末和用于辅助组分的起始材料粉末以作为用于制造介电陶瓷层的起始材料,
其中,同时地,将Ag粉末、Ag-Pd合金粉末或Cu粉末与有机载体混合作为导电材料粉末,并且制备用于各种类型的内部电极层的Ag、Ag-Pd合金或Cu糊剂,
并且之后,通过片模塑法将用于所述介电陶瓷层的糊剂模塑成片状并且获得具有10μm的厚度的陶瓷生片,
接下来,进行通过丝网印刷将用于所述内部电极层的糊剂涂覆在所述陶瓷生片上以印刷所述内部电极层的步骤,
由此将上面印刷有所述内部电极层的所述陶瓷生片层叠,之后,将它们切割成具有4.5×4.3×1.0mm的尺寸的块状,由此制备层叠的生芯片,
之后,层叠的生芯片在300℃至500℃下经受脱脂,并且将有机组分减除至300ppm,
所述脱脂后,在850℃至1100℃下在还原气氛或大气下对所述生芯片进行烘烤,
并且在所述烘烤之后,对所述内部电极层的暴露表面进行抛光,将作为导电材料的具有Ag或Cu的用于外部电极的糊剂涂覆到所述暴露表面上,并且获得层叠的陶瓷电容器,
其中,所述电容器包括介电组合物,所述介电组合物为其中主要组分包括Bi、Na、Sr、Ln和Ti的钙钛矿化合物,并且Ln为至少一种类型的稀土元素,其中,所述稀土元素选自La、Gd、Nd和Sm构成的组,其特征在于,平均晶粒尺寸在0.1μm和0.99μm之间。
14.根据权利要求13所述的制造层叠陶瓷电容器的方法,其中所述内部电极层和所述外部电极是由铜形成。
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