CN106816431A - 一种电磁屏蔽封装结构及其制造方法 - Google Patents

一种电磁屏蔽封装结构及其制造方法 Download PDF

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CN106816431A
CN106816431A CN201510869794.XA CN201510869794A CN106816431A CN 106816431 A CN106816431 A CN 106816431A CN 201510869794 A CN201510869794 A CN 201510869794A CN 106816431 A CN106816431 A CN 106816431A
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substrate
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肖俊义
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Abstract

本发明公开了一种电磁屏蔽封装结构及其制造方法，所述电磁屏蔽封装结构包括基板、安装于该基板上的至少一个元器件、注胶层、包覆所述注胶层外表面的屏蔽金属层；基板外侧设有接地端，基板上设有第一通孔，至少一元器件上设有第二通孔，所述第一通孔和第二通孔内壁均设有导电层，所述屏蔽金属层通过导体顺次连接所述第二通孔的导电层、第一通孔的导电层及所述接地端形成导电回路，使屏蔽金属层接地，从而提供一种结构简单、使用可靠、加工方便的电磁屏蔽封装结构，降低材料和加工成本。

Description

一种电磁屏蔽封装结构及其制造方法
技术领域
本发明涉及芯片封装技术领域，尤其是涉及一种电磁屏蔽封装结构及其制造方法。
背景技术
目前，通讯产品已广泛普及并有了长足发展，与此同时，对通讯产品小型化和高灵敏度的要求也越来越高，对信号质量的要求也越发严格，因此，电磁兼容(EMI)成了系统小型化封装中一个非常重要的问题。
为屏蔽外界磁场对射频模组的干扰，现有技术中主要存在如下解决方案：1、射频模块安装在主板上，直接在主板上模块周围放置金属屏蔽盖，其存在金属屏蔽盖设计复杂，成本高，且要占据主板空间，增加PCB尺寸，屏蔽盖和PCB板之间有分层风险的缺陷；2、在射频模块内置金属屏蔽盖，该方案中金属屏蔽盖导致PCB面积增加,成本高，且封装注胶过程容易有气洞问题；3、模块表面电镀/喷涂导电材料，和模块基板背面接地I/O或基板上表面边缘接地I/O连接，也存在需要增加PCB和产品尺寸、封装注胶时需要单颗封装、增加成本的问题；4、模块表面电镀/喷涂导电材料，和模块基板侧面外露接地导线连接，需要增加PCB尺寸，且整片PCB产品电镀/喷涂,产品导电材料厚度不容易控制,影响EMI效果；5、模块上表面电镀/喷涂导电材料和金线接地，侧面通过金线实现屏蔽，该方案金线接地工艺时间长,且不可靠,另大幅增加成本。
发明内容
针对现有技术中存在的上述问题，本发明公开了一种电磁屏蔽封装结构及其制造方法，旨在提供一种结构简单、使用可靠、加工方便的电磁屏蔽封装结构，降低材料和加工成本。
本发明是通过如下技术方案实现的：
一种电磁屏蔽封装结构，包括基板、安装于该基板上的至少一个元器件、覆盖所述元器件并填充所述元器件与所述基板之间空隙的注胶层、包覆所述注胶层外表面的屏蔽金属层；所述基板外侧设有至少一个接地端，基板上与接地端对应的位置设有第一通孔，至少一元器件上设有第二通孔，所述第一通孔和第二通孔内壁均设有导电层，所述屏蔽金属层通过导体顺次连接所述第二通孔的导电层、第一通孔的导电层及所述接地端形成导电回路，使屏蔽金属层接地。
本发明还公开了一种电磁屏蔽封装结构的制造方法，包括步骤：
制作基板，在基板外侧设置至少一个接地端，基板上与接地端对应的位置开设第一通孔，第一通孔内壁附着导电膜，并将第一通孔内壁的导电膜与接地端电连接；
将至少一个元器件安装于所述基板上，并在至少一个元器件上开设第二通孔，第二通孔内壁附着导电膜并将该导电膜与第一通孔内壁的导电膜电连接；
注胶覆盖所述元器件并填充所述元器件与所述基板之间空隙；
注胶层开设连通至所述第二通孔的缺口；
在注胶层外表面形成屏蔽金属层，屏蔽金属层填充所述缺口并与所述第二通孔内壁的导电膜电连接。
本发明公开的电磁屏蔽封装结构及其制造方法有效利用元器件和溅镀,形成接地回路,达到电磁屏蔽效果，不必单独设置屏蔽盖，减小空间占用；电磁屏蔽封装结构侧面无溅镀金属,模块后续安装到主板上不会有短路问题，从而提供了一种结构简单、使用可靠、加工方便的电磁屏蔽封装结构，降低材料和加工成本。
附图说明
图1至图5是本发明的电磁屏蔽封装结构在一实施例中的制造工艺流程示意图；
图6为本发明的电磁屏蔽封装结构中倒装芯片在一实施例中的结构示意图。
主要元件符号说明
倒装芯片 1
注胶层 2
屏蔽金属层 3
倒装芯片金属层 4
接地端 5
无源器件 6
连接线 7
裸芯片 8
基板 9
导电铜柱 10
第一通孔 9a
芯片本体 1b
焊脚 1c
缺口 2a
第二通孔 1a
第一表面 9b
第二表面 9c
焊垫 9d
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
请参阅图1所示，本发明的电磁屏蔽封装结构在本实施例中包括基板9，基板9具有第一表面9b及与该第一表面9b平行设置的第二表面9c，再参阅图2所示，该基板9上安装有至少一个元器件，例如，元器件安装于第一表面9b上。参阅图3和图4所示，还包括注胶层2，注胶层2覆盖所述元器件并填充所述元器件与所述基板9之间空隙。再参阅图5所示，注胶层2外表面包覆有屏蔽金属层3。第二表面9c外侧设有接地端5，基板9上与接地端5对应的位置设有第一通孔9a，第一通孔9a贯穿所述第一表面9b和第二表面9c。至少一元器件上设有第二通孔1a，第二通孔1a和第一通孔9a内壁均设有导电层。注胶层2上设有连通第二通孔1a至屏蔽金属层3的缺口2a(如图4所示)，该缺口2a内设有连接屏蔽金属层3与第二通孔1a的导电层的导体，屏蔽金属层3通过导体顺次连接所述第二通孔1a的导电层、第一通孔9a的导电层及所述接地端5形成导电回路，使屏蔽金属层3接地。
可以理解的是，在具体实施中，接地端5可以如图5所示，设于基板9的第二表面9c上，以便于直接接地，接地端5也可以根据基板9上元器件的布局，设置于基板9的其他未被覆盖的表面上，并且根据常识可以理解的是，接地端5可以直接接地，也可以根据实际需要连接到其他电器接地的外壳，达到使屏蔽金属层3接地的效果即可。
在具体实施中，上述元器件可以为裸芯片、无源器件、封装芯片中的一种或多种。当该元器件为裸芯片8时，裸芯片8可倒装焊接在基板9上，形成倒装芯片1，具体而言，裸芯片8通过多个导电铜柱10和倒装焊脚固定连接于基板9上，相应的，第二通孔1a的导电层、第一通孔9a的导电层通过导电铜柱10和倒装焊脚连接导通，从而形成路径顺次为屏蔽金属层3、缺口2a内的导体、第二通孔1a的导电层、第一通孔9a的导电层、导电铜柱10、倒装焊脚、接地端5的导电回路，使屏蔽金属层3接地。裸芯片8也可以通过粘合剂粘合于所述基板9上，并通过连接线7与设于基板9上的焊垫9d之间电连接。当该元器件为无源器件6或封装后的芯片时，无源器件6或封装后的芯片采用表面贴装的方式安装于所述基板9上。
为简化结构和加工，上述导体为屏蔽金属层3填充在所述缺口内的部分。以倒装芯片1为例，参阅图6所示，倒装芯片1包括芯片本体1b，芯片本体1b的一面设有导电铜柱10，导电铜柱10前端设有焊脚1c，倒装芯片1通过焊脚1c倒装焊接在基板9上，芯片本体1b的另一面为芯片金属层，芯片本体1b上设有连通至芯片金属层的第二通孔1a，第二通孔1a内壁附着有导电层。倒装芯片1固定在基板后通过注胶层2填充封装，注胶层2上开设有连通至芯片金属层的缺口，如此一来，在注胶层2外表面形成屏蔽金属层3时，屏蔽金属层3同时填充入该缺口内，使屏蔽金属层3与倒装芯片1的芯片金属层导电连接，进而形成路径顺次为屏蔽金属层3、倒装芯片1的芯片金属层、第二通孔1a的导电层、导电铜柱10、焊脚1c、第一通孔9a的导电层、接地端的导电回路，使屏蔽金属层3接地，对封装于基板9上的倒装芯片1起到电磁屏蔽作用。可以理解的是，在基板9和屏蔽金属层3之间还可同时屏蔽封装其他元器件，如上述裸芯片、无源器件、封装芯片。
从本发明的上述电磁屏蔽封装结构可知，其有效利用了封装的元器件，通过在元器件及基板内部设置导电通孔，将屏蔽金属层3接地，达到电磁屏蔽效果，不必外设屏蔽器件及屏蔽线路，有效简化了结构，同时有利于减小封装结构的尺寸。
相应的，本发明还公开了上述电磁屏蔽封装结构的制造方法，现结合图1至图6作详细说明，具体步骤如下：
制作基板9，在基板9外侧设置至少一个接地端5，基板9上与接地端5对应的位置开设第一通孔9a，第一通孔9a内壁涂敷导电膜，并将第一通孔9a内壁的导电膜与接地端5电连接；
将至少一个元器件安装于所述基板上，并在至少一个元器件上开设第二通孔1a，第二通孔1a内壁涂敷导电膜并将该导电膜与第一通孔9a内壁的导电膜电连接；
注胶覆盖所述元器件并填充所述元器件与基板9之间空隙，将零部件封装在基板9上；
在注胶层2开设连通至所述第二通孔1a的缺口2a；
在注胶层2外表面形成屏蔽金属层3，屏蔽金属层3填充所述缺口2a并与所述第二通孔1a内壁的导电膜电连接。在具体实施中，屏蔽金属层3可选用铜等材料通过溅镀的方式在注胶层表面形成屏蔽层，也可以选用含铁、钴、镍或相应合金的高导磁率、高导电率的胶体形成屏蔽层。
为提高加工效率，上述制作基板9的步骤中，该基板采用连片基板并按预定规格划分为多个单元基板，在每个单元基板分别设置接地端5、第一通孔9a及其内壁的导电膜，完成后续步骤，并在形成屏蔽金属层3的步骤后还包括切割形成单颗电磁屏蔽封装结构的步骤。采用连片加工的工艺还存在如下优点：其一，在形成屏蔽金属层3时，可以整片溅镀，相对单颗溅镀大大节约材料成本，其二，切割形成的单颗电磁屏蔽封装结构侧面无溅镀金属，后续安装到主板上不会造成短路隐患。
以上实施例仅用以说明本发明的技术方案而非限制，尽管参照较佳实施例对本发明进行了详细说明，本领域的普通技术人员应当理解，可以对本发明的技术方案进行修改或等同替换，而不脱离本发明技术方案的精神和范围。

Claims (10)

1.一种电磁屏蔽封装结构，其特征在于：包括基板、安装于该基板上的至少一个元器件、覆盖所述元器件并填充所述元器件与所述基板之间空隙的注胶层、包覆所述注胶层外表面的屏蔽金属层；所述基板外侧设有至少一个接地端，基板上与接地端对应的位置设有第一通孔，至少一元器件上设有第二通孔，所述第一通孔和第二通孔内壁均设有导电层，所述屏蔽金属层通过导体顺次连接所述第二通孔的导电层、第一通孔的导电层及所述接地端形成导电回路，使屏蔽金属层接地。
2.如权利要求1所述的电磁屏蔽封装结构，其特征在于：所述基板具有第一表面及与该第一表面平行设置的第二表面，所述元器件安装于所述第一表面，所述接地端设于该第二表面外侧，所述第一通孔贯穿所述第一表面和第二表面。
3.如权利要求1所述的电磁屏蔽封装结构，其特征在于：所述注胶层上设有连通所述第二通孔至所述屏蔽金属层的缺口，该缺口内设有连接所述屏蔽金属层与所述第二通孔的导电层的导体。
4.如权利要求3所述的电磁屏蔽封装结构，其特征在于：所述导体为所述屏蔽金属层填充在所述缺口内的部分。
5.如权利要求1所述的电磁屏蔽封装结构，其特征在于：所述元器件为裸芯片，所述裸芯片倒装焊接于所述基板上。
6.如权利要求1所述的电磁屏蔽封装结构，其特征在于：所述元器件为裸芯片，所述裸芯片粘合于所述基板上，并通过连接线与基板之间电连接。
7.如权利要求1所述的电磁屏蔽封装结构，其特征在于：所述元器件为无源器件或封装后的芯片，所述无源器件或封装后的芯片采用表面贴装的方式安装于所述基板上。
8.一种电磁屏蔽封装结构的制造方法，其特征在于，包括步骤：
制作基板，在基板外侧设置至少一个接地端，基板上与接地端对应的位置开设第一通孔，第一通孔内壁附着导电膜，并将第一通孔内壁的导电膜与接地端电连接；
将至少一个元器件安装于所述基板上，并在至少一个元器件上开设第二通孔，第二通孔内壁附着导电膜并将该导电膜与第一通孔内壁的导电膜电连接；
注胶覆盖所述元器件并填充所述元器件与所述基板之间空隙；
注胶层开设连通至所述第二通孔的缺口；
在注胶层外表面形成屏蔽金属层，屏蔽金属层填充所述缺口并与所述第二通孔内壁的导电膜电连接。
9.如权利要求8所述的电磁屏蔽封装结构的制造方法，其特征在于：所述制作基板的步骤中，该基板采用连片基板并按预定规格划分为多个单元基板，在每个单元基板分别设置接地端、第一通孔及其内壁的导电膜，完成后续步骤，并在形成屏蔽金属层的步骤后还包括切割形成单颗电磁屏蔽封装结构的步骤。
10.如权利要求8或9所述的电磁屏蔽封装结构的制造方法，其特征在于：所述屏蔽金属层通过金属溅镀的方式形成于注胶层外表。
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