CN106463523B - 绝缘栅型半导体装置、以及绝缘栅型半导体装置的制造方法 - Google Patents

绝缘栅型半导体装置、以及绝缘栅型半导体装置的制造方法 Download PDF

Info

Publication number
CN106463523B
CN106463523B CN201580018795.1A CN201580018795A CN106463523B CN 106463523 B CN106463523 B CN 106463523B CN 201580018795 A CN201580018795 A CN 201580018795A CN 106463523 B CN106463523 B CN 106463523B
Authority
CN
China
Prior art keywords
region
trench
forming
outer peripheral
peripheral groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201580018795.1A
Other languages
English (en)
Chinese (zh)
Other versions
CN106463523A (zh
Inventor
斋藤顺
池田知治
庄司智幸
山本敏雅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyota Motor Corp
Original Assignee
Toyota Motor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyota Motor Corp filed Critical Toyota Motor Corp
Publication of CN106463523A publication Critical patent/CN106463523A/zh
Application granted granted Critical
Publication of CN106463523B publication Critical patent/CN106463523B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107—Buried supplementary regions, e.g. buried guard rings 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/314—Channel regions of field-effect devices of FETs of IGFETs having vertical doping variations 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H10P30/2042—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors into crystalline silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/218—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the implantation in a compound semiconductor of both electrically active and inactive species in the same semiconductor region to be doped n-type or p-type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0148—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts

Landscapes

  • Electrodes Of Semiconductors (AREA)
CN201580018795.1A 2014-04-09 2015-02-10 绝缘栅型半导体装置、以及绝缘栅型半导体装置的制造方法 Expired - Fee Related CN106463523B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014-080040 2014-04-09
JP2014080040A JP6208612B2 (ja) 2014-04-09 2014-04-09 絶縁ゲート型半導体装置、及び、絶縁ゲート型半導体装置の製造方法
PCT/JP2015/053692 WO2015156023A1 (ja) 2014-04-09 2015-02-10 絶縁ゲート型半導体装置、及び、絶縁ゲート型半導体装置の製造方法

Publications (2)

Publication Number Publication Date
CN106463523A CN106463523A (zh) 2017-02-22
CN106463523B true CN106463523B (zh) 2019-05-10

Family

ID=54287604

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580018795.1A Expired - Fee Related CN106463523B (zh) 2014-04-09 2015-02-10 绝缘栅型半导体装置、以及绝缘栅型半导体装置的制造方法

Country Status (6)

Country Link
US (1) US9755042B2 (https=)
JP (1) JP6208612B2 (https=)
KR (1) KR101887795B1 (https=)
CN (1) CN106463523B (https=)
DE (1) DE112015001756B4 (https=)
WO (1) WO2015156023A1 (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6266975B2 (ja) 2013-12-26 2018-01-24 トヨタ自動車株式会社 絶縁ゲート型半導体装置の製造方法及び絶縁ゲート型半導体装置
JP6278048B2 (ja) * 2016-02-19 2018-02-14 トヨタ自動車株式会社 半導体装置
DK201670595A1 (en) * 2016-06-11 2018-01-22 Apple Inc Configuring context-specific user interfaces
DE112018001179T5 (de) * 2017-03-06 2019-12-24 Mitsubishi Electric Corporation Siliciumcarbid-halbleitereinheit, leistungswandler, verfahren zur herstellung einer siliciumcarbid-halbleitereinheit und verfahren zur herstellung eines leistungswandlers
JP2019046991A (ja) * 2017-09-04 2019-03-22 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN107634095A (zh) * 2017-09-14 2018-01-26 全球能源互联网研究院 沟槽型半导体功率器件及其制备方法
CN109300977A (zh) * 2018-10-08 2019-02-01 深圳市南硕明泰科技有限公司 一种晶体管及其制作方法
DE102019119121B3 (de) 2019-07-15 2020-09-03 Infineon Technologies Ag Graben-kontaktstruktur enthaltende halbleitervorrichtung und herstellungsverfahren
JP7326991B2 (ja) * 2019-08-22 2023-08-16 株式会社デンソー スイッチング素子
JP7288827B2 (ja) * 2019-09-06 2023-06-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP7717010B2 (ja) * 2022-03-08 2025-08-01 株式会社デンソー 半導体装置
CN118198103A (zh) * 2024-03-26 2024-06-14 重庆万国半导体科技有限公司 提高电场分布均匀程度的沟槽器件终端结构及其制作方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1864270A (zh) * 2003-10-08 2006-11-15 丰田自动车株式会社 绝缘栅型半导体器件及其制造方法
JP2007173319A (ja) * 2005-12-19 2007-07-05 Toyota Motor Corp 絶縁ゲート型半導体装置およびその製造方法
JP2008135522A (ja) * 2006-11-28 2008-06-12 Toyota Motor Corp 半導体装置
CN100477267C (zh) * 2004-10-29 2009-04-08 丰田自动车株式会社 绝缘栅极半导体器件及其生产方法
JP2010062361A (ja) * 2008-09-04 2010-03-18 Toyota Motor Corp 半導体装置
JP2012238741A (ja) * 2011-05-12 2012-12-06 Panasonic Corp 半導体装置及びその製造方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4445553A1 (de) * 1993-12-21 1995-06-22 Nippon Denso Co Halbleiterbeschleunigungssensor
JPH1187698A (ja) 1997-09-02 1999-03-30 Kansai Electric Power Co Inc:The 高耐圧半導体装置及びこの装置を用いた電力変換器
US6380569B1 (en) 1999-08-10 2002-04-30 Rockwell Science Center, Llc High power unipolar FET switch
TW594946B (en) 2002-01-16 2004-06-21 Sanken Electric Co Ltd Manufacturing method of semiconductor device
JP4488935B2 (ja) * 2005-03-11 2010-06-23 関西電力株式会社 高耐圧半導体装置
JP4453671B2 (ja) 2006-03-08 2010-04-21 トヨタ自動車株式会社 絶縁ゲート型半導体装置およびその製造方法
DE102006036347B4 (de) * 2006-08-03 2012-01-12 Infineon Technologies Austria Ag Halbleiterbauelement mit einer platzsparenden Randstruktur
US8354711B2 (en) 2010-01-11 2013-01-15 Maxpower Semiconductor, Inc. Power MOSFET and its edge termination
JP6037499B2 (ja) 2011-06-08 2016-12-07 ローム株式会社 半導体装置およびその製造方法
WO2012177678A2 (en) 2011-06-22 2012-12-27 Celgene Corporation Isotopologues of pomalidomide
US20130087852A1 (en) 2011-10-06 2013-04-11 Suku Kim Edge termination structure for power semiconductor devices
US8653587B2 (en) 2012-02-13 2014-02-18 Force Mos Technology Co., Ltd. Trench MOSFET having a top side drain
JP6139355B2 (ja) 2013-09-24 2017-05-31 トヨタ自動車株式会社 半導体装置
JP6266975B2 (ja) 2013-12-26 2018-01-24 トヨタ自動車株式会社 絶縁ゲート型半導体装置の製造方法及び絶縁ゲート型半導体装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1864270A (zh) * 2003-10-08 2006-11-15 丰田自动车株式会社 绝缘栅型半导体器件及其制造方法
CN100477267C (zh) * 2004-10-29 2009-04-08 丰田自动车株式会社 绝缘栅极半导体器件及其生产方法
JP2007173319A (ja) * 2005-12-19 2007-07-05 Toyota Motor Corp 絶縁ゲート型半導体装置およびその製造方法
JP2008135522A (ja) * 2006-11-28 2008-06-12 Toyota Motor Corp 半導体装置
JP2010062361A (ja) * 2008-09-04 2010-03-18 Toyota Motor Corp 半導体装置
JP2012238741A (ja) * 2011-05-12 2012-12-06 Panasonic Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
US9755042B2 (en) 2017-09-05
JP2015201559A (ja) 2015-11-12
KR101887795B1 (ko) 2018-08-10
WO2015156023A1 (ja) 2015-10-15
KR20160138294A (ko) 2016-12-02
DE112015001756B4 (de) 2019-04-04
JP6208612B2 (ja) 2017-10-04
DE112015001756T5 (de) 2017-01-19
US20170025516A1 (en) 2017-01-26
CN106463523A (zh) 2017-02-22

Similar Documents

Publication Publication Date Title
CN106463523B (zh) 绝缘栅型半导体装置、以及绝缘栅型半导体装置的制造方法
CN110914998B (zh) 半导体装置及其制造方法
KR101028131B1 (ko) 절연게이트형 반도체장치 및 그 제조방법
JP6693131B2 (ja) 半導体装置
CN105981173B (zh) 半导体装置以及半导体装置的制造方法
CN104112769B (zh) 半导体功率器件
CN107833921B (zh) 开关器件和制造开关器件的方法
CN103348478A (zh) 碳化硅半导体器件及其制造方法
CN104517852A (zh) 横向漏极金属氧化物半导体元件及其制造方法
US10243035B2 (en) Method of manufacturing switching element
CN109473476B (zh) 一种横向双扩散金属氧化物半导体器件及其制作方法
CN107425046A (zh) 一种ldmos器件及其制作方法
CN101366105A (zh) 半导体装置及其制造方法
WO2015098167A1 (ja) 絶縁ゲート型半導体装置の製造方法及び絶縁ゲート型半導体装置
CN103137661B (zh) 横向双扩散金属氧化物半导体器件及其制造方法
CN103915497B (zh) 半导体器件及其制造方法
JP2009081411A (ja) 半導体装置
WO2016058277A1 (zh) 一种浅沟槽半超结vdmos器件及其制造方法
JP2015201557A (ja) 半導体装置及び半導体装置の製造方法
CN102097484A (zh) 一种多通道ldmos及其制备方法
WO2015122049A1 (ja) 絶縁ゲート型スイッチング素子を製造する方法及び絶縁ゲート型スイッチング素子
CN103337498A (zh) 一种bcd半导体器件及其制造方法
CN104766885B (zh) 一种对称隔离ldmos器件及其制造方法
CN107464834B (zh) 功率半导体器件及其制造方法
KR20160032654A (ko) 반도체 장치 및 그 제조 방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right
TA01 Transfer of patent application right

Effective date of registration: 20190329

Address after: Aichi Prefecture, Japan

Applicant after: Toyota Motor Corp.

Address before: Aichi Prefecture, Japan

Applicant before: Toyota Motor Corp.

Applicant before: DENSO Corp.

GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20190510