CN106298921A - 半导体器件、鳍式场效应晶体管及其形成方法 - Google Patents

半导体器件、鳍式场效应晶体管及其形成方法 Download PDF

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CN106298921A
CN106298921A CN201510293006.7A CN201510293006A CN106298921A CN 106298921 A CN106298921 A CN 106298921A CN 201510293006 A CN201510293006 A CN 201510293006A CN 106298921 A CN106298921 A CN 106298921A
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insulating barrier
semiconductor substrate
silicon oxide
forming method
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CN106298921B (zh
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谢欣云
周鸣
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Semiconductor Manufacturing International Shanghai Corp
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Abstract

本发明提供一种半导体器件、鳍式场效应晶体管及其形成方法。所述鳍式场效应晶体管包括：半导体衬底、位于所述半导体衬底上的绝缘层、位于所述绝缘层上的鳍部，和位于所述半导体衬底上的栅极结构，所述栅极结构横跨至少一个所述鳍部，并覆盖所述鳍部的侧壁与顶部，所述绝缘层的材料为掺氮的氧化硅。所述鳍式场效应晶体管中，在栅极和鳍部的下方形成绝缘层，从而在使用过程中，抑制器件短沟道效应，减少源极和漏极的漏电流，提高鳍式场效应晶体管的性能；此外以掺氮的氧化硅为所述绝缘层材料，可有效提高绝缘层的散热功效，从而提高鳍式场效应晶体管的散热功效，进而提高鳍式场效应晶体管的性能。

Description

半导体器件、鳍式场效应晶体管及其形成方法
技术领域
本发明涉及半导体形成领域，尤其是涉及一种半导体器件、鳍式场效应晶体管及其形成方法。
背景技术
随着集成电路(简称IC)制造技术的飞速发展，传统集成电路的工艺节点逐渐减小，集成电路器件的尺寸不断缩小，集成电路器件制备工艺不断革新以提高集成电路器件的性能。
如MOS晶体管中，通过高K介质层和金属栅极之间形成具有不同功函数的金属来获得理想的阈值电压，从而改善器件性能。但随着特征尺寸的逐渐减小，传统的平面式MOS晶体管已无法满足对器件性能的需求，如平面式MOS晶体管对沟道电流的控制能力变弱，造成严重的漏电流。为此，多栅器件作为常规器件的替代得到了广泛的关注。
鳍式场效应晶体管(Fin FET)为所述多栅器件的一种。参考图1所示，Fin FET包括：半导体衬底1；位于半导体衬底1上的鳍3；位于半导体衬底1上的氧化硅层2；依次位于氧化硅层2表面且横跨鳍3的栅介质层(未示出)和栅极4；位于鳍3两侧的鳍间侧墙6；位于栅极4两侧的栅极侧墙5；位于栅极4及栅极侧墙5两侧的鳍3内的源/漏极31。
Fin FET的鳍3的顶部以及两侧的侧壁与栅极相接触的部分都成为沟道区，即上述结构使得一个Fin FET同时具有多个栅的功效，从而有利于增大驱动电流，改善器件性能。
然而随着集成电路技术不断发展，器件的尺寸不断减小，密度不断增加，对于集成电路的性能也提出更高的要求。但现有的Fin FET性能无法满足集成电路发展的需要，为此如何提升Fin FET的性能是本领域技术人员亟需解决的问题。
发明内容
本发明解决的问题是在提供一种半导体器件、鳍式场效应晶体管及其形成方法，降低鳍式场效应晶体管的漏电现象，同时提高鳍式场效应晶体管的散热功效，从而提高鳍式场效应晶体管的性能。
为解决上述问题，本发明提供了一种半导体器件的形成方法，包括：
提供半导体衬底；
刻蚀半导体衬底形成凸起于所述半导体衬底表面的鳍部；
形成覆盖所述鳍部侧壁的掩模层；
以所述掩模层为掩模刻蚀半导体衬底形成绝缘层凹槽；
通过氧化工艺氧化所述绝缘层凹槽侧壁，在所述鳍部下方形成氧化硅层；
通过氮掺杂工艺向所述氧化硅层内掺杂氮，形成第一掺氮的氧化硅层；
在所述绝缘层凹槽内填充掺氮的氧化硅，形成第二掺氮的氧化硅层，且所述第二掺氮的氧化硅层和所述第一掺氮的氧化硅层形成绝缘层。
可选地，刻蚀半导体衬底形成绝缘层凹槽的步骤包括：使所述绝缘层凹槽延伸至所述鳍部的下方。
可选地，刻蚀所述半导体衬底形成绝缘层凹槽的步骤包括：
以所述掩模为掩模，进行干法刻蚀工艺，在所述半导体衬底内形成第一凹槽；
以所述掩模为掩模，进行湿法刻蚀工艺，使所述第一凹槽延伸至所述鳍部的下方，形成所述绝缘层凹槽。
可选地，所述干法刻蚀工艺包括：以含有CF4或NF3的气体作为刻蚀气体，刻蚀气体的流量为10～2000sccm，气压为0.01～50mTorr，功率为50～10000w。
可选地，所述湿法刻蚀工艺包括：以稀释的氢氟酸溶液作为湿法刻蚀剂，稀释的氢氟酸溶液中氢氟酸与水的体积比为1:300～1:1000。
可选地，所述氮掺杂工艺的步骤包括：对所述氧化硅层进行氮等离子体气体处理，向所述氧化硅层内掺杂氮原子。
可选地，进行氮等离子体气体处理的步骤包括：将N2、NH3或N2H4通入等离子体气体发生器内形成等离子体气体，N2、NH3或N2H4的流量为20～2000sccm，离子体发生器中气压为0.01～50Torr，功率为50～10000w。
可选地，所述氧化工艺的步骤：以氧气作为反应气体，控制温度为100～1000℃，反应气体流量为20～2000sccm，气压为0.01～50Torr，功率为50～10000w。
可选地，在所述氮掺杂工艺后，向所述绝缘层凹槽内填充掺氮的氧化硅前，所述半导体器件的形成方法还包括：去除所述掩模层。
可选地，所述掩模层为氮化硅，去除所述掩模层的步骤包括：采用湿法刻蚀工艺去除所述掩模层，且所述湿法刻蚀工艺以磷酸为湿法刻蚀剂。
可选地，刻蚀半导体衬底形成凸起于所述半导体衬底表面的鳍部的步骤包括：在所述半导体衬底表面形成多个鳍部；
形成覆盖所述鳍部侧壁的掩模层的步骤包括：所述掩模层露出相邻鳍部之间的半导体衬底表面；
以所述掩模层为掩模刻蚀半导体衬底形成绝缘层凹槽的步骤包括：刻蚀相邻鳍部之间的半导体衬底，以形成多个所述绝缘层凹槽。
可选地，所述绝缘层的厚度为
本发明还提供了一种半导体器件，包括：
半导体衬底；
形成于所述半导体衬底中的绝缘层，所述绝缘层的为掺氮的氧化硅层；
位于所述绝缘层上的鳍部。
可选地，所述绝缘层的厚度为
本发明又提供了一种鳍式场效应晶体管的形成方法，包括：
如上述的半导体器件的形成方法；
在所述半导体衬底上形成栅极结构，所述栅极结构横跨至少一个所述鳍部，并覆盖所述鳍部的侧壁与顶部；
在栅极结构两侧露出的鳍部内掺杂离子，形成源极和漏极
本发明再提供了一种鳍式场效应晶体管，包括：
半导体衬底；
形成于所述半导体衬底中的绝缘层，所述绝缘层为掺氮的氧化硅层；
位于所述绝缘层上的鳍部；
位于所述半导体衬底上形成栅极结构，所述栅极结构横跨至少一个所述鳍部，并覆盖所述鳍部的侧壁与顶部；
位于栅极结构两侧鳍部中的源极和漏极。
可选地，所述绝缘层的厚度为
与现有技术相比，本发明的技术方案具有以下优点：
在本发明鳍式场效应晶体管中，在栅极和鳍部的下方形成绝缘层，从而在使用过程中，抑制源极和漏极的漏电现象，提高鳍式场效应晶体管的性能；此外以掺氮的氧化硅为所述绝缘层材料，可有效提高绝缘层的散热功效，从而提高鳍式场效应晶体管的散热功效，进而提高鳍式场效应晶体管的性能。
在本发明半导体器件的形成方法中，在刻蚀半导体衬底，形成凸起于半导体衬底表面的鳍部后，在鳍部的侧壁上形成露出半导体衬底的掩模层，并以所述掩模层为掩模刻蚀半导体衬底形成绝缘层凹槽；之后通过氧化工艺氧化所述绝缘层凹槽侧壁，在所述鳍部下方形成氧化硅层，再通过氮掺杂工艺向所述氧化硅层内掺杂氮，形成第一掺氮的氧化硅层；再向所述绝缘层凹槽内填充掺氮的氧化硅，形成第二掺氮的氧化硅层，由所述第一掺氮的氧化硅层和第二掺氮的氧化硅层形成绝缘层。采用上述半导体器件的形成方法应用在鳍式场效应晶体管的形成方法中，可保持鳍部和半导体衬底的一体成型的同时，在形成的鳍式场效应晶体管的栅极和沟道区下方形成以掺氮的氧化硅为材料的绝缘层，从而在使用过程中，所述绝缘层可以抑制源极和漏极的漏电现象，而且以掺氮的氧化硅层作为绝缘层，可提高所述绝缘层的散热功效，从而提高鳍式场效应晶体管的散热功效，进而提高鳍式场效应晶体管的性能。
附图说明
图1现有鳍式场效应晶体管的结构示意图；
图2～图11为本发明半导体器件的形成方法一实施例的结构示意图；
图12和13是本发明鳍式场效应晶体管一实施例的结构示意图。
具体实施方式
正如背景技术中所述，现由于的Fin FET在性能无法满足集成电路的发展。分析其原因，现有的Fin FET存在较为严重的短沟道效应，漏电现象严重，从而降低Fin FET的性能；此外，现有的Fin FET的工作中，会在器件内积聚较大的热量(即自加热效应)，器件的散热效应较差也影响了Fin FET的性能。分析上述两个缺陷的成因发现：
Fin FET漏电现象主要是FinFET的栅极对于鳍部下方的载流子控制能力较弱而引起的；
而FinFET器件工作中积聚较大热量，主要是在Fin FET中在半导体衬底上形成氧化硅以作为不同相邻Fin FET器件沟道的隔离结构材料，但氧化硅的散热效应很差，从而导致Fin FET在使用过程中，产生的热量无法及时消散。
为此，本发明提供了一种半导体器件、鳍式场效应晶体管及其形成方法。
在本发明半导体器件的形成方法中，在半导体衬底上形成鳍部后，在鳍部的侧壁上形成掩模层，并以所述掩模层为掩模刻蚀半导体衬底形成绝缘层凹槽；之后通过氧化工艺，氧化所述绝缘层凹槽侧壁，在所述鳍部下方形成氧化硅层，并通过氮掺杂工艺向所述氧化硅层内掺杂氮，形成第一掺氮的氧化硅层；之后再向所述绝缘层凹槽内填充掺氮的氧化硅，形成第二掺氮的氧化硅层，由所述第一掺氮的氧化硅层和第二掺氮的氧化硅层形成绝缘层。
采用上述半导体器件的形成方法应用在鳍式场效应晶体管的形成方法中，可保持鳍部和半导体衬底的一体成型的同时，在形成的鳍式场效应晶体管的栅极和沟道区下方形成以掺氮的氧化硅为材料的绝缘层，抑制源极和漏极漏电。而且以掺氮的氧化硅层作为绝缘层，可提高所述绝缘层的散热功效，从而提高鳍式场效应晶体管的散热功效，进而提高鳍式场效应晶体管的性能。
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图，以鳍式场效应晶体管的形成方法为例，对本发明半导体器件的形成方法的具体实施方式做详细的说明。
图2至图11是本发明一实施例提供的半导体器件的形成方法的示意图。
本实施例半导体器件的形成方法包括：
先参考图2，提供半导体衬底10。
本实施例中的半导体衬底10为硅衬底，但本发明对所述半导体衬底的类型并不做限定。
在所述半导体衬底10内形成有阱区(图中未显示)，所述阱区可以是N阱也可以是P阱，其根据所要形成的Fin FET的类型确定，本发明对此并不做具体限定。
继续参考图2，在所述半导体衬底10上形成第一掩模层11。
本实施例中，所述第一掩模层11的材料为氮化硅，形成工艺包括：先在所述半导体衬底上形成氮化硅材料层，之后在所述氮化硅材料层上形成光刻胶掩模，并以所述光刻胶掩模为掩模刻蚀所述氮化硅材料层，以形成所述第一掩模层11。所述第一掩模层11的形成工艺为现有工艺，在此不再赘述。
但在本发明的其他实施例中，所述第一掩模层11的材料还可以是氮化硅、氧化硅、氮氧化硅、无定形碳中的一种或多种组合。本发明对所述第一掩模层11的材料并不做限定。
参考图3，以所述第一掩模层11为掩模刻蚀所述半导体衬底10，形成凸起于半导体衬底10表面的鳍部12。
本实施例中，可采用干法刻蚀工艺刻蚀所述半导体衬底10以形成所述鳍部12，具体地可采用含有四氟化碳(CF4)或三氟化氮(NF3)等氟基气体作为干法刻蚀气体。刻蚀所述半导体衬底10以形成鳍部12的工艺为现有工艺，在此不再赘述。
本实施例中，在所述半导体衬底10上形成多个鳍部12，且相邻鳍部12之间所形成凹槽的宽度可以相同或是不同。所述鳍部12的结构以及相邻鳍部12之间凹槽结构根据具体情况设定，本发明对此并不做限定。
接着参考图4和图5，在所述半导体衬底10上形成覆盖所述鳍部12侧壁的第二掩模层131，且所述第二掩模层131露出相邻鳍部12之间的所述半导体衬底10。
本实施例中，所述第二掩模层131的材料为氮化硅(SiN)。
形成所述第二掩模层131的具体步骤包括：
先参考图4，在所述半导体衬底10上形成保型覆盖所述鳍部12的氮化硅层13。所述氮化硅层13的形成方法为化学气相沉积(Chemical VaporDeposition，简称CVD)，但本发明对所述氮化硅层13的形成工艺并不做具体限定。
接着参考图5，采用自对准刻蚀工艺刻蚀所述氮化硅层13，以去除相邻鳍部12之间的半导体衬底10上的氮化硅层，露出相邻鳍部12之间的半导体衬底表面，且保留位于所述鳍部12侧壁上的氮化硅层，并以剩余的氮化硅层作为所述第二掩模层131。
采用自对准刻蚀工艺刻蚀所述氮化硅层13的工艺为本领域现有技术，在此不再赘述。
接着结合参考图6和图7，以所述第一掩模层11和第二掩模层131为掩模，刻蚀所述半导体衬底，在所述半导体衬底内形成绝缘层凹槽15，所述绝缘层凹槽15用于形成绝缘层。
可选地，所述绝缘层凹槽15延伸至所述鳍部12下方，以更利于后续在所述鳍部12下方形成绝缘层。
本实施例中，所述绝缘层凹槽15的形成步骤包括：
先参考图6，以所述第一掩模层11和第二掩模层131为掩模，进行干法刻蚀工艺刻蚀所述半导体衬底10，在所述半导体衬底10内，位于相邻鳍部12之间形成第一凹槽14。
可选地，所述干法刻蚀工艺具体包括：
以含有CF4或NF3的气体作为刻蚀气体，刻蚀气体的流量为10～2000sccm，气压为0.01～50mTorr，功率为50～10000w。但本发明对所述干法刻蚀并不做限定。
形成所述第一凹槽14后，结合参考图7，继续以所述第一掩模层11和第二掩模层131为掩模，采用湿法刻蚀工艺继续刻蚀所述半导体衬底10，以拓宽所述第一凹槽14，因为所述湿法刻蚀工艺为各向同性刻蚀，湿法刻蚀工艺中，使得第一凹槽14延伸至所述鳍部12的下方，形成所述绝缘层凹槽15。
可选地，所述湿法刻蚀工艺具体包括：
以稀释的氢氟酸溶液作为湿法刻蚀剂，稀释的氢氟酸溶液中氢氟酸与水的体积比为1:300～1:1000，控制湿法刻蚀剂的温度为0～100℃。
接着参考图8，进行氧化工艺，以氧化所述绝缘层凹槽15侧壁，从而在所述鳍部12下方形成氧化硅层16。
本实施例中，所述氧化工艺具体步骤包括：以氧气作为反应气体，控制温度为100～1000℃，反应气体流量为20～2000sccm，气压为0.01～50Torr，功率为50～10000w。
结合参考图9，再进行氮掺杂工艺，向所述氧化硅层16内掺杂氮，形成第一掺氮的氧化硅层(SiON层)17。
本实施例中，所述氮掺杂工艺的步骤包括：对所述第一掺氮的氧化硅层16进行氮等离子体气体处理，从而向所述氧化硅层16内掺杂氮原子。
本实施例中，所述氮等离子体气体处理的步骤包括：将N2、NH3或N2H4通入等离子体气体发生器内形成等离子体气体，控制N2、NH3或N2H4的流量为20～2000sccm，气压为0.01～50Torr，功率为50～10000w。
在形成所述第一掺氮的氧化硅层17之后，再向所述绝缘层凹槽15内填充掺氮的氧化硅，以形成第二掺氮的氧化硅层。
参考图10，本实施例中，在所述向所述绝缘层凹槽15内填充掺氮的氧化硅前，先去除所述第二掩模层131。
本实施例中，所述第二掩模层131的材料为氮化硅，去除所述第二掩模层131的过程中，会损伤掺氮的氧化硅。为此，在向所述绝缘层凹槽15内填充掺氮的氧化硅前，先去除所述第二掩模，从而减小去除所述第二掩模131过程中，造成半导体衬底10上掺氮的氧化硅材料损伤，以提高后续形成的绝缘层性能。
本实施例中，去除所述第二掩模层131的步骤包括：采用湿法刻蚀工艺去除所述第二掩模层131，且所述湿法刻蚀工艺以磷酸为湿法刻蚀剂。
值得注意的是，在去除所述第二掩模层131过程中，会去除部分或全部的所述第一掩模层11，但在该步骤中，所述第一掩模层11的消耗与否并不影响本发明的目的实现。
结合参考图11，去除所述第二掩模层131后，在所述绝缘层凹槽15内填充掺氮的氧化硅，形成第二掺氮的氧化硅层18；所述第二掺氮的氧化硅层18和所述第一掺氮的氧化硅层17形成所述绝缘层19。所述鳍部12露出于所述绝缘层19。
本实施例中，在所述绝缘层凹槽15内填充掺氮的氧化硅的方法为化学气相沉积(Chemical Vapor Deposition，简称CVD)。
本实施例中，在所述半导体衬底10上形成有多个鳍部12，在所述半导体衬底10内形成有多个绝缘层凹槽15；在进行氧化工艺和氮掺杂工艺后，在所述半导体衬底10内形成有多个并列排列的第一掺氮的氧化硅层17，且在向各绝缘层凹槽15内填充掺氮的氧化硅后，形成多个第二掺氮的氧化硅层18，一个第二掺氮的氧化硅层18连接相邻的两个第一氮化硅层17，使得各第一掺氮的氧化硅层17和第二掺氮的氧化硅层18间隔连接，从而形成所述绝缘层19。
本实施例中，所述绝缘层19的厚度为
在进行上述各步骤后，形成的半导体器件包括：
半导体衬底10，位于所述半导体衬底10表面的绝缘层19，以及位于所述绝缘层19上的鳍部12。而且，所述绝缘层19的材料为掺氮的氧化硅。
所述鳍部12与半导体衬底10一体成型。
可选地，所述绝缘层19的厚度为
在形成所述绝缘层后，本实施例半导体器件的形成方法还包括：在所述半导体衬底10上形成栅极结构，且所述栅极结构横跨至少一个所述鳍部，并覆盖所述鳍部的侧壁与顶部；
之后，再向所述栅极结构两侧露出的鳍部内掺杂离子，以形成源极和漏极，从而形成鳍式场效应晶体管。
上述栅极结构，以及源极和漏极的形成方法为现有技术，在此不再赘述。
本实施例提供的半导体器件的形成方法中，
在刻蚀半导体衬底，形成凸起于半导体衬底表民的鳍部后，在所述鳍部的侧壁上形成掩模层，之后以所述掩模层为掩模刻蚀所述半导体衬底形成绝缘层凹槽；之后通过氧化工艺，氧化所述绝缘层凹槽侧壁，在所述鳍部下方形成氧化硅层，再向所述氧化硅层内掺杂氮，形成第一掺氮的氧化硅层；之后再向所述绝缘层凹槽内填充掺氮的氧化硅，形成第二掺氮的氧化硅层，由所述第一掺氮的氧化硅层和第二掺氮的氧化硅层形成绝缘层。采用上述半导体器件的形成方法应用在鳍式场效应晶体管的形成方法中，可保持鳍部和半导体衬底的一体成型的同时，在形成的鳍式场效应晶体管的栅极和沟道区下方形成以掺氮的氧化硅为材料的绝缘层，从而在使用过程中，所述绝缘层可以抑制器件短沟道效应，减少源极和漏极的漏电流；而且以掺氮的氧化硅层作为绝缘层，可提高所述绝缘层的散热功效，从而提高鳍式场效应晶体管的散热功效，进而提高鳍式场效应晶体管的性能。
相应地，本发明还提供了一种鳍式场效应晶体管。
结合参考图12和图13，图12为本实施例提供的鳍式场效应晶体管的结构示意图，图13为图12中沿A-A’向的剖面结构示意图。
本实施例中，所述鳍式场效应晶体管包括：
半导体衬底20。
位于所述半导体衬底20上的绝缘层21；
位于所述绝缘层21上的鳍部22；
位于所述半导体衬底的栅极结构23，所述栅极结构23横跨至少一个所述鳍部22，并覆盖所述鳍部22的侧壁与顶部；
位于栅极结构23两侧鳍部22中的源极和漏极221。
可选地，所述绝缘层21为掺氮的氧化硅层，可选地，所述掺氮的氧化硅层的厚度为
所述鳍部22内，位于所述源极和漏极221之间，且被所述栅极结构23所覆盖的部分鳍部形成鳍式场效应晶体管的沟道。
与现有的鳍式场效应晶体管的结构相比，在本发明鳍式场效应晶体管中，在栅极和鳍部的下方形成有以掺氮的氧化硅为材料的绝缘层，从而在使用过程中，所述绝缘层可抑制器件短沟道效应，减少源极和漏极的漏电流，提高鳍式场效应晶体管的性能。
此外，以掺氮的氧化硅作为所述绝缘层21的材料，可有效提高绝缘层21的散热功效，从而提高鳍式场效应晶体管的散热功效，进而提高鳍式场效应晶体管的性能。
本发明虽然已以较佳实施例公开如上，但其并不是用来限定本发明，任何本领域技术人员在不脱离本发明的精神和范围内，都可以利用上述揭示的方法和技术内容对本发明技术方案做出可能的变动和修改，因此，凡是未脱离本发明技术方案的内容，依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化及修饰，均属于本发明技术方案的保护范围。

Claims (17)

1.一种半导体器件的形成方法，其特征在于，包括：
提供半导体衬底；
刻蚀半导体衬底形成凸起于所述半导体衬底表面的鳍部；
形成覆盖所述鳍部侧壁的掩模层；
以所述掩模层为掩模刻蚀半导体衬底形成绝缘层凹槽；
通过氧化工艺氧化所述绝缘层凹槽侧壁，在所述鳍部下方形成氧化硅层；
通过氮掺杂工艺向所述氧化硅层内掺杂氮，形成第一掺氮的氧化硅层；
在所述绝缘层凹槽内填充掺氮的氧化硅，形成第二掺氮的氧化硅层，且所述第二掺氮的氧化硅层和所述第一掺氮的氧化硅层形成绝缘层。
2.如权利要求1所述的半导体器件的形成方法，其特征在于，刻蚀半导体衬底形成绝缘层凹槽的步骤包括：使所述绝缘层凹槽延伸至所述鳍部的下方。
3.如权利要求2所述的半导体器件的形成方法，其特征在于，刻蚀所述半导体衬底形成绝缘层凹槽的步骤包括：
以所述掩模为掩模，进行干法刻蚀工艺，在所述半导体衬底内形成第一凹槽；
以所述掩模为掩模，进行湿法刻蚀工艺，使所述第一凹槽延伸至所述鳍部的下方，形成所述绝缘层凹槽。
4.如权利要求3所述的半导体器件的形成方法，其特征在于，所述干法刻蚀工艺包括：以含有CF4或NF3的气体作为刻蚀气体，刻蚀气体的流量为10～2000sccm，气压为0.01～50mTorr，功率为50～10000w。
5.如权利要求3所述的半导体器件的形成方法，其特征在于，所述湿法刻蚀工艺包括：以稀释的氢氟酸溶液作为湿法刻蚀剂，稀释的氢氟酸溶液中氢氟酸与水的体积比为1:300～1:1000。
6.如权利要求1所述的半导体器件的形成方法，其特征在于，所述氮掺杂工艺的步骤包括：对所述氧化硅层进行氮等离子体气体处理，向所述氧化硅层内掺杂氮原子。
7.如权利要求6所述的半导体器件的形成方法，其特征在于，进行氮等离子体气体处理的步骤包括：将N2、NH3或N2H4通入等离子体气体发生器内形成等离子体气体，N2、NH3或N2H4的流量为20～2000sccm，离子体发生器中气压为0.01～50Torr，功率为50～10000w。
8.如权利要求1所述的半导体器件的形成方法，其特征在于，所述氧化工艺的步骤：以氧气作为反应气体，控制温度为100～1000℃，反应气体流量为20～2000sccm，气压为0.01～50Torr，功率为50～10000w。
9.如权利要求1所述的半导体器件的形成方法，其特征在于，在所述氮掺杂工艺后，向所述绝缘层凹槽内填充掺氮的氧化硅前，所述半导体器件的形成方法还包括：去除所述掩模层。
10.如权利要求9所述的半导体器件的形成方法，其特征在于，
所述掩模层为氮化硅，去除所述掩模层的步骤包括：采用湿法刻蚀工艺去除所述掩模层，且所述湿法刻蚀工艺以磷酸为湿法刻蚀剂。
11.如权利要求1所述的半导体器件的形成方法，其特征在于，刻蚀半导体衬底形成凸起于所述半导体衬底表面的鳍部的步骤包括：在所述半导体衬底表面形成多个鳍部；
形成覆盖所述鳍部侧壁的掩模层的步骤包括：所述掩模层露出相邻鳍部之间的半导体衬底表面；
以所述掩模层为掩模刻蚀半导体衬底形成绝缘层凹槽的步骤包括：刻蚀相邻鳍部之间的半导体衬底，以形成多个所述绝缘层凹槽。
12.如权利要求1所述的半导体器件的形成方法，其特征在于，所述绝缘层的厚度为
13.一种半导体器件，其特征在于，包括：
半导体衬底；
形成于所述半导体衬底中的绝缘层，所述绝缘层的为掺氮的氧化硅层；
位于所述绝缘层上的鳍部。
14.如权利要求13所述的半导体器件，其特征在于，所述绝缘层的厚度为
15.一种鳍式场效应晶体管的形成方法，其特征在于，包括：
如权利要求1～12中任一项权利要求所述的半导体器件的形成方法；
在所述半导体衬底上形成栅极结构，所述栅极结构横跨至少一个所述鳍部，并覆盖所述鳍部的侧壁与顶部；
在栅极结构两侧露出的鳍部内掺杂离子，形成源极和漏极
16.一种鳍式场效应晶体管，其特征在于，包括：
半导体衬底；
形成于所述半导体衬底中的绝缘层，所述绝缘层为掺氮的氧化硅层；
位于所述绝缘层上的鳍部；
位于所述半导体衬底上形成栅极结构，所述栅极结构横跨至少一个所述鳍部，并覆盖所述鳍部的侧壁与顶部；
位于栅极结构两侧鳍部中的源极和漏极。
17.如权利要求16所述的鳍式场效应晶体管，其特征在于，所述绝缘层的厚度为
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