CN106098573B - 半导体装置的制造方法 - Google Patents
半导体装置的制造方法 Download PDFInfo
- Publication number
- CN106098573B CN106098573B CN201610283784.2A CN201610283784A CN106098573B CN 106098573 B CN106098573 B CN 106098573B CN 201610283784 A CN201610283784 A CN 201610283784A CN 106098573 B CN106098573 B CN 106098573B
- Authority
- CN
- China
- Prior art keywords
- grafting material
- semiconductor element
- semiconductor device
- manufacturing
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 150
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 33
- 239000000463 material Substances 0.000 claims abstract description 221
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 238000000034 method Methods 0.000 claims abstract description 46
- 230000004523 agglutinating effect Effects 0.000 claims abstract description 33
- 229910052802 copper Inorganic materials 0.000 claims abstract description 14
- 239000002245 particle Substances 0.000 claims abstract description 9
- 229910052709 silver Inorganic materials 0.000 claims abstract description 8
- 238000010521 absorption reaction Methods 0.000 claims description 18
- 238000010008 shearing Methods 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 5
- 239000010949 copper Substances 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 14
- 239000002184 metal Substances 0.000 description 14
- 238000010438 heat treatment Methods 0.000 description 10
- 238000005245 sintering Methods 0.000 description 10
- 238000007650 screen-printing Methods 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 238000009833 condensation Methods 0.000 description 4
- 230000005494 condensation Effects 0.000 description 4
- 239000013528 metallic particle Substances 0.000 description 4
- 239000002904 solvent Substances 0.000 description 4
- 229910000881 Cu alloy Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229920001707 polybutylene terephthalate Polymers 0.000 description 3
- 238000001179 sorption measurement Methods 0.000 description 3
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 239000010944 silver (metal) Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910007882 ZrAl2 Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 239000013590 bulk material Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 208000002173 dizziness Diseases 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 1
- -1 polybutylene terephthalate Polymers 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000003381 stabilizer Substances 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L21/603—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of pressure, e.g. thermo-compression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/271—Manufacture and pre-treatment of the layer connector preform
- H01L2224/2711—Shaping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2733—Manufacturing methods by local deposition of the material of the layer connector in solid form
- H01L2224/27334—Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/275—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/27505—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/278—Post-treatment of the layer connector
- H01L2224/27848—Thermal treatments, e.g. annealing, controlled cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29012—Shape in top view
- H01L2224/29013—Shape in top view being rectangular or square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2902—Disposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29347—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/2954—Coating
- H01L2224/2957—Single coating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/2954—Coating
- H01L2224/29599—Material
- H01L2224/2969—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32052—Shape in top view
- H01L2224/32054—Shape in top view being rectangular or square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/325—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48175—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L2224/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/822—Applying energy for connecting
- H01L2224/82201—Compression bonding
- H01L2224/82203—Thermocompression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/83447—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Die Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
本发明的目的在于提供一种半导体装置的制造方法,该方法抑制烧结性的接合材料的材料成本的增大,且进行高品质的接合。本发明涉及的半导体装置的制造方法具有下述工序:工序(a),在基板(绝缘基板(3))之上配置片状的烧结性的接合材料(2a);工序(b),在工序(a)之后,在接合材料(2a)之上配置半导体元件(1);以及工序(c),一边在基板与半导体元件(1)之间对所述接合材料(2a)施加压力、一边对所述接合材料(2a)进行烧结,接合材料(2a)含有Ag或Cu的微粒,微粒被有机膜包裹。
Description
技术领域
本发明涉及一种半导体装置的制造方法,特别涉及半导体装置内的基板与半导体元件的接合方法。
背景技术
近年,由于环境管制的提高,顾及到环境问题的高效率、节能的半导体装置的需求正在提高。半导体装置被用于工业设备、具有电动机的家电的驱动控制设备、面向电动汽车、混合动力车辆的车载控制设备、铁路控制设备、太阳能发电的控制设备等,要求半导体装置具有应对高功率的能力。
特别是对于车载控制设备、铁路控制设备,从节能的观点、抑制电能的变换损耗的观点出发,半导体装置是在高负载环境下(高温度环境下)进行使用的。即,即使在高温度环境下也要求高效率、低损耗地进行工作。具体地说,到目前为止的通常的工作温度(结温)为125℃至150℃,但今后要求在175℃至200℃或者更高的高温环境下工作。
因此,在上述高温环境下,为了抑制通断损耗,实现低损耗化、高温状态下的高效率化,需要重新考虑半导体模块的材料、构造。特别是半导体装置内的配线连接部(接合部)最容易劣化,实现配线连接部的高品质、高可靠性、高寿命化是一个大的课题。另外,需要实现昂贵的烧结性材料的成本削减。
专利文献1:日本特开2009-004666号公报
然而,近年来,虽然烧结接合材料的开发取得了进展,但在产品应用方面,难以抑制成本、保持接合品质及可靠性。
当前,烧结接合材料为膏状,通过注射器或者使用掩模进行的丝网印刷进行涂敷。因此,接合材料的厚度不均匀,存在接合材料表面出现凹凸的问题。
另外,烧结性的接合材料是比焊料材料昂贵的材料。例如,在通过丝网印刷配置接合材料时,存在接合材料的一部分会被浪费的问题。
另外,如果接合材料在与半导体元件的接合面探出,则在将接合材料进行烧结时,由于一部分接合材料未被加压,因此在烧结后,未被加压的烧结材料可能会脱落。
另外,当前的做法为,配置膏状的接合材料,在使其干燥之后,在其之上配置半导体元件。因此,在配置半导体元件时,有时半导体元件会受到损伤,或者在后面的工序中半导体元件的位置发生偏移。
发明内容
本发明就是为了解决上述这样的课题而提出的,其目的在于提供一种半导体装置的制造方法,该方法能够抑制烧结性的接合材料的材料成本的增大,且进行高品质的接合。
本发明涉及的半导体装置的制造方法具有下述工序:工序(a),在基板之上配置片状的烧结性的接合材料;工序(b),在工序(a)之后,在接合材料之上配置半导体元件;以及工序(c),一边在基板与半导体元件之间对接合材料施加压力、一边对接合材料进行烧结,接合材料含有Ag或Cu的微粒,该微粒被有机膜包裹。
发明的效果
在本发明中,接合材料是具有烧结性的接合材料,接合材料含有Ag或Cu的微粒,微粒被有机膜包裹。因此,能够将接合材料应用于适合高温工作的半导体装置的接合。由此,能够确保半导体装置的高品质及高可靠性。
另外,在本发明中,由于片状的接合材料为半干的状态,因此对于半导体元件表现得较为柔和,并且由于溶剂未充分地挥发,因此还具有粘性。由此,在将半导体元件配置在接合材料之上时,半导体元件与接合材料充分粘合而得到固定、保持。因此,在接合材料的烧结工序(加热加压工序)中,半导体元件的位置偏移、对半导体元件的损伤等受到抑制。
由于在本发明中使用片状的接合材料,因此接合材料表面的凹凸受到抑制。特别地,通过使用片状的接合材料,解决作为丝网印刷的课题的狗耳缺陷(dog ear)(表面的凸部)。因此,接合部的接合品质提高。
在本发明中,由于使用片状的接合材料,因此如果从大张的片状的接合材料以所需的量剪切出接合材料而进行使用,则不会浪费接合材料,能够实现制造成本的削减。
附图说明
图1是实施方式1涉及的半导体装置的剖视图。
图2是表示实施方式1涉及的半导体装置的制造方法的流程图。
图3是对片状的接合材料的剪切进行说明的图。
图4是对接合材料向绝缘基板的配置进行说明的图。
图5是对半导体元件向接合材料的配置进行说明的图。
图6是表示吸附夹头的变形例的图。
图7是实施方式2涉及的半导体装置的剖视图。
标号的说明
1半导体元件,2a、2b接合材料,3绝缘基板,4散热板,5导线,6壳体,7电极,8封装材料,9粘合剂,10导电性基板,11金属绝缘层。
具体实施方式
<实施方式1>
<结构>
图1是本实施方式1中的半导元件装置的剖视图。本实施方式中的半导体装置是在高温环境下使用、能够进行高温工作的半导元件装置。在这里,高温是指例如175℃至200℃或者更高。
本实施方式1中的半导体装置具有:绝缘基板3,其是绝缘性的基板;半导体元件1,其与绝缘基板3接合;以及烧结性的接合材料2a,其将绝缘基板3与半导体元件1接合。在绝缘基板3的表面形成有电路图案。电路图案与半导体元件1的背面电极通过烧结性的接合材料2a接合。
绝缘基板3的与半导体元件1相反侧的面,经由接合材料2b与散热板4接合。在这里,接合材料2b为烧结性的接合材料或者耐高温的焊料材料。
散热板4与壳体6通过粘合剂9粘合。壳体6成为半导体装置的外轮廓。即,壳体6将绝缘基板3、半导体元件1、导线5的周围包围。由树脂构成的壳体6与电极7一体成型。半导体元件1的上表面电极与电极7由导线5连接。另外,虽未在图1中示出,但在壳体6内部,有时配置对驱动电路、保护电路进行搭载的控制基板。
并且,通过在壳体6内部注入封装材料8,从而将绝缘基板3、半导体元件1以及导线5封装。
下面,详细叙述各结构要素。此外,以下所述的各结构要素的尺寸是一个例子,本发明不限定于记载的尺寸。
散热板4例如一边的长度为30mm至300mm,厚度为3mm至5mm。散热板4是由Cu、Al或者Al-SiC复合体构成的热容量大的散热板。将散热板4与绝缘基板3接合的接合材料2b为大致20至100μm的厚度的烧结性的接合材料、或者大致100至300μm的厚度的焊接材料。
绝缘基板3的厚度为0.2mm至3mm。另外,绝缘基板3的厚度均匀。绝缘基板3的材质为Si3N4、AlN、Al2O3或者ZrAl2O3。
半导体元件1例如是功率用半导体元件,是IGBT、MOSFET、二极管等对大功率进行处理的半导体元件。半导体元件1例如形成了用于应对AC输出的3相电路。此外,半导体元件1不限于Si制的IGBT、MOSFET、二极管,也可以为SiC或者GaN制。例如,在半导体元件1为IGBT的情况下,在半导体元件1的底面配备的背面电极为集电极电极,在半导体元件1的表面配备的上表面电极为发射极电极和栅极电极。
在半导体元件1形成3相电路的情况下,针对各相,将半导体元件1(例如二极管、IGBT、MOSFET等)通过铝制的导线5等与绝缘基板3之上的电路图案进行导线键合,在电子设备内对半导体元件1进行了配线连接。
半导体元件1(例如IGBT)的上表面电极(发射极电极)通过导线5与相邻的半导体元件1(例如二极管)的电极连接。另外,电极7的一部分与壳体6外部的马达等电动机、电池、线束连接。
壳体6由PPS(聚苯硫醚)、PBT(聚对苯二甲酸丁二醇酯)、环氧树脂等树脂构成。电极7是与外部进行输入输出的AC输出端子、输入输出端子以及进行控制的信号端子,由厚度1mm左右的铜或者铜合金构成。电极7与壳体6一体成型。
虽未在图1中示出,但在将控制基板搭载于壳体6内部的情况下,电极7的一部分与搭载有驱动电路、保护电路的控制基板连接。向电极7输入用于进行通断的控制信号。控制基板由电极7支撑,在绝缘基板3的上方以与绝缘基板3几乎平行的状态配置。
封装材料8是以Si为基础的绝缘性的凝胶材料或者环氧树脂。此外,在封装材料8采用凝胶材料的情况下,壳体6的开口经由粘合剂由盖(未图示)进行封堵。
接合材料2a的面积与半导体元件1的用于进行接合的面即接合面相同。此外,在本实施方式1中,半导体元件1的用于进行接合的面即接合面是指半导体元件1的底面。具体地说,例如,半导体元件1的底面的一边为4mm至18mm,接合材料2a的各边的长度与半导体元件1相等。
如图3所示,接合材料2a为片状。接合材料2a的厚度在40μm至200μm的范围内。接合材料2a的厚度均匀。如图1所示,接合材料2a不像现有的膏状的接合材料的情况那样,存在从与半导体元件1的接合面探出的部分。因此,不存在探出的接合材料的一部分脱落而在壳体6内部形成短路的可能性。
在半导体元件1与绝缘基板3的接合部,烧结后的接合材料2a的厚度为20μm至100μm左右。在焊接的情况下,为了确保接合部的可靠性,焊料的厚度需要大于或等于1000μm。另一方面,在采用烧结性的接合材料2a的情况下,即使厚度小于或等于100μm也不会对可靠性造成影响。另外,由于导热率比焊料优异,因此散热性也优越(100至250W/m·K)。
接合材料2a为片状,含有纳米尺寸的微小金属颗粒、溶剂以及表面稳定剂。微小金属颗粒为直径大于或等于1nm的Ag、Cu、Au、Pd、Pt等。微小金属颗粒的表面由有机保护膜覆盖。通过将接合材料2a设为纳米或者微米尺寸的微小金属颗粒,从而引起熔点降低,能够在比接合材料固有的熔融温度低的温度进行烧结接合。在接合后,高熔点化至与块状材料同等的程度,获得高耐热性和可靠性。
在接合材料2a所含有的微小金属颗粒为Ag的情况下,一边以180℃至350℃进行加热,一边在半导体元件1与绝缘基板3之间对接合材料2a进行加压。在接合后,接合材料2a获得900℃左右的耐热性。因此,能够将接合材料2a应用于进行高温工作的半导体装置。
<制造方法>
图2是表示本实施方式1的半导体装置的制造方法的流程图。首先,如图3所示,从大张的片状的烧结性接合材料2,剪切出接合材料2a(步骤S101)。在这里,要剪切出的接合材料2a的面积与半导体元件1的用于进行接合的面(底面)的面积相等。接合材料2a的剪切是使用图4所示的吸附夹头20进行的。在这里,吸附夹头20的底面(吸附面)的面积设为与要剪切出的接合材料2a的面积相等。首先,将加热后的吸附夹头20向片状的烧结性接合材料2进行按压。由于片状的烧结性接合材料2具有粘(tack)性,因此所按压的区域的烧结性接合材料2转印至吸附夹头20的吸附面。然后,如果升起吸附夹头20,则已转印至吸附夹头20的烧结性接合材料2(即接合材料2a)从片状的烧结性接合材料2分离。在利用吸附夹头20剪切出接合材料2a之后,直接利用吸附夹头20吸附接合材料2a而进行输送(步骤S102)。然后,如图4所示,在绝缘基板3之上配置接合材料2a(步骤S103)。虽未在图4中示出,但在绝缘基板3之上形成有电路图案,在该电路图案之上配置接合材料2a。
然后,在接合材料2a之上配置半导体元件1(步骤S104)。图5(a)、图5(b)是在接合材料2a之上配置的半导体元件1的剖视图和俯视图。半导体元件1配置为在俯视观察时与接合材料2a重合。由于半导体元件1与接合材料2a面积相同,因此在接合面处接合材料2a没有探出。由于接合材料2a具有粘性,因此通过在接合材料2a之上配置半导体元件1,从而半导体元件1与接合材料2a密接。
然后,进行接合材料2a的烧结(步骤S105)。在已安装(搭载)的半导体元件1的接合面与绝缘基板3之间一边对接合材料2a加压、一边进行接合材料2a的烧结。加压及加热的处理由加热加压装置进行。加热温度为180℃至350℃的范围,加压压力为5MPa至30MPa的范围,通过将该状态保持10至180秒而进行接合。通过该加压及加热处理,绝缘基板3和半导体元件1经由接合材料2a接合。此外,在由加热加压装置进行加热及加压处理的工序中,也可以将多个绝缘基板3一起处理。
然后,进行绝缘基板3下表面与散热板4的接合(步骤S106)。接合是利用具有耐高温性的焊料、或者与接合材料2a相同材质的接合材料进行的。此外,在利用烧结性的接合材料进行绝缘基板3下表面与散热板4的接合的情况下,也可以在将半导体元件1与绝缘基板3接合时,预先将绝缘基板3隔着烧结性的接合材料安装在散热板4之上,利用加热加压设备同时地进行接合。即,也可以将步骤S105和S106同时进行。
然后,将壳体6固定于散热板4(步骤S107)。固定例如是利用粘合剂9进行的。然后,将半导体元件1的上表面电极之间、或者半导体元件1的上表面电极与电极7之间利用导线连接(步骤S108)。导线例如由Al、Cu等导电性材料构成。导线的连接是通过导线键合进行的。
最后,利用封装材料8填充壳体6内部(步骤S109)。即,利用封装材料8,将绝缘基板3、半导体元件1、导线5封装,此外,根据需要还将控制基板(未图示)进行封装。经过以上的工序,制造本实施方式1中的半导体装置。
此外,在本实施方式1中,利用片状的烧结性接合材料2的粘性进行了接合材料2a的剪切,但也可以使用冲裁模进行接合材料2a的剪切。图6是表示图4的吸附夹头20的变形例即吸附夹头20A的图。如图6所示,在吸附夹头20A的吸附面设置有冲裁模。通过将吸附夹头20A的冲裁模部分按压于片状的烧结性接合材料2,由此从片状的烧结性接合材料2剪切出与被冲裁模包围的区域相当的烧结性接合材料2(即接合材料2a)。
<效果>
本实施方式1中的半导体装置的制造方法具有下述工序:工序(a),在基板(绝缘基板3)之上配置片状的烧结性的接合材料2a;工序(b),在工序(a)之后,在接合材料2a之上配置半导体元件1;以及工序(c),一边在基板与半导体元件1之间对所述接合材料2a施加压力、一边对所述接合材料2a进行烧结,接合材料2a含有Ag或Cu的微粒,微粒被有机膜包裹。
在本实施方式1中,接合材料2a是具有烧结性的接合材料,接合材料2a含有Ag或Cu的微粒,微粒被有机膜包裹。因此,能够将接合材料2a应用于适合高温工作的半导体装置的接合。由此,能够确保半导体装置的高品质及高可靠性。
另外,在本实施方式1中,由于片状的接合材料2a为半干的状态,因此对于半导体元件1表现得较为柔和,并且由于溶剂未充分地挥发,因此还具有粘性。由此,在将半导体元件1配置在接合材料2之上时,半导体元件1与接合材料2a充分粘合而得到固定、保持。因此,在接合材料2a的烧结工序(加热加压工序)中,半导体元件1的位置偏移、对半导体元件1的损伤等受到抑制。
当前,将膏状的接合材料通过注射器或者使用掩模进行的丝网印刷涂敷于基板。因此,难以将接合材料以均匀的厚度进行配置。由于本实施方式1使用具有均匀厚度的片状的接合材料,因此接合材料表面的凹凸受到抑制。特别地,通过使用片状的接合材料,从而解决作为丝网印刷的课题的狗耳缺陷(表面的凸部)。由此,在本实施方式1中,与使用膏状的接合材料的情况相比较,接合部的接合品质提高。另外,对于接合材料2a,多孔区域的产生受到抑制,因此接合可靠性提高。
另外,当前,在使用作为比焊料材料昂贵的材料的膏状接合材料进行丝网印刷时,为了确保稳定的印刷厚度而向掩模之上投入超过所需的接合材料,过量的接合材料造成浪费。另外,残存于刮板的接合材料也造成浪费。在本实施方式1中,从大张的片状的接合材料2以所需的量剪切出接合材料2a而进行使用。由此,不会浪费接合材料,能够实现制造成本的削减。另外,在本实施方式1中,与使用膏状的接合材料的情况相比较,无需接合材料的印刷、干燥工序,能够削减对生产设备的投资、生产成本。
另外,在本实施方式1的半导体装置的制造方法中,片状的烧结性的接合材料2a的厚度均匀。
因此,在本实施方式1中,与使用膏状的接合材料的情况相比较,接合材料表面的凹凸受到抑制。特别地,通过使用片状的接合材料,从而解决作为丝网印刷的课题的狗耳缺陷(表面的凸部)。由此,接合部的接合品质提高。另外,对于接合材料2a,多孔区域的产生受到抑制,因此接合可靠性提高。
另外,在本实施方式1的半导体装置的制造方法中,基板是由SiN或者AlN构成的绝缘基板3,在绝缘基板3的半导体元件1侧的表面形成有含有Cu的电路图案。因此,能够获得具有高导热性及高绝缘强度的绝缘基板。
另外,本实施方式1中的半导体装置的制造方法还具有在工序(a)之前,从片状的烧结性的接合材料2,剪切出与半导体元件1的用于进行接合的面相同大小的接合材料2a的工序(d),在工序(a)中,将在工序(d)剪切出的接合材料2a配置在基板(绝缘基板3)之上。
在以现有方式将膏状的接合材料印刷而进行配置的情况下,即使采用通过丝网印刷或者注射器进行的涂敷方法,也会由于发生印刷渗晕,因此涂敷面积比半导体元件的面积大。由于从接合面探出的接合材料未被加压,因此在烧结后的制造工序(导线键合、散热板的接合、壳体的固定、封装材料的注入等)中接合材料的一部分可能会脱落而发生电气异常。在本实施方式1中,从大张的片状的接合材料2,剪切出与半导体元件1的底面相同大小的接合材料2a而用于接合。由此,由于接合材料2a的所有的部分受到加压,因此能够抑制在烧结后接合材料2a的一部分脱落这一情况。
另外,本实施方式1中的半导体装置的制造方法为,在工序(d)中使用吸附夹头20进行接合材料2a的剪切,在工序(a)中使用吸附夹头20进行剪切出的接合材料2a的输送及配置,在工序(d)中由吸附夹头剪切出的接合材料2a的面积与半导体元件1的用于进行接合的面的面积相等。
因此,由于使用吸附夹头20进行接合材料2a的剪切、输送、配置这一系列的工序,因此能够提高生产效率。
另外,在本实施方式1的半导体装置的制造方法中,接合材料2a具有缓冲(cushion)性及粘性。
在本实施方式1中,由于片状的接合材料2a为半干的状态,因此对于半导体元件1表现得较为柔和,并且由于溶剂未充分地挥发,因此还具有粘性。由此,在将半导体元件1配置在接合材料2之上时,半导体元件1与接合材料2a充分粘合而得到固定、保持。因此,在接合材料2a的烧结工序(加热加压工序)中,半导体元件1的位置偏移、对半导体元件1的损伤等受到抑制。
<实施方式2>
<结构>
图7是本实施方式2中的半导体装置的剖视图。本实施方式2中的半导体装置与实施方式1相同地,是在高温环境下使用、能够进行高温工作的半导元件装置。
本实施方式2中的半导体装置具有:导电性基板10;半导体元件1,其与导电性基板10接合;以及烧结性的接合材料2a,其将导电性基板10与半导体元件1接合。此外,导电性基板10是金属板。本实施方式2中的接合材料2a是与实施方式1相同的接合材料。
导电性基板10的背面(即,与接合于半导体元件1的面相反侧的面)固接于具有绝缘箔的金属绝缘层11。
如图7所示,在导电性基板10的一端设置有电极7。另外,另一个电极7通过导线5与半导体元件1的上表面电极连接。
导电性基板10、半导体元件1、接合材料2a、金属绝缘层11、导线5被以环氧树脂为主成分的封装材料8封装。此外,金属绝缘层11的底面及电极7的一部分露出至封装材料8的外部。电极7与马达等电动机、电池、线束等连接。下面,详细叙述各结构要素。
在本实施方式2的半导体装置中,在导电性基板10作为半导体元件1例如成对地接合有IGBT和二极管。作为半导体元件1的IGBT,具有集电极电极作为背面电极,具有栅极电极及发射极电极作为上表面电极。IGBT通过电极7进行来自外部的输入(接通/断开控制)及外部控制。此外,半导体元件1不限定于IGBT,也可以使用MOSFET、晶体管等。并且,不限于以Si为材料,也可以为例如以SiC或者GaN为材料的MOSFET、二极管等。此外,在半导体元件1的上表面电极及背面电极,实施了Ti-Ni-Au或者Ag这样的金属化。
半导体元件1的背面电极(例如集电极电极)与导电性基板10通过接合材料2a接合。关于导电性基板10,其导热率大,约为400W/(m·K),且电阻率小,约为2μΩ·cm,是铜或者铜合金这样的金属板。导电性基板10的厚度为3mm至5mm左右,具有作为散热板的功能。
导电性基板10的一端延伸至封装材料8的外部,成为电极7。固接于导电性基板10背面的金属绝缘层11具有绝缘层和保护金属层的层叠构造。绝缘层使用混入有氮化硼、氧化铝等填料的环氧树脂。在该绝缘层固接有由导热性高的铜、铝等构成的保护金属层。另外,虽未在图7中示出,但将散热板、具有多个鳍片的散热器、水冷鳍片等与金属绝缘层11连接。
由半导体元件1的工作所产生的热量在接合材料2a、导电性基板10、金属绝缘层11进行传递,并且,经由与金属绝缘层11连接的例如散热板(未图示)散热至外部。由此抑制半导体元件1的温度上升。
作为IGBT的半导体元件1的上表面电极(栅极电极)通过导线5与电极7连接。另外,半导体元件1的另一个上表面电极(发射极电极)经由导线5与作为相邻配置的二极管的半导体元件1的上表面电极连接。半导体元件1的背面电极(集电极电极)经由导电性基板10及电极7与外部端子电连接。
电极7是将由铜或者铜合金构成的厚度为0.5mm至2mm左右的平板通过模具成型而弯折形成的。通常,从半导体元件1的表面向外部电极的配线连接,是使用以Al或Cu为主成分的金属质的导线5,通过导线键合而进行固相接合。本实施方式2中的半导体装置设想为对大电流进行通断控制、流过大电流作为工作电流。因此,并联地配置多个导线5,采用直径约为200至500μm的粗金属线。
接合材料2a的面积与半导体元件1的用于进行接合的面即接合面相同。此外,在本实施方式2中,半导体元件1的用于进行接合的面即接合面是指半导体元件1的底面。具体地说,例如,半导体元件1的底面的一边为4mm至18mm,接合材料2a的各边的长度与半导体元件1相等。
<制造方法>
本实施方式2中的半导体装置的制造方法与实施方式1共通的工序多,因此按照实施方式1所用的图2的流程图进行说明。
首先,与实施方式1相同地,从大张的片状的烧结性接合材料2,剪切出接合材料2a(与图2的步骤S101相对应)。在这里,要剪切出的接合材料2a的面积与半导体元件1的用于进行接合的面(底面)的面积相等。接合材料2a的剪切是使用夹头20进行的。在利用夹头20剪切出接合材料2a之后,直接利用夹头20吸附接合材料2a进行输送,配置在导电性基板10之上(与图2的步骤S102、S103相对应)。此外,在实施方式1中基板为绝缘基板3,但在本实施方式2中为导电性基板10。然后,在接合材料2a之上配置半导体元件1(与图2的步骤S104相对应)。
然后,进行接合材料2a的烧结(与图2的步骤S105相对应)。烧结的温度、压力等与实施方式1相同。然后,将半导体元件1的上表面电极之间、或者半导体元件1的上表面电极与电极7之间利用导线连接(与图2的步骤S108相对应)。
最后,利用以环氧树脂为主成分的封装材料8进行导电性基板10、半导体元件1、接合材料2a以及导线5的封装(与图2的步骤S109相对应)。此外,在实施方式1中利用封装材料8填充了壳体6内部,但本实施方式2的半导体装置不具有壳体6,利用例如传递模塑法进行封装。在利用传递模塑法进行封装时,金属绝缘层11密接于导电性基板10的底面。由此,由于半导体装置内的接合部被封装材料8固定,因此进一步获得高品质、高可靠性的接合部。
<效果>
在本实施方式2的半导体装置的制造方法中,基板是含有Cu的导电性基板10。由于能够利用接合材料2a去除基板表面的氧化膜,因此即使针对Cu也能够进行接合,能够获得高品质、高可靠性的接合。
此外,本发明可以在其发明的范围内,将各实施方式自由地进行组合,或对各实施方式进行适当的变形、省略。
Claims (7)
1.一种半导体装置的制造方法,其具有下述工序:
工序(a),在基板之上配置利用吸附夹头从片状的烧结性的接合材料剪切出的片状的接合材料;
工序(b),在所述工序(a)之后,在所述接合材料之上配置半导体元件;以及
工序(c),一边在所述基板与所述半导体元件之间对所述接合材料施加压力、一边对所述接合材料进行烧结,
所述接合材料含有Ag或Cu的微粒,该微粒被有机膜包裹,
在所述工序(a)中使用所述吸附夹头进行剪切出的所述接合材料的输送及配置。
2.根据权利要求1所述的半导体装置的制造方法,其中,
所述片状的烧结性的接合材料的厚度均匀。
3.根据权利要求1所述的半导体装置的制造方法,其中,
所述基板是由SiN或者AlN构成的绝缘基板,
在所述绝缘基板的所述半导体元件侧的表面形成有含有Cu的电路图案。
4.根据权利要求1所述的半导体装置的制造方法,其中,
所述基板是含有Cu的导电性基板。
5.根据权利要求1至4中任一项所述的半导体装置的制造方法,其中,
还具有:工序(d),在所述工序(a)之前,从片状的烧结性的接合材料,剪切出与所述半导体元件的用于进行接合的面相同大小的所述接合材料,
在所述工序(a)中,将在所述工序(d)剪切出的所述接合材料配置在所述基板之上。
6.根据权利要求5所述的半导体装置的制造方法,其中,
在所述工序(d)中使用所述吸附夹头进行所述接合材料的剪切,
在所述工序(d)中由所述吸附夹头剪切出的所述接合材料的面积,与所述半导体元件的用于进行接合的面的面积相等。
7.根据权利要求1所述的半导体装置的制造方法,其中,
所述接合材料具有缓冲性及粘性。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015-092616 | 2015-04-30 | ||
JP2015092616A JP6415381B2 (ja) | 2015-04-30 | 2015-04-30 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106098573A CN106098573A (zh) | 2016-11-09 |
CN106098573B true CN106098573B (zh) | 2019-05-17 |
Family
ID=57136012
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610283784.2A Active CN106098573B (zh) | 2015-04-30 | 2016-04-29 | 半导体装置的制造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9627350B2 (zh) |
JP (1) | JP6415381B2 (zh) |
CN (1) | CN106098573B (zh) |
DE (1) | DE102016206542B4 (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015115665A1 (ja) * | 2014-02-03 | 2015-08-06 | 国立大学法人大阪大学 | 接合構造体、及び接合構造体の製造方法 |
DE102018204887B3 (de) | 2018-03-29 | 2019-09-05 | Danfoss Silicon Power Gmbh | Verfahren zum Montieren einer Halbleiterleistungsmodulkomponente und eines Halbleiterleistungsmoduls mit einer derartigen Modulkomponente |
JP7516786B2 (ja) * | 2019-06-21 | 2024-07-17 | 株式会社村田製作所 | 半導体装置及びその製造方法 |
WO2021039565A1 (ja) * | 2019-08-26 | 2021-03-04 | リンテック株式会社 | 積層体の製造方法 |
KR20220049517A (ko) * | 2019-08-26 | 2022-04-21 | 린텍 가부시키가이샤 | 적층체의 제조 방법 |
CN110756943A (zh) * | 2019-09-20 | 2020-02-07 | 西安中车永电电气有限公司 | 一种提高焊接质量的底板结构及其焊接方法 |
JP7313315B2 (ja) * | 2020-05-19 | 2023-07-24 | 三菱電機株式会社 | 半導体装置の製造方法及び電力制御回路の製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1577778A (zh) * | 2003-07-22 | 2005-02-09 | 株式会社东芝 | 半导体器件的制造方法及半导体制造装置 |
CN103703560A (zh) * | 2011-08-04 | 2014-04-02 | 三菱电机株式会社 | 半导体装置及其制造方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0275433B1 (de) | 1986-12-22 | 1992-04-01 | Siemens Aktiengesellschaft | Verfahren zur Befestigung von elektronischen Bauelementen auf einem Substrat, Folie zur Durchführung des Verfahrens und Verfahren zur Herstellung der Folie |
JP2003234359A (ja) * | 2002-02-08 | 2003-08-22 | Hitachi Ltd | 半導体装置の製造方法 |
JP2009004666A (ja) | 2007-06-25 | 2009-01-08 | Hitachi Ltd | パワー半導体モジュールおよびその製造方法 |
JP2008085354A (ja) * | 2007-10-22 | 2008-04-10 | Toshiba Corp | 半導体製造装置 |
US8592260B2 (en) * | 2009-06-26 | 2013-11-26 | Nitto Denko Corporation | Process for producing a semiconductor device |
MY160373A (en) | 2010-07-21 | 2017-03-15 | Semiconductor Components Ind Llc | Bonding structure and method |
DE102010042721A1 (de) | 2010-10-20 | 2012-04-26 | Robert Bosch Gmbh | Ausgangswerkstoff einer Sinterverbindung und Verfahren zur Herstellung der Sinterverbindung |
CN103262172B (zh) | 2010-11-03 | 2018-05-15 | 阿尔发装配解决方案有限公司 | 烧结材料及使用该材料的附着方法 |
JP2012191238A (ja) * | 2012-06-15 | 2012-10-04 | Hitachi Ltd | 導電性焼結層形成用組成物、これを用いた導電性被膜形成法および接合法 |
US20140120356A1 (en) * | 2012-06-18 | 2014-05-01 | Ormet Circuits, Inc. | Conductive film adhesive |
JP2014135411A (ja) * | 2013-01-11 | 2014-07-24 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
JP6214273B2 (ja) * | 2013-08-08 | 2017-10-18 | 三菱電機株式会社 | 金属ナノ粒子を用いた接合構造および金属ナノ粒子を用いた接合方法 |
-
2015
- 2015-04-30 JP JP2015092616A patent/JP6415381B2/ja active Active
- 2015-12-04 US US14/959,139 patent/US9627350B2/en active Active
-
2016
- 2016-04-19 DE DE102016206542.4A patent/DE102016206542B4/de active Active
- 2016-04-29 CN CN201610283784.2A patent/CN106098573B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1577778A (zh) * | 2003-07-22 | 2005-02-09 | 株式会社东芝 | 半导体器件的制造方法及半导体制造装置 |
CN103703560A (zh) * | 2011-08-04 | 2014-04-02 | 三菱电机株式会社 | 半导体装置及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
US20160322327A1 (en) | 2016-11-03 |
DE102016206542B4 (de) | 2022-12-22 |
JP6415381B2 (ja) | 2018-10-31 |
JP2016213223A (ja) | 2016-12-15 |
DE102016206542A1 (de) | 2016-11-03 |
US9627350B2 (en) | 2017-04-18 |
CN106098573A (zh) | 2016-11-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106098573B (zh) | 半导体装置的制造方法 | |
JP6265693B2 (ja) | 半導体装置およびその製造方法 | |
CN109216313B (zh) | 具有包括钎焊的导电层的芯片载体的模制封装 | |
CN105765716B (zh) | 功率半导体模块和复合模块 | |
JP6881238B2 (ja) | 半導体モジュール、その製造方法及び電力変換装置 | |
JP5379816B2 (ja) | 電力用半導体装置 | |
CN101593709B (zh) | 含烧结接头的模块 | |
CN103956350A (zh) | 包括将半导体芯片键合至铜表面的烧结接合部的模块 | |
CN111276447B (zh) | 双侧冷却功率模块及其制造方法 | |
JP7026451B2 (ja) | パワー半導体モジュール及びその製造方法並びに電力変換装置 | |
CN103579154B (zh) | 包括叠层的电气器件封装以及其制造方法 | |
JP2016134540A (ja) | 電力用半導体装置 | |
CN109698179B (zh) | 半导体装置及半导体装置的制造方法 | |
CN104103611A (zh) | 加压加热接合结构及加压加热接合方法 | |
EP2804209A1 (en) | Moulded electronics module | |
CN104303299A (zh) | 半导体装置的制造方法及半导体装置 | |
CN104051397A (zh) | 包括非整数引线间距的封装器件及其制造方法 | |
JP5246143B2 (ja) | 半導体モジュールおよびその製造方法ならびに電気機器 | |
CN106898590A (zh) | 功率半导体装置及其制造方法 | |
CN102354688A (zh) | 一种功率模块 | |
CN203339143U (zh) | 半导体装置 | |
CN202394862U (zh) | 一种功率模块 | |
JP5682511B2 (ja) | 半導体モジュール | |
US20240055392A1 (en) | Method of manufacturing semiconductor device | |
JP2006066559A (ja) | 半導体モジュールおよびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |