CN101593709B - 含烧结接头的模块 - Google Patents

含烧结接头的模块 Download PDF

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Publication number
CN101593709B
CN101593709B CN2009102034139A CN200910203413A CN101593709B CN 101593709 B CN101593709 B CN 101593709B CN 2009102034139 A CN2009102034139 A CN 2009102034139A CN 200910203413 A CN200910203413 A CN 200910203413A CN 101593709 B CN101593709 B CN 101593709B
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lotion
substrate
metal
semiconductor chip
power
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CN101593709A (zh
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卡斯滕·古特
伊万·尼基廷
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

一种方法，包括将包含有金属颗粒、溶剂和烧结抑制剂的膏体施加于晶粒和金属层中的其中之一上。该方法包括使膏体中的溶剂蒸发并将晶粒和金属层中的该其中之一放置在晶粒和金属层中的另一个上，使得膏体与晶粒和金属层接触。该方法包括对晶粒和金属层中的该其中之一施加力并且分解烧结抑制剂以形成将晶粒连接至金属层的烧结接头。

Description

含烧结接头的模块
技术领域
电力电子模块是用于电力电子电路的半导体封装。电力电子模块典型地用于车载和工业应用中，例如在逆变器和整流器中。包含于电力电子模块内的半导体组件典型地是绝缘栅双极型晶体管(IGBT)半导体芯片或金属氧化物半导体场效应晶体管(MOSFET)半导体芯片。IGBT和MOSFET半导体芯片具有变化的电压额定值和电流额定值。一些电力电子模块也包含半导体封装中的附加半导体二极管(即，续流二极管)，用于过电压保护。
背景技术
一般而言，采用两种不同的电力电子模块设计。一种设计用于高电力(或者说高功率)应用，另一种设计用于低电力(或者说低功率)应用。对于高电力应用，电力电子模块典型地包括集成在单个基板上的几个半导体芯片。基板典型地包括绝缘陶瓷基板(例如Al2O3、AlN、Si3N4或其它合适的材料)，以使电力电子模块绝缘。将至少陶瓷基板的顶面用纯的或镀的Cu、Al或其它合适的材料金属化，以便为半导体芯片提供电性和机械接触。典型地，利用直接铜键合(DCB)工艺、直接铝键合(DAB)工艺或金属活性钎焊(AMB)工艺将金属层与陶瓷基板结合。
典型地，使用含Sn-Pb、Sn-Ag、Sn-Ag-Cu或其它合适焊料合金的软焊料将半导体芯片连接至金属化的陶瓷基板。典型地，将几个基板结合在金属底板上。在这种情况下，陶瓷基板的背面也用纯的或镀的Cu、Al或其它合适的材料金属化，以用于将基板连接至金属底板。为了将基板接合至金属底板，典型地采用含Sn-Pb、Sn-Ag、Sn-Ag-Cu或其它合适焊料合金的软焊料。
对于低电力(或者说低功率)应用，典型地采用引线框架基板(例如，纯Cu基板)代替陶瓷基板。取决于具体应用，引线框架基板典型地镀有Ni、Ag、Au和/或Pd。典型地，使用含Sn-Pb、Sn-Ag、Sn-Ag-Cu或其它合适焊料合金的软焊料将半导体芯片接合至引线框架基板。
对于高温应用，焊接接头的低熔点(Tm＝180℃-220℃)成为电力电子模块的临界参数。在电力电子模块的工作期间，半导体芯片下面的区域暴露在高温下。在这些区域中，半导体芯片内散发的热量叠加至周围空气温度。这导致了在电力电子模块工作期间的热循环。典型地，考虑到热循环可靠性，高于150℃时不能保证焊接接头的可靠功能。如果高于150℃，在几个热循环后在焊接区域内可能形成裂缝。这些裂缝能很容易延伸至整个焊接区域上并导致电力电子模块故障。
随着日益增加的在恶劣环境(例如，汽车应用)中使用电力电子器件的需求以及当前的半导体芯片集成，外部散热和内部散热不断增加。因此，对于能在达到并超过200℃的内部和外部温度下工作的高温电力电子模块的需求日益增长。另外，为了降低高温电力电子模块的成本，应该避免用贵金属表面将半导体芯片连接至基板以及用贵金属表面将基板连接至金属底板。
由于这些原因以及其它原因，所以需要提出本发明。
发明内容
本发明的一个实施例提供了制造模块的方法。该方法包括将包含金属颗粒、溶剂和烧结抑制剂的膏体(paste)施加于晶粒(或者称为芯片die)和金属层中的其中之一上。该方法包括使膏体中的溶剂蒸发并将晶粒和金属层中的该其中之一放置于晶粒和金属层中的另一个上，使得膏体与晶粒和金属层接触。该方法包括对晶粒和金属层中的该其中一个施加力并使烧结抑制剂分解以形成将晶粒接合至金属层的烧结接头。
附图说明
本文包含了附图以提供对本发明的进一步理解，这些附图结合在本说明书中并构成了本说明书的一部分。附图示出了实施例并和该说明一起用于阐述这些实施例的原理。通过参考下面的详细说明而对本发明实施例的更好理解，可以很容易理解本发明的其它实施例以及本发明实施例的许多预期优点。这些附图中的元件并不必然彼此成比例。相同的参考数字指的是相同部件。
图1示出了模块的一个实施例的截面图；
图2示出了模块的另一个实施例的截面图；
图3示出了半导体芯片和金属膏体的一个实施例的截面图；
图4示出了干燥金属膏体后半导体芯片和金属膏体的一个实施例的截面图；
图5示出了将半导体芯片放置在基板上的一个实施例的截面图；
图6示出了将半导体芯片键合至基板的一个实施例的截面图；
图7示出了模块的另一个实施例的截面图。
具体实施方式
在下面的详细描述中，参考构成本说明书一部分的附图，这些附图中示出了实施本发明的具体实施例。在这方面，诸如“顶”、“底”、“前”、“后”、“前导”、“尾随”等方向性术语参考所描述的附图的方向使用。由于本发明实施例的组件可以设置成许多不同方位，所以这些方向性术语仅用于说明，而没有任何限制的意思。应该理解的是，在不背离本发明的范围的条件下，可以使用其它实施例，并且可以进行结构或逻辑改变。所以，下列详细描述不应该被理解为限制性的意思，并且本发明的范围由所附的权利要求限定。
应该理解的是，如果没有特别注释，这里描述的不同示例性实施例的特征可以彼此结合。
图1示出了模块100的一个实施例的截面图。在一个实施例中，模块100是高温(即，达到并超过200℃)低电力电子模块。电力电子模块100包括引线框架基板102、烧结接头104、半导体芯片或晶粒106、键合线108、引线112和外壳110。引线框架基板102包含Cu、Al或其它合适的材料。在一个实施例中，引线框架基板102镀有Ni、Ag、Au和/或Pd。在一个实施例中，烧结接头104将引线框架基板102直接连接至半导体芯片106，而无需在引线框架基板102和半导体芯片106之间使用贵金属层。与典型的高温电力电子模块相比，由于不使用贵金属层，因而降低了电力电子模块100的成本。
如这里所使用的，术语“电连接”不意味着元件必须直接相连在一起并且在“电连接”的元件之间可以设置中间元件。
半导体芯片106通过键合线108与引线112电连接。键合线108包含Al、Cu、Al-Mg、Au或其它合适材料。在一个实施例中，键合线108(bond wire)通过超声引线键合方法键合至半导体芯片106和引线112。在一个实施例中，引线框架基板102的厚度在125μm到200μm的范围内。引线框架基板102通过低温接合(LTJ)工艺接合至半导体芯片106以提供烧结接头104。烧结接头104在不氧化引线框架基板102表面的情况下形成。外壳110包括模制材料或其它合适的材料。外壳110包围了引线框架基板102、烧结接头104、半导体芯片106、键合线108和部分引线112。
图2示出了模块120的另一个实施例的截面图。在一个实施例中，模块120是高温(也就是说，达到并超过200℃)高电力电子模块。电力电子模块120包括金属底板124、烧结接头126、包含金属表面或层128和132的金属化陶瓷基板130、烧结接头134、半导体芯片136、键合线138、电路板140、控制接触部142、电力接触部144、灌封(potting)146和148，以及外壳150。
陶瓷基板130包含Al2O3、AlN、Si3N4或其它合适的材料。在一个实施例中，每个陶瓷基板130的厚度在0.2mm至2.0mm的范围内。金属层128和132包含Cu、Al或其它合适的材料。在一个实施例中，金属层128和/或132镀有Ni、Ag、Au和/或Pd。在一个实施例中，每个金属层128和/或132的厚度在0.1mm至0.6mm的范围内。在一个实施例中，烧结接头126将金属层128直接接合至金属底板124，而无需在金属层128和金属底板124之间使用贵金属层。在一个实施例中，烧结接头134将金属层132直接连接至半导体芯片136，而无需在金属层132和半导体芯片136之间使用贵金属层。与典型高温电力电子模块相比，由于不使用贵金属层，因而降低了电力电子模块120的成本。
半导体芯片136通过键合线138与金属层132电连接。键合线138包含Al、Cu、Al-Mg、Au或其它合适的材料。在一个实施例中，键合线138通过超声波线键合法(ultrasonic wire bonding)键合至半导体芯片136和金属层132。金属层132与电路板140和电力接触部144电连接。电路板140与控制接触部142电连接。
外壳150包围了烧结接头126、包含金属层128和132的金属化陶瓷基板130、烧结接头134、半导体芯片136、键合线138、电路板140、控制接触部142的一部分和电力接触部144的一部分。外壳150包括工程塑料或其它合适的材料。外壳150接合至金属底板124。在一个实施例中，使用单个金属化陶瓷基板130，从而不包括金属底板124并且外壳150直接接合至单个金属化陶瓷基板130。
灌封材料146填充外壳150内电路板140下方围绕烧结接头126、包含金属层128和132的金属化陶瓷基板130、烧结接头134、半导体芯片136和键合线138的区域。灌封材料148填充外壳150内电路板140上方围绕控制接触部142的一部分和电力接触部144的一部分的区域。灌封材料146和148包括硅凝胶或其它合适的材料。灌封材料146和148防止了介质击穿对电力电子模块120的损害。
下面的图3-6示出了半导体芯片与包含金属表面的基板之间的低温接合，例如，按照前面参考图1所描述和示出的，半导体芯片106与引线框架基板102的接合，或按照前面参考图2所描述和示出的，半导体芯片136与金属层132的接合。类似的工艺也可以用于金属化基板与金属底板之间的低温接合，例如，按照前面参考图2所描述和示出的，金属层128与金属底板124的接合。
图3示出了半导体芯片200和金属膏体202的一个实施例的截面图。金属膏体202施加于半导体芯片200的背面。在另一个实施例中，在分离晶粒之前将金属膏体202施加于晶圆。金属膏体202通过印刷、散布(dispensing)或其它合适的方法施加于半导体芯片200。金属膏体202包含粒度在纳米范围内的金属颗粒。这些金属颗粒包括Au、Ag、Cu或其它合适的金属中的一种或多种。在一个实施例中，金属膏体202所包含的金属颗粒中至少50％的颗粒具有小于50nm的粒度分布。在另一个实施例中，金属膏体202所包含的金属颗粒中至少95％的颗粒具有小于50nm的粒度分布。
金属膏体202还包含一种或多种溶剂以控制金属膏体和烧结抑制剂的粘性，从而防止金属颗粒在低温烧结。选择金属膏体202的溶剂以使其在25℃到200℃的温度(Tsolvent)范围内分解。选择金属膏体202的溶剂还使得溶剂在不降解烧结抑制剂的情况下响应温度和/或真空而变干。在一个实施例中，烧结抑制剂包括工业蜡或其它合适的材料。选择金属膏体202的烧结抑制剂以使其在150℃到400℃的温度(Tinhibitor)范围内分解。选择烧结抑制剂以使其在高于溶剂温度的温度时分解。通过最大化Tsolvent和Tinhibitor之间的温差，最大化了工艺窗口(process window)。
图4示出了在金属膏体202变干之后半导体芯片200和金属膏体204的一个实施例的截面图。金属膏体202在25℃到200℃的温度范围内变干和/或通过真空变干以提供干燥的金属膏体204。基于所用溶剂来选择温度和/或真空以确保溶剂的挥发。选择温度使得在溶剂挥发期间金属颗粒的烧结被烧结抑制剂阻止。
图5示出了将半导体芯片200放置在基板208上的一个实施例的截面图。将基板208沿212所指示的方向放入索引隧道炉210。基板208包括Au、Ag、Cu或其它合适的材料。隧道炉210内的气氛是非氧化性的。在一个实施例中，非氧化性气氛包括N2、N2-H2(也就是说，合成气体forming gas)、H2、HCOOH或其它合适的气体。非氧化性气氛使基板208能够包含非贵金属表面。隧道炉210将基板208加热到150℃到450℃的温度范围内。如214所指示的，利用拾放(pick-and-place)类方法将含金属膏体204的半导体芯片200放置在基板208上。
图6示出了将半导体芯片200键合至基板208的一个实施例的截面图。对半导体芯片200施加如216所示的键合力以将半导体芯片200键合至加热的基板208。在一个实施例中，键合力在1MPa至40MPa的范围内。在另一个实施例中，键合力在1MPa至10MPa的范围内。键合力的施加时长在50ms至6000ms的范围内。键合力提供了金属颗粒与基板208和半导体芯片200之间的良好聚结。受热基板208快速分解烧结抑制剂以形成将半导体芯片200键合至基板208的烧结接头206。
图7示出了模块300的另一个实施例的截面图。模块300包括基板302、烧结接头304、半导体芯片或晶粒306、烧结接头308和金属带310。在一个实施例中，烧结接头304将基板302直接连接至半导体芯片306，而无需在基板302和半导体芯片306之间使用贵金属层。另外，烧结接头308将半导体芯片306连接至金属带310，而无需在半导体芯片306和金属带310之间使用贵金属层。烧结接头308提供了至半导体芯片306的正面连接。在其它实施例中，用金属板代替金属带310并且烧结接头308将金属板连接至半导体芯片306。
在一个实施例中，如前面参考图3-6所描述和示出的，利用低温接合工艺将半导体芯片306接合至基板302以提供烧结接头304。还利用低温接合工艺将金属带310连接至半导体芯片306以提供烧结接头308。在一个实施例中，利用如参考图3-6所描述的类似工艺将金属带310接合至半导体芯片306，只是在这种情况下金属膏体施加于金属带并且接合力也施加于金属带。
这些实施例提供了基板、金属带、和/或包含非贵金属层的金属板与半导体芯片、金属底板和/或其它合适的组件之间的低温连接。这些实施例提供了利用纳米金属膏体形成低温烧结接头的连续大规模生产工艺。烧结接头利用拾放类方法(pick-and-place-like)高速形成。在烧结期间，待接合的金属层表面在不使用贵金属层的情况下受到保护而不被氧化。这样，所连接的组件比典型低温接合组件的生产成本低并且适合于达到并超过200℃的高温应用。
虽然示出的实施例基本集中在电力电子模块上，但这些实施例适用于期望组件与基板之间低温连接的任何电路。
尽管在此已经示出并描述了具体实施例，但是本领域普通技术人员应该理解的是，在不背离本发明的范围的条件下，各种可替换的和/或等同的实施方式可以代替所示出和描述的具体实施例。本申请旨在覆盖本文所讨论的具体实施例的任何修改或变形。所以，本发明旨在仅由权利要求及其等同物限定。

Claims (17)

1.一种制造模块的方法，所述方法包括：
将包括金属颗粒、溶剂和烧结抑制剂的膏体施加于晶粒上；
使所述膏体中的所述溶剂蒸发；
在非氧化性气氛中加热包含金属层的基板；
将所述晶粒放置于所加热的金属层上，使得所述膏体与所加热的金属层接触；以及
对所述晶粒和所述金属层中的其中之一施加力以形成将所述晶粒接合至所述金属层的烧结接头，
其中，施加所述力包括在50ms至6000ms范围内的持续时间上施加所述力。
2.根据权利要求1所述的方法，
其中，加热所述基板包括在150℃至400℃的温度范围内加热所述基板。
3.根据权利要求1所述的方法，
其中，加热所述基板包括加热包含非贵金属层的基板。
4.根据权利要求1所述的方法，
其中，施加所述力包括施加在1MPa至10MPa范围内的力。
5.根据权利要求1所述的方法，
其中，蒸发所述溶剂包括将具有膏体的所述晶粒放置在真空中。
6.根据权利要求1所述的方法，
其中，蒸发所述溶剂包括在25℃至200℃的温度范围内加热所述膏体。
7.根据权利要求1所述的方法，
其中，施加所述膏体包括施加包含有Au、Ag和Cu颗粒中的一种颗粒的膏体。
8.根据权利要求1所述的方法，
其中，施加所述膏体包括施加金属颗粒分布中至少50％的颗粒小于50nm的膏体。
9.根据权利要求1所述的方法，
其中，施加所述膏体包括施加包含这样一种烧结抑制剂的膏体，所述烧结抑制剂包含工业蜡。
10.一种制造模块的方法，所述方法包括：
将包含有金属颗粒、溶剂和烧结抑制剂的膏体施加至半导体芯片；
干燥所述膏体以使所述溶剂蒸发；
在非氧化性气氛中加热包含金属表面的基板；
将所述半导体芯片放置在所加热的金属表面上，使得所述膏体与所加热的金属表面接触；以及
对所述半导体芯片施加力以形成将所述半导体芯片接合至所述金属表面的烧结接头，
其中，施加所述力包括在50ms至6000ms范围内的持续时间上施加所述力。
11.根据权利要求10所述的方法，
其中，干燥所述膏体包括在真空中在25℃至200℃的温度范围内加热所述膏体。
12.根据权利要求10所述的方法，
其中，加热所述基板包括在150℃至400℃的温度范围内加热所述基板。
13.根据权利要求10所述的方法，
其中，施加所述力包括施加在1MPa至10MPa范围内的力。
14.根据权利要求10所述的方法，
其中，施加所述膏体包括印刷所述膏体和散布所述膏体之一。
15.根据权利要求10所述的方法，
其中，施加所述膏体包括施加包含有Au、Ag和Cu颗粒中的一种颗粒的膏体。
16.根据权利要求10所述的方法，
其中，施加所述膏体包括施加金属颗粒分布中至少95％的颗粒小于50nm的膏体。
17.根据权利要求10所述的方法，
其中，加热所述基板包括在索引隧道炉中加热所述基板。
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