CN202454546U - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN202454546U
CN202454546U CN2012200113773U CN201220011377U CN202454546U CN 202454546 U CN202454546 U CN 202454546U CN 2012200113773 U CN2012200113773 U CN 2012200113773U CN 201220011377 U CN201220011377 U CN 201220011377U CN 202454546 U CN202454546 U CN 202454546U
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substrate
metal level
semiconductor device
semiconductor chip
metal layer
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CN2012200113773U
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奥拉夫·霍尔费尔德
安德烈亚斯·勒尼格尔
安德烈·乌勒曼
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本实用新型提供了一种半导体器件,所述半导体器件包括耦接至一衬底的半导体芯片以及耦接至所述衬底的基板。所述基板包括第一金属层,所述第一金属层包覆至第二金属层。所述第二金属层被变形以提供管脚鳍片或鳍片式冷却结构。根据本实用新型的技术方案,可实现在高达200℃甚至超过200℃的内外温度下工作的高温功率电子模块并且通过冷却元件对功率电子器件进行液体冷却来实现防止过热。

Description

半导体器件
技术领域
本实用新型涉及一种半导体器件,具体地说,本实用新型涉及一种包括包覆基板的半导体器件。
背景技术
功率电子模块是用在功率电路中的半导体封装。功率电子模块典型地用在车辆和工业应用中,如用在逆变器及整流器中。包括在这些功率电子模块内的半导体元器件典型地是绝缘栅双极型晶体管(IGBT)半导体芯片或金属氧化物半导体场效应晶体管(MOSFET)半导体芯片。这些IGBT和MOSFET半导体芯片具有不同的额定电压与额定电流。包括在功率电子模块内的半导体元器件还可以包括二极管、晶闸管、结型栅场效应晶体管(JFEF)、以及双极型晶体管。无源元器件与控制电子器件均可被包括在功率电子模块内。这些半导体元器件由Si、SiC、GaN、GaAs、或其他适当的衬底制成。一些功率电子模块包括在半导体封装中用于过电压保护的额外的半导体二极管(即,续流二极管)。
总体而言,使用了两种不同的功率电子模块设计。一种设计是用于较高功率应用,而另一种设计是用于较低功率应用。对于较高功率应用,一个功率电子模块典型地包括集成到一个单一衬底上的多个半导体芯片。该衬底典型地包括一种绝缘陶瓷衬底,如Al2O3、AlN、Si3N4、或其他适当的材料,以使该功率电子模块绝缘。用纯的或电镀的Cu、Al、或者其他适当的材料将该陶瓷衬底的至少顶侧金属化,以便为这些半导体芯片提供电触点和机械触点。典型地,使用铜直接连接(铜瓷键合,DCB)工艺、铝直接连接(DAB)工艺、或活性金属钎焊(AMB)工艺将该金属层接合到该陶瓷衬底上。
典型地,将使用Sn-Pb、Sn-Ag、Sn-Ag-Cu、或其他适当的焊料合金的软钎焊用于将半导体芯片接合到金属化陶瓷衬底上。典型地,多个衬底被结合到一平面金属基板上。在这种情况下,同样用纯的或电镀的Cu、Al、或者其他适当的材料将该陶瓷衬底的后侧金属化,用于将这些衬底并接到该平面金属基板上。为了将这些衬底接合到该平面金属基板上,典型地使用用Sn-Pb、Sn-Ag、Sn-Ag-Cu、或其他适当的焊料合金的软钎焊。该平面金属基板可进而附接至一个冷却元件,冷却剂可以流经该冷却元件以防止功率电子模块在工作期间过热。
随着日益期望在苛刻环境(例如,汽车应用)中使用功率电子器件以及半导体芯片的持续集成化,外部与内部的热扩散持续增加。因此,对于能够在高达200℃甚至超过200℃的内外温度下工作的高温功率电子模块存在不断增长的需求。另外,功率电子器件的电流密度的持续增加,这导致功率损耗密度的增加。因此,通过冷却元件对功率电子器件进行液体冷却来防止过热变得日益重要。
出于这些以及其他原因,对于本实用新型存在需求。
实用新型内容
一个实施例提供了一种半导体器件。该半导体器件包括耦接至一衬底的半导体芯片以及耦接至该衬底的基板。该基板包括第一金属层,该第一金属层包覆至第二金属层。该第二金属层被变形以便提供管脚鳍片(pin-fin)或鳍片式冷却结构。
进一步地,所述第一金属层包括铜并且所述第二金属层包括铝。
进一步地,所述第一金属层具有2.5mm与10mm之间的厚度且所述第二金属层具有2.5mm与10mm之间的厚度。
根据本实用新型的半导体器件进一步包括:第三金属层,所述第三金属层与所述第二金属层相对地包覆所述第一金属层。
进一步地,所述第三金属层具有1μm与0.1mm之间的厚度。
进一步地,所述第三金属层包括银和钯中之一。
进一步地,所述衬底是扩散焊接到所述第三金属层的衬底和烧结到所述第三金属层的衬底中之一。
进一步地,所述第三金属层包括铝。
进一步地,所述第三金属层的结构被形成为提供焊接停止层,并且其中,所述衬底被焊接至所述第一金属层。
另一个实施例还提供了一种半导体器件。该半导体器件包括:第一金属化陶瓷衬底;第一半导体芯片,所述第一半导体芯片耦接至所述第一金属化陶瓷衬底的第一侧;以及基板,所述基板耦接至所述第一金属化陶瓷衬底的第二侧,所述第二侧与所述第一侧相反,所述基板包括包含铜的第一层,所述第一层包覆至包含铝的第二层,所述第二层被变形以提供管脚鳍片或鳍片式冷却结构。
根据本实用新型的半导体器件进一步包括:第二半导体芯片,所述第二半导体芯片耦接至所述第一金属化陶瓷衬底的所述第一侧。
根据本实用新型的半导体器件进一步包括:第二金属化陶瓷衬底;以及第二半导体芯片,所述第二半导体芯片耦接至所述第二金属化陶瓷衬底的第一侧,其特征在于,所述基板被耦合至所述第二金属化陶瓷衬底的第二侧,所述第二金属化陶瓷衬底的所述第二侧与所述第二金属化陶瓷衬底的所述第一侧相对。
根据本实用新型的半导体器件进一步包括:冷却室,所述冷却室包括入口与出口,所述冷却室包围所述冷却结构;框架,所述框架附装至所述基板;灌注料,所述灌注料包围所述半导体芯片与所述衬底;以及盖子,所述盖子位于所述灌注料上。
根据本实用新型的半导体器件进一步包括:电源端子,所述电源端子电耦接至所述第一半导体芯片;以及控制端子,所述控制端子电耦接至所述第一半导体芯片,其特征在于,所述电源端子与所述控制端子具有相同的尺寸。
根据本实用新型的技术方案,可实现在高达200℃甚至超过200℃的内外温度下工作的高温功率电子模块并且通过冷却元件对功率电子器件进行液体冷却来实现防止过热。
附图说明
将附图包括在内以便提供对实施例的进一步理解,并且它们被并入到本说明书中且构成本说明书的一部分。这些附图示出了多个实施例并且与本说明书一起用于解释实施例的原理。其他实施例以及实施例的很多想要达到的优点将很容易地得到了解,因为通过参考以下的详细说明它们将更好地得到理解。附图中的元件彼此不必非为成比例的。相似的参考标号指代对应的相似器件。
图1示出了半导体器件的一个实施例的截面图。
图2示出了双金属带(即,双金属包覆条)的一个实施例的截面图。
图3示出了三金属带(即,三金属包覆条)的一个实施例的截面图。
图4示出了包括冷却结构的基板的一个实施例的截面图。
图5示出了包括冷却结构的基板的另一个实施例的截面图。
图6示出了衬底组件的一个实施例的截面图。
图7示出了耦接至基板的衬底组件的一个实施例的截面图。
图8示出了耦接至基板的衬底组件的另一个实施例的截面图。
图9示出了衬底组件、基板、端子、以及框架的一个实施例的截面图。
图10示出了衬底组件、基板、端子、框架以及灌注材料的一个实施例的截面图。
图11示出了衬底组件、基板、端子、框架、灌注材料以及盖子的一个实施例的截面图。
图12示出了包括冷却室的半导体器件的一个实施例的截面图。
图13示出了包括冷却室的半导体器件的另一个实施例的截面图。
图14示出了半导体器件的另一个实施例的透视图。
图15示出了半导体器件的另一个实施例的透视图。
图16是示出了用于制造半导体器件的方法的一个实施例的流程图。
具体实施方式
在以下详细说明中参考了附图,这些附图形成了本详细说明的一部分,并且这些附图通过示意性的方式示出了多个可在其中实践本披露的具体实施例。在此方面,参照附图所描绘的定向使用了定向术语,如“顶部”、“底部”、“前”、“后”、“头”、“尾”,等等。因为实施例的元器件可以被定位在多个不同的定向中,所以定向术语仅用于示意性的目的并且绝非是限制性的。应当理解的是可以使用其他实施例并且在不背离本披露的保护范围的情况下可以进行结构上的或逻辑上的改变。因此,以下详细说明并非限制性的,并且本披露的保护范围由所附权利要求来限定。
应当理解的是,除非以其他方式特别说明外,在此所述的各种示例性实施例的特征可以彼此结合。
如在此所使用的,术语“电耦接”并不意味着这些元件必须直接连接在一起,而是可以在这些“电耦接”的元件之间可设有插入元件。
图1示出了半导体器件100的一个实施例的截面图。在一个实施例中,半导体器件100是一个高温(即,高达200℃以及超过200℃)高功率电子模块。功率电子模块100包括冷却室102、基板104、接点118、衬底组件132a和132b、框架134、端子136、灌注料138、以及盖子140。每个衬底组件132a和132b均包括金属化陶瓷衬底122,所述金属化陶瓷衬底包括金属表面或金属层120与124、接点126、半导体芯片128、以及接合线130。
基板104包括第一金属层108和第二金属层106。第一金属层108与第二金属层106是由不同的材料制成的。在一个实施例中,第一金属层108是铜层或铜合金层,而第二金属层106是铝层或铝合金层。在其他实施例中,第一金属层108与第二金属层106是由其他适合的材料制成的。在一个实施例中,基板104还包括与第二金属层106相对的第三金属层110。第三金属层110与第一金属层108是由不同的材料制成的。在一个实施例中,第三金属层110是铝层或铝合金层。在其他实施例中,第三金属层110是银层、银合金层、钯层、钯合金层、或另一种适当的材料层。第一金属层108被包覆至第二金属层106。第三金属层110被包覆至第一金属层108。第二金属层106的结构被形成为提供多个管脚鳍片或鳍片112以及位于管脚鳍片或鳍片112之间的空间114。
基板104是由双金属或三金属带(即,包覆条)形成的。由于该第一金属层,基板104提供了在一侧上具有良好可焊性的低成本基板。另外,由于该第二金属层,基板104在另一侧上包括可与冷却流体兼容的多个冷却鳍片或管脚。
冷却室102包括入口142与出口144,用于供冷却流体流经基板104的管脚鳍片或鳍片112之间的空间114。冷却室102通过螺钉116连接至基板104。在其他实施例中,并不使用螺钉116而是将冷却室102胶合或激光焊接至基板104。每个衬底组件132a和132b均经由接点118连接至基板104。接点118是软钎焊的接点、烧结的接点、扩散焊接的接点、或其他适当的接点。
陶瓷衬底122包括Al2O3、AlN、Si3N4、或其他适合的材料。在一个实施例中,陶瓷衬底122均具有0.2mm到2.0mm范围内的厚度。金属层120和124包括Cu、Al、或其他适合的材料。在一个实施例中,金属层120和/或124镀有Ni、Ag、Au、和/或Pd。在一个实施例中,金属层120与124均具有0.1mm到0.6mm范围内的厚度。在一个实施例中,使用铜直接连接(DCB)工艺、铝直接连接(DAB)工艺、或活性金属钎焊(AMB)工艺将金属层120和124接合到陶瓷衬底122上以便分别提供DCB衬底、DAB衬底、或AMB衬底。接点126将金属层124耦接至半导体芯片128。接点126是软钎焊的接点、烧结的接点、扩散焊接的接点、或其他适合的接点。
半导体芯片128通过接合线130电耦接至金属层124。在一个实施例中,半导体芯片128是功率半导体芯片并且可以包括IGBT、MOSFET、JFET、双极型晶体管、晶闸管、二极管、和/或其他适当的功率元器件。接合线130包括Al、Cu、Al-Mg、Au、或其他适合的材料。在一个实施例中,使用超声引线接合将接合线130接合至半导体芯片128以及金属层124。金属层124和/或半导体芯片128被电耦接至端子136。端子136延伸穿过框架134以便将外部电连接提供给功率电子模块100以用于电力与控制连接两者。
框架134将接点118、衬底组件132a和132b、接合线130、以及部分端子136包围起来。框架134包括技术塑料或其他适合的材料。框架134通过螺钉接合、胶合、夹紧、焊接、或其他适当的技术被连接至基板104上。灌注材料138填充框架134内的位于接点118、衬底组件132a和132b、接合线130、以及部分端子136周围的区域。灌注材料138包括硅凝胶、硅树脂涂料、聚酰亚胺涂料、环氧树脂涂料、或另一种用于提供电绝缘的适合材料。灌注材料138防止电介质击穿导致功率电子模块100的损坏。盖子140被附装至框架134以便覆盖衬底组件132a和132b以及灌注料138。在一个实施例中,盖子140是第二灌注料层,如环氧树脂或其他适合的封盖材料。在另一个实施例中,盖子140是通过卡扣接合、焊接、胶合、或其他适当的技术而被附装到框架134上的盖组件。
下面的图2至图13示出了制造半导体器件的工艺,例如先前所述的并参照图1所展示的半导体器件100。
图2示出了双金属带(即,双金属包覆条)200a的实施例的截面图。双金属带200a包括第一金属层108与第二金属层107。第一金属层108与第二金属层107是不同材料的。在一个实施例中,第一金属层108是由可焊接材料制成的并且具有小于18ppm/K的热膨胀系数(CTE)。第二金属层107被选择为是可易于机加工的(例如,可成形的、可形成边缘的、以及可形成珠缘的)。在一个实施例中,第二金属层107与液体冷却电路中的铝是化学性可兼容的。在一个实施例中,第一金属层108是铜层或铜合金层,而第二金属层107是铝层或铝合金层。在其他实施例中,第一金属层108与第二金属层107是其他适合的金属。
在一个实施例中,双金属带200a的总厚度在5mm到6mm之间。在一个实施例中,第一金属层108的厚度与第二金属层107的厚度相等。在一个实施例中,第一金属层108的厚度在2.5mm到3mm之间并且第二金属层107的厚度在2.5mm到3mm之间。在另一个实施例中,第一金属层108的厚度在2.5mm到10mm之间并且第二金属层107的厚度在2.5mm到10mm之间。在另一个实施例中,第一金属层108的厚度与第二金属层107的厚度具有适合于形成基板的其他值。
第一金属层108被包覆至第二金属层107。在一个实施例中,通过将分离的层一起带入包覆台架的轧辊中而将第一金属层108包覆至第二金属层107。来自这些轧辊的均匀压力紧压各个层以便在接触表面之间形成接合。然后这些接合层经历再结晶退火与轧制而形成成品尺寸。在轧制为成品尺寸后,这些接合层经历另一种热处理以便将这些层不可分离地融合在一起。在其他实施例中,使用另一种适合的技术将第一金属层108包覆至第二金属层107。
图3示出了三金属带(即,三金属包覆条)200b的一个实施例的截面图。三金属带200b包括第一金属层108与第二金属层107(如先前所描述并参照图2示出的),以及第三金属层109。第三金属层109与第一金属层108是不同材料的。在一个实施例中,第三金属层109与第二金属层107是相同材料的。在一个实施例中,第三金属层109是铝或铝合金。在其他实施例中,第三金属层109是银、银合金、钯、钯合金、或另一种适合的金属。第三金属层109的厚度小于第一金属层108的厚度以及第二金属层107的厚度。在一个实施例中,第三金属层109具有1μm到0.1mm之间的厚度。使用一种适合的技术(如先前参照图2所描述的包覆工艺)将第三金属层109在第二金属层107的相对侧包覆到第一金属层108。
虽然以下图4至图13示出了先前所描述并参照图3示出的三金属带200b制造半导体器件,但是所示出的工艺还可适应于先前所描述并参照图2示出的双金属带200a。
图4示出了包括冷却结构的基板210的一个实施例的截面图。先前所描述并参照图3示出的基板200b的第二金属层107的结构被形成为用以形成一个冷却结构,该冷却结构具有管脚鳍片或鳍片112,在管脚鳍片或鳍片112之间具有空间114。通过切割、冲压、或微变形技术(MDT)将第二金属层107变形以便提供第二金属层106。MDT使第二金属层107机械地或塑性地变形从而在无需去除任何金属的情况下形成管脚鳍片或鳍片112。第二金属层107变形从而使得不会露出第一金属层108的表面的面向第二金属层106的任何部分。通过不露出第一金属层108的表面,使得第一金属层108免受腐蚀。
在一个实施例中,通过MDT、压力铸造、或精压来形成管脚鳍片或鳍片112,以便提供具有由113表示的5.5mm到6.0mm之间长度的管脚鳍片或鳍片112。在另一个实施例中,通过MDT来形成管脚鳍片或鳍片112,以提供具有由113表示的2mm到10mm之间长度的管脚鳍片或鳍片112以及具有由115所示的1mm到10mm之间的宽度的空间114。在另一个实施例中,通过压力铸造或精压来形成管脚鳍片或鳍片112,以提供具有由113表示的2mm到20mm之间长度的管脚鳍片或鳍片112以及具有由115表示的1mm到20mm之间宽度的空间114。在其他实施例中,可以将管脚鳍片或鳍片112形成为具有其他适合的长度。在一个实施例中,穿通基板210而切割或冲压出多个孔212以用于将基板210安装至其他装置结构(例如先前所描述并参照图1示出的冷却室102)。
图5示出了包括冷却结构的基板220的另一个实施例的截面图。除了基板220不包括孔212以及第三金属层109的结构已经被形成为提供用于第三金属层110之外,基板220与先前所描述并参照图4示出的基板210类似。使用另一种适合的技术对第三金属层109的多个部分进行蚀刻、刻划、剥离、或去除,以便露出第一金属层108的多个部分222并且提供第三金属层110。可以在形成管脚鳍片或鳍片112之前或之后将第三金属层109的结构形成为提供第三金属层110。在一个实施例中,第一金属层108包括铜并且第三金属层的结构化制备了用于焊接在该第一金属层上的基板220准备。在一个实施例中,第三金属层110包括铝并且提供了焊接掩模和焊接停止层。
图6示出了衬底组件132a的一个实施例的截面图。衬底组件132a包括金属化陶瓷衬底122,该金属化陶瓷衬底包括金属表面或金属层120和124、接点126a和126b、半导体芯片128a和128b、以及接合线130。第一半导体芯片128a经由第一接点126a被附装至金属层124。第二半导体芯片128b经由第二接点126b被附装至金属层124。接点126a和126b是软钎焊的接点、烧结的接点、扩散焊接的接点、或其他适合的接点。
半导体芯片128a和128b通过接合线130被电耦接至金属层124。在一个实施例中,半导体芯片128a和128b是功率半导体芯片并且可以包括IGBT、MOSFET、JFET、双极型晶体管、晶闸管、二极管、和/或其他适合的功率元器件。接合线130包括Al、Cu、Al-Mg、Au、或其他适合的材料。在一个实施例中,使用超声引线接合将接合线130接合至半导体芯片128a和128b以及金属层124。在其他实施例中,使用夹子或铜条以及烧结来将半导体芯片128a和128b电耦接至金属层124。还可以制造其他衬底组件,如先前参照图1描述并示出的衬底组件132b。
图7示出了连接至基板104的衬底组件132a和132b的一个实施例的截面图。衬底组件132a和132b经由接点118耦接至第一金属层108。在其他实施例中,衬底组件132a和132b被制造在基板104上。在一个实施例中,衬底组件132a和132b被软钎焊至第一金属层108以提供焊接点118。焊接点118包括Sn-Pb、Sn-Ag、Sn-Ag-Cu、Sn-Sb、或其他适合的焊接合金。在一个实施例中,第一金属层108包括铜或铜合金,而第三金属层110包括铝或铝合金并且为该焊接工艺提供了焊接掩模和焊接停止层。
在另一个实施例中,衬底组件132a和132b被扩散焊接至第一金属层108上以提供扩散焊接点118。在该扩散焊接工艺期间,软焊料被完全固化以在该扩散焊接工艺之后提供纯的金属间的接点(例如,Cu3Sn、Cu6Sn5、Ag3Sn)。在另一个实施例中,衬底组件132a和132b被烧结至第一金属层108以提供多个烧结接点118。每个烧结接点118均是包括烧结纳米颗粒(例如Ag纳米颗粒、Au纳米颗粒、Cu纳米颗粒、或其他适合的纳米颗粒)的烧结金属层。衬底组件132a经由接合线130被电耦接至衬底组件132b。
图8示出了耦接至包括第三金属层109的基板的衬底组件132a和132b的另一个实施例的截面图。在此实施例中,第三金属层109的结构未被形成为露出第一金属层108。衬底组件132a和132b被软钎焊、扩散焊接、或烧结至第三金属层109以提供接点242。在一个实施例中,第三金属层109包括银、银合金、钯、或钯合金。第三金属层109可以提供用于烧结或扩散焊接的界面。
虽然以下图9至图13包括将衬底组件132a和132b接合至第一金属层108上的接点118,但这些实施例还可应用于当利用接点242将衬底组件132a和132b接合至第三金属层109的情况。
图9示出了衬底组件132a和132b、基板104、端子136、以及框架134的实施例的截面图。框架134通过螺钉接合、胶合、夹紧、焊接、或其他适合方法被附装至基板104。在一个实施例中,框架134接触第三金属层110的上表面以及第一金属层108、第二金属层106和第三金属层110的侧壁。在其他实施例中(例如,图1),框架134仅接触第三金属层110或第一金属层108(即,如果不包含第三金属层110的话)的上表面。
穿过框架134插入或形成端子136,以使得端子136的一部分延伸到框架134之外以用于电力连接与控制连接。端子136的一部分延伸进框架134以提供到衬底组件132a和132b的内部电连接。端子136经由接合线130被电耦接至衬底组件132a和132b上。在其他实施例中,端子136通过焊接或其他适合的技术被电连接至衬底组件132a和132b。
图10示出了衬底组件132a和132b、基板104、端子136、框架134以及灌注材料138的一个实施例的截面图。在一个实施例中,在框架134内的衬底组件132a和132b上施加硅凝胶以提供灌注料138。在其他实施例中,用硅树脂、聚乙烯亚胺、环氧树脂、或其他适合的材料来覆盖衬底组件132a和132b以提供电绝缘。
图11示出了衬底组件132a和132b、基板104、端子136、框架134、灌注材料138、以及盖子140的一个实施例的截面图。在一个实施例中,在灌注料138上施加第二灌注材料(如环氧树脂)以提供盖子140。在另一个实施例中,通过卡扣接合、焊接、胶合、或其他适合的方法将盖组件附装至框架134以提供盖子140。
图12示出了包括冷却室102的半导体器件100的一个实施例的截面图。冷却室102通过螺钉116被附装至基板104。在其他实施例中,冷却室102通过胶合、焊接、或其他适合的方法被附装至基板104。在一个实施例中,冷却室102是由铝或铝合金制成的。在其他实施例中,冷却室102是由与冷却流体兼容的另一种适合材料制成的。冷却室102包括入口和出口。在一个实施例中,冷却室102以最佳方式将冷却流体引导到热区域,以补偿平行的或不同的半导体芯片的接点温度间的微小差异。
图13示出了包括冷却室302的半导体器件300的另一个实施例的截面图。在此实施例中,通过将薄金属层激光焊接或胶合至基板104的第二金属层106来制造冷却室302。例如在由304表示的多个点处将该薄金属层胶合或激光焊接至第二金属层106上。可以将连接点304的位置选择为调节流经该冷却室的冷却流体的压力和/或流量。在一个实施例中,该薄金属层是铝或铝合金。在其他实施例中,该薄金属层是与冷却流体兼容的另一种适合的材料。半导体器件300还包括延伸穿过基板104和冷却室302的孔212。孔212可用于将半导体器件300附装至另一个结构。
图14示出了半导体器件320的另一个实施例的透视图。在一个实施例中,半导体器件320是高功率电子模块。功率电子模块320包括:基板322;框架324;功率半导体芯片326;电源端子328、330和332;以及控制端子334。在一个实施例中,电源端子328是负极端子,电源端子330是正极端子,而电源端子332是相位输出端子。
端子328、330、332和334经由接合线336被电耦接至功率半导体芯片326。端子328、330、332和334是均具有相同尺寸的压入配合管脚,以使得功率电子模块320的所有端子均使用一种单一的端子类型。另外,端子328、330、332和334在功率电子模块320的四周延伸穿过框架324。在一个实施例中,基板322与先前所描述并参照图1示出的基板104相似。
图15示出了半导体器件360的另一个实施例的透视图。除了半导体器件360包括盖子362以及已经用基板364代替基板322之外,半导体器件360与先前所描述并参照图14示出的半导体器件320类似。盖子362是一个卡扣接合盖。基板364包括管脚鳍片366。在一个实施例中,基板364与先前所描述并参照图1示出的基板104类似。
图16是示出了用于制造半导体器件(如先前所描述并参照图1和12示出的半导体器件100或先前所描述并参照图13示出的半导体器件300)的方法400的一个实施例的流程图。在402,形成双金属带或三金属带(即,包覆条)(例如,如先前所描述并参照图2和图3示出的)。在404处,该包覆条的底层变形以便形成具有管脚鳍片或鳍片式冷却结构的基板(例如,如先前所描述并参照图4示出的)。在406,将衬底以及半导体芯片(例如,衬底组件或分离的元器件)附装到该基板上(例如,如先前所描述并参照图7示出的)。在408,装配该框架、添加灌注料、并且封闭该封装(例如,如先前所描述并参照图9至图11示出的)。在410,将冷却室附装至该基板(例如,如先前所描述并参照图12和图13示出的)。
多个实施例提供了包括包覆双金属基板或三金属基板的半导体器件,该基板包括冷却结构。该包覆基板提供了低成本方案,用于提供包括第一金属层与第二金属层的基板,该第一金属层适合于连接至衬底组件,而该第二金属层适合于形成与冷却流体兼容的冷却结构。另外,这些包覆层之间的接合明显比其他技术(如冷气喷涂或双金属挤压)坚固。
虽然在此已示出并描述了多个具体实施例,但本领域的普通技术人员将认识到,在不背离本披露的保护范围的前提下,可以用多种替代方案和/或等效实现方式替代所示出并描述的具体实施例。本申请旨在覆盖在此所讨论的具体实施例的任何修改或变体。因此,本披露旨在仅由权利要求以及其等效物限定。

Claims (14)

1.一种半导体器件,其特征在于,包括:
半导体芯片,所述半导体芯片耦接至一衬底;以及
基板,所述基板耦接至所述衬底,所述基板包括第一金属层,所述第一金属层包覆至第二金属层,所述第二金属层被变形以提供管脚鳍片或鳍片式冷却结构。
2.根据权利要求1所述的半导体器件,其特征在于,所述第一金属层包括铜并且所述第二金属层包括铝。
3.根据权利要求1所述的半导体器件,其特征在于,所述第一金属层具有2.5mm与10mm之间的厚度且所述第二金属层具有2.5mm与10mm之间的厚度。
4.根据权利要求1所述的半导体器件,其特征在于,所述半导体器件进一步包括:
第三金属层,所述第三金属层与所述第二金属层相对地包覆所述第一金属层。
5.根据权利要求4所述的半导体器件,其特征在于,所述第三金属层具有1μm与0.1mm之间的厚度。
6.根据权利要求4所述的半导体器件,其特征在于,所述第三金属层包括银和钯中之一。
7.根据权利要求6所述的半导体器件,其特征在于,所述衬底是扩散焊接到所述第三金属层的衬底和烧结到所述第三金属层的衬底中之一。
8.根据权利要求4所述的半导体器件,其特征在于,所述第三金属层包括铝。
9.根据权利要求8所述的半导体器件,其特征在于,所述第三金属层的结构被形成为提供焊接停止层,并且
其中,所述衬底被焊接至所述第一金属层。
10.一种半导体器件,其特征在于,包括:
第一金属化陶瓷衬底;
第一半导体芯片,所述第一半导体芯片耦接至所述第一金属化陶瓷衬底的第一侧;以及
基板,所述基板耦接至所述第一金属化陶瓷衬底的第二侧,所述第一金属化陶瓷衬底的所述第二侧与所述第一金属化陶瓷衬底的所述第一侧相反,所述基板包括包含铜的第一层,所述第一层包覆至包含铝的第二层,所述第二层被变形以提供管脚鳍片或鳍片式冷却结构。
11.根据权利要求10所述的半导体器件,其特征在于,所述半导体器件进一步包括:
第二半导体芯片,所述第二半导体芯片耦接至所述第一金属化陶瓷衬底的所述第一侧。
12.根据权利要求10所述的半导体器件,所述半导体器件进一步包括:
第二金属化陶瓷衬底;以及
第二半导体芯片,所述第二半导体芯片耦接至所述第二金属化陶瓷衬底的第一侧,
其特征在于,所述基板被耦合至所述第二金属化陶瓷衬底的第二侧,所述第二金属化陶瓷衬底的所述第二侧与所述第二金属化陶瓷衬底的所述第一侧相对。
13.根据权利要求10所述的半导体器件,其特征在于,所述半导体器件进一步包括:
冷却室,所述冷却室包括入口与出口,所述冷却室包围所述冷却结构;
框架,所述框架附装至所述基板;
灌注料,所述灌注料包围所述半导体芯片与所述衬底;以及
盖子,所述盖子位于所述灌注料上。
14.根据权利要求10所述的半导体器件,其中,所述半导体器件进一步包括:
电源端子,所述电源端子电耦接至所述第一半导体芯片;以及
控制端子,所述控制端子电耦接至所述第一半导体芯片,
其特征在于,所述电源端子与所述控制端子具有相同的尺寸。
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8866274B2 (en) 2012-03-27 2014-10-21 Infineon Technologies Ag Semiconductor packages and methods of formation thereof
US8847385B2 (en) * 2012-03-27 2014-09-30 Infineon Technologies Ag Chip arrangement, a method for forming a chip arrangement, a chip package, a method for forming a chip package
US8916968B2 (en) 2012-03-27 2014-12-23 Infineon Technologies Ag Multichip power semiconductor device
EP4064336A1 (en) * 2012-10-29 2022-09-28 Fuji Electric Co., Ltd. Semiconductor device
US9731370B2 (en) 2013-04-30 2017-08-15 Infineon Technologies Ag Directly cooled substrates for semiconductor modules and corresponding manufacturing methods
JP6094413B2 (ja) * 2013-07-18 2017-03-15 三菱電機株式会社 半導体モジュール及びその製造方法
US9355980B2 (en) 2013-09-03 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional chip stack and method of forming the same
WO2015112771A2 (en) * 2014-01-22 2015-07-30 Wolverine Tube, Inc. Double-sided micro fin plate for plate heat exchanger
JP6337957B2 (ja) 2014-03-19 2018-06-06 富士電機株式会社 半導体モジュールユニットおよび半導体モジュール
WO2016009725A1 (ja) * 2014-07-17 2016-01-21 富士電機株式会社 半導体装置
KR102421016B1 (ko) * 2014-09-09 2022-07-13 세람테크 게엠베하 다중-층 냉각 엘리먼트
JP6341822B2 (ja) * 2014-09-26 2018-06-13 三菱電機株式会社 半導体装置
DE102014115202B4 (de) * 2014-10-20 2017-08-31 Infineon Technologies Ag Verfahren zum verlöten mindestens eines substrats mit einer trägerplatte
CN107112316B (zh) * 2014-12-26 2020-04-21 三菱电机株式会社 半导体模块
US9564385B2 (en) 2015-04-30 2017-02-07 Deere & Company Package for a semiconductor device
US9559038B2 (en) 2015-04-30 2017-01-31 Deere & Company Package for a semiconductor device
DE102015210587B4 (de) * 2015-06-10 2020-10-29 Infineon Technologies Ag Halbleitermodul, halbleitermodulanordnung und verfahren zum betrieb eines halbleitermoduls
EP3116292B1 (de) 2015-07-06 2021-03-17 EDAG Engineering AG Elektronikmodul mit generativ erzeugtem kühlkörper
ITUB20153344A1 (it) * 2015-09-02 2017-03-02 St Microelectronics Srl Modulo di potenza elettronico con migliorata dissipazione termica e relativo metodo di fabbricazione
DE102015115271B4 (de) * 2015-09-10 2021-07-15 Infineon Technologies Ag Elektronikbaugruppe mit entstörkondensatoren und verfahren zum betrieb der elektronikbaugruppe
DE112017001646T5 (de) * 2016-03-30 2019-01-03 Mitsubishi Electric Corporation Leistungsmodul und verfahren zum herstellen desselben, sowie leistungselektronik-vorrichtung und verfahren zum herstellen derselben
US10008411B2 (en) 2016-12-15 2018-06-26 Infineon Technologies Ag Parallel plate waveguide for power circuits
US10410952B2 (en) 2016-12-15 2019-09-10 Infineon Technologies Ag Power semiconductor packages having a substrate with two or more metal layers and one or more polymer-based insulating layers for separating the metal layers
DE102016125338B4 (de) 2016-12-22 2018-07-12 Rogers Germany Gmbh System zum Kühlen eines für elektrische Bauteile vorgesehenen Trägersubstrats und Trägersubstrat
WO2018138961A1 (ja) * 2017-01-27 2018-08-02 京セラ株式会社 セラミック回路基板、パワーモジュールおよび発光装置
DE112017007351B4 (de) * 2017-03-29 2023-02-23 Mitsubishi Electric Corporation Leistungshalbleitermodul
DE112017007585B4 (de) * 2017-05-24 2022-09-08 Mitsubishi Electric Corporation Halbleiterbaugruppe
DE102018112000A1 (de) * 2018-05-18 2019-11-21 Rogers Germany Gmbh System zum Kühlen eines Metall-Keramik-Substrats, ein Metall-Keramik-Substrat und Verfahren zum Herstellen des Systems
DE102019202903A1 (de) 2019-03-04 2020-09-10 Abb Schweiz Ag Elektronischer Konverter ausgebildet basierend auf Schweißtechnologien
FR3095779B1 (fr) * 2019-05-06 2021-04-16 Safran Procede de fabrication d’un module electronique de puissance
FR3095778B1 (fr) * 2019-05-06 2022-06-03 Safran Procede de fabrication d’un module electronique de puissance
US11145571B2 (en) * 2019-06-04 2021-10-12 Semiconductor Components Industries, Llc Heat transfer for power modules
WO2020245975A1 (ja) 2019-06-06 2020-12-10 三菱電機株式会社 金属ベース板の反り制御構造、半導体モジュールおよびインバータ装置
WO2020254143A1 (en) * 2019-06-19 2020-12-24 Danfoss Silicon Power Gmbh Half-bridge power assembly
DE102020202845A1 (de) 2020-03-05 2021-09-09 Volkswagen Aktiengesellschaft Verfahren zur Herstellung eines elektrischen Moduls
US11410910B2 (en) * 2020-07-30 2022-08-09 Taiwan Semiconductor Manufacturing Co., Ltd. Packaged semiconductor device including liquid-cooled lid and methods of forming the same
KR102308872B1 (ko) * 2021-02-02 2021-10-05 제엠제코(주) 반도체 부품 쿨링 시스템, 반도체 부품 쿨링 시스템 제조방법, 및 반도체 부품 쿨링 시스템이 적용된 반도체 패키지
JP7470074B2 (ja) * 2021-03-10 2024-04-17 株式会社 日立パワーデバイス 半導体モジュール
DE102021109658B3 (de) 2021-04-16 2022-10-20 Danfoss Silicon Power Gmbh Verfahren zur Herstellung eines Halbleiter-Leistungsgeräts und damit hergestelltes Halbleiter-Leistungsgerät sowie ein Werkzeugteil für eine Sinterpresse und Verwendung einer Sinterpresse
DE112022002382T5 (de) * 2021-04-25 2024-02-15 Danfoss Silicon Power Gmbh Elektronische Vorrichtung mit verbesserter Kühlung
JP2022189168A (ja) 2021-06-10 2022-12-22 パナソニックIpマネジメント株式会社 冷却ユニット及び冷却ユニットの製造方法
EP4362088A1 (en) * 2021-06-25 2024-05-01 Amosense Co.,Ltd Power module
EP4187589A1 (en) * 2021-11-24 2023-05-31 SwissSEM Technologies AG Directly cooled power module

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09298259A (ja) * 1996-05-09 1997-11-18 Sumitomo Metal Ind Ltd ヒートシンクおよびその製造方法
JPH10125831A (ja) * 1996-10-18 1998-05-15 Sumitomo Metal Ind Ltd ヒートシンク放熱フィン
DE19719703C5 (de) 1997-05-09 2005-11-17 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Leistungshalbleitermodul mit Keramiksubstrat
JP2003078086A (ja) 2001-09-04 2003-03-14 Kubota Corp 半導体素子モジュール基板の積層構造
TWM256675U (en) 2004-03-15 2005-02-01 Chia Cherne Industry Co Ltd Composite metal forming heat sink structure without interface layer
JP4866836B2 (ja) * 2005-02-23 2012-02-01 京セラ株式会社 接合体とウェハ保持部材及びその取付構造並びにウェハの処理方法
KR20080012344A (ko) 2005-06-07 2008-02-11 울버린 튜브, 인크. 전자장비 냉각을 위한 열 전달 표면
DE102005033469B4 (de) 2005-07-18 2019-05-09 Infineon Technologies Ag Verfahren zum Herstellen eines Halbleitermoduls
US7900692B2 (en) 2005-10-28 2011-03-08 Nakamura Seisakusho Kabushikigaisha Component package having heat exchanger
US7755185B2 (en) * 2006-09-29 2010-07-13 Infineon Technologies Ag Arrangement for cooling a power semiconductor module
US8030760B2 (en) * 2006-12-05 2011-10-04 Kabushiki Kaisha Toyota Jidoshokki Semiconductor apparatus and manufacturing method thereof
JP4861840B2 (ja) 2007-01-26 2012-01-25 アイシン・エィ・ダブリュ株式会社 発熱体冷却構造及び駆動装置
JP4697475B2 (ja) 2007-05-21 2011-06-08 トヨタ自動車株式会社 パワーモジュールの冷却器及びパワーモジュール
JP2008294280A (ja) * 2007-05-25 2008-12-04 Showa Denko Kk 半導体装置
US9583413B2 (en) * 2009-02-13 2017-02-28 Infineon Technologies Ag Semiconductor device
DE102009028360B3 (de) * 2009-08-07 2010-12-09 Infineon Technologies Ag Verfahren zur Herstellung einer Schaltungsträgeranordnung und eines Leistungselektronikmoduls mit einer Verankerungsstruktur zur Herstellung einer temperaturwechselstabilen Lötverbindung
WO2011018882A1 (en) * 2009-08-10 2011-02-17 Fuji Electric Systems Co., Ltd. Semiconductor module and cooling unit
DE102009029577B3 (de) 2009-09-18 2011-04-28 Infineon Technologies Ag Verfahren zur Herstellung eines hochtemperaturfesten Leistungshalbleitermoduls
US20110079376A1 (en) 2009-10-03 2011-04-07 Wolverine Tube, Inc. Cold plate with pins

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104517917A (zh) * 2013-09-30 2015-04-15 赛米控电子股份有限公司 功率半导体器件以及用于制造功率半导体器件的方法
CN104517917B (zh) * 2013-09-30 2017-09-15 赛米控电子股份有限公司 功率半导体器件以及用于制造功率半导体器件的方法
CN104752381A (zh) * 2013-12-26 2015-07-01 株式会社丰田自动织机 半导体装置
CN103769764A (zh) * 2014-01-25 2014-05-07 嘉兴斯达半导体股份有限公司 一种软钎焊的焊片和功率模块组装结构
CN106886266A (zh) * 2015-12-15 2017-06-23 重庆道米科技有限公司 一种基于计算机电器元件散热的装置
CN108257922A (zh) * 2016-12-29 2018-07-06 比亚迪股份有限公司 一种散热基板及其制备方法和应用以及电子元器件
CN108257923A (zh) * 2016-12-29 2018-07-06 比亚迪股份有限公司 一种散热基板及其制备方法和应用以及电子元器件
CN108257929A (zh) * 2016-12-29 2018-07-06 比亚迪股份有限公司 一种散热基板及其制备方法和应用以及电子元器件
CN108257929B (zh) * 2016-12-29 2020-06-19 比亚迪股份有限公司 一种散热基板及其制备方法和应用以及电子元器件
CN110462821A (zh) * 2017-01-31 2019-11-15 超级电力研究所 包括介电载体的电力电子模块
CN110462821B (zh) * 2017-01-31 2023-03-31 超级电力研究所 包括介电载体的电力电子模块
CN111108819A (zh) * 2017-10-02 2020-05-05 丹佛斯硅动力有限责任公司 具有集成的冷却装置的功率模块
US11134587B2 (en) 2017-10-02 2021-09-28 Danfoss Silicon Power Gmbh Power module with integrated cooling device
CN111108819B (zh) * 2017-10-02 2022-02-22 丹佛斯硅动力有限责任公司 电动装置和制造电动装置的方法
CN109599369A (zh) * 2018-12-03 2019-04-09 中国工程物理研究院应用电子学研究所 一种短时发热的大功率器件封装结构及方法

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