CN105895536A - 电子元件的封装方法 - Google Patents
电子元件的封装方法 Download PDFInfo
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- CN105895536A CN105895536A CN201610082881.5A CN201610082881A CN105895536A CN 105895536 A CN105895536 A CN 105895536A CN 201610082881 A CN201610082881 A CN 201610082881A CN 105895536 A CN105895536 A CN 105895536A
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- 239000010949 copper Substances 0.000 claims description 34
- 238000012856 packing Methods 0.000 claims description 30
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 27
- 229910052802 copper Inorganic materials 0.000 claims description 27
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- 239000010931 gold Substances 0.000 claims description 4
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- QRJOYPHTNNOAOJ-UHFFFAOYSA-N copper gold Chemical compound [Cu].[Au] QRJOYPHTNNOAOJ-UHFFFAOYSA-N 0.000 claims 1
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- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 6
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- 238000002360 preparation method Methods 0.000 description 3
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
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- 231100000719 pollutant Toxicity 0.000 description 2
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Abstract
本发明涉及一种电子元件的封装方法,其包括如下步骤。首先,提供半封装单元,其中半封装单元包括第一绝缘层及电子元件。电子元件是部分嵌设于第一绝缘层内,且电子元件包括至少一个导接端。形成金属层于半封装单元的表面上,且移除部分的金属层,以形成金属遮罩于半封装单元的表面且暴露该至少一个导接端。形成金属重布线层于金属遮罩及至少一个导接端上。移除部分的金属重布线层以及部分的金属遮罩,进而形成至少一个接触垫对应于该至少一个导接端。本发明的封装方法,电子元件的多个导接端上可形成平面级接触垫,通过平面级接触垫可使嵌入式封装结构的后续步骤(例如绝缘层压合、激光钻孔、除渣及盲孔电镀等工艺)得以依序完成。
Description
技术领域
本发明涉及一种封装方法,特别涉及一种电子元件的封装方法。
背景技术
近年来,电子装置设计是朝向小尺寸、轻薄及易于携带的趋势发展。再者,随着电子工业技术的日益进步,电子装置的内部电路已逐渐朝向模块化发展,换言之,多个电子元件是整合在单一电子模块中。举例而言,电源模块(power module)为广泛使用的电子模块之一,电源模块可包括例如但不限于直流-直流转换器(DC to DC converter)、直流-交流转换器(DC to AC converter)或交流-直流转换器(AC to DC converter)。于多个电子元件(例如电容器、电阻器、电感器、变压器、二极管及晶体管)整合为电源模块之后,电源模块便可安装于主机板或系统电路板上。
目前,嵌入式封装结构因具有例如较小覆盖区域(smaller footprint)、较扁平(lower profile)、较高电源密度及效能(higher power density and performance)、较佳热管理(better thermal management)、较低电源噪声(lower electrical noise)以及易于大规模生产制造等诸多优点而广泛地被应用。
传统嵌入式封装结构描述如下。于嵌入式封装结构中,具有至少一个导接端的电子元件是设置于基板的第一表面,且第一绝缘层亦设置于基板的第一表面。若视需要更可于基板的第二表面形成第二绝缘层。藉此电子元件可被第一绝缘层所覆盖。为了使嵌设的电子元件的导接端可与外部电路导接,第一绝缘层中需形成至少一个导电通孔,因此,电子元件的导接端才能通过导电通孔与外部电路导接。
如前所述,为了使嵌设的电子元件的导接端可与外部电路导接,需于第一绝缘层中形成导电通孔。于形成导电通孔的过程中,针对钻孔后导电通孔的清洗须利用化学药剂进行。由于铜对于激光钻孔工艺具有较佳耐受性,因此传统嵌入式封装结构的电子元件的导接端皆由铜所构成。换言之,于实施激光钻孔工艺期间使导接端以及绝缘层受到损坏的几率较小。此外,由于铜对于化学药剂亦具有较佳耐受性,故被化学药剂腐蚀的几率亦较低。再则,在进行蚀刻过程时,铜表面上的原生氧化层(native oxide)亦较容易去除。
然而,由于传统嵌入式封装结构的电子元件的导接端是由铜所构成,故限制了设置于封装结构内的电子元件的种类。假若导接端由非铜金属材质所构成,则电子元件无法直接内嵌于封装结构内。特别是,若电子元件的导接端由非铜金属材质所构成且电子元件必须内嵌于封装结构内时,则必须先将电子元件的导接端进行处理,以使电子元件的导接端可覆盖上一层铜层(亦即铜重布线层,Cu RDL)。目前,铜重布线层技术通常施行于晶圆等级,为安全地进行晶圆处理,其对于晶圆厚度有特定要求。通常起始晶圆的厚度至少需有400微米以上,以避免晶圆处理过程中产生晶圆龟裂问题。
因此,有必要提供改良的电子元件的封装方法,以解决现有技术所面临的问题。
发明内容
本发明的目的在于提供一种电子元件的封装方法,其中电子元件的导接端可由非铜金属材料所构成,由于电子元件种类的选择较不受限,因此利用本发明方法制备完成的封装结构的应用场合可以更为广泛。
本发明的另一目的在于提供一种电子元件的封装方法,利用本发明封装方法可使电子元件的多个导接端上形成多个平面级接触垫(Panel-level contactpads),通过平面级接触垫可使嵌入式封装结构的后续步骤(例如绝缘层压合、激光钻孔、除渣及盲孔电镀等工艺)得以依序完成。
为达上述目的,本发明提供一种电子元件的封装方法,其包括如下步骤。首先,提供半封装单元,其中半封装单元包括第一绝缘层及电子元件。电子元件是部分嵌设于第一绝缘层内,且电子元件包括至少一个导接端设置于半封装单元未被第一绝缘层覆盖的表面。之后,形成金属层于半封装单元的表面上,且移除部分的金属层,以形成金属遮罩于半封装单元的表面且暴露未为金属遮罩所覆盖的至少一个导接端。接着,形成金属重布线层于金属遮罩及至少一个导接端上,藉此金属遮罩及至少一个导接端为金属重布线层所覆盖并导接。之后,移除部分的金属重布线层以及部分的金属遮罩,藉此以形成至少一个接触垫对应于至少一个导接端。
本发明电子元件的封装方法,电子元件的多个导接端上可形成平面级接触垫,通过平面级接触垫可使嵌入式封装结构的后续步骤(例如绝缘层压合、激光钻孔、除渣及盲孔电镀等工艺)得以依序完成。再则,由于未被金属遮罩覆盖的导接端是进行等离子体清洗程序,因此导接端上的原生氧化物及污染物可以去除。
附图说明
图1A至1M显示本发明第一较佳实施例的电子元件的封装方法的结构流程图。
图2A至2C是为图1A所示半封装单元的制法的结构流程图。
图3显示本发明封装方法中另一实施例的半封装单元的结构示意图。
图4A至4M是显示本发明第二较佳实施例的电子元件的封装方法的结构流程图。
其中,附图标记说明如下:
1、1’:半封装单元
1a:表面
10:第一绝缘层
11:电子元件
11a:第一电子元件
11b:第二电子元件
12:金属层
12a:金属遮罩
13:金属重布线层
13a:接触垫
14:导热部件
15:电极
16:第二绝缘层
16a:通孔
17:导电通孔
18:金属导接线路
110:导接端
111:表面
21、22:光致抗蚀剂层
21a、21b、22a:光致抗蚀剂图案
23:热释放胶膜
2:电源模块
具体实施方式
体现本发明特征与优点的一些典型实施例将在后段的说明中详细叙述。应理解的是本发明能够在不同的态样上具有各种的变化,其皆不脱离本发明的范围,且其中的说明及图示在本质上是当作对其进行说明用,而非架构于限制本发明。
图1A至1M是显示本发明第一较佳实施例的电子元件的封装方法的结构流程图。本发明电子元件的封装方法包括如下步骤。首先,如图1A所示,提供半封装单元1,其中半封装单元1包括第一绝缘层10以及电子元件11。于一实施例中,第一绝缘层10可由例如但不限于树脂或是任何其他具高热传导系数的适当绝缘材料所构成。电子元件11是部分嵌设于第一绝缘层10内,且电子元件11包括至少一个导接端110。导接端110是设置于电子元件11的表面111且暴露于第一绝缘层10。换言之,导接端110是设置于半封装单元1的表面1a。于本实施例中,电子元件11包括多个导接端110,且该多个导接端110是以铝、银、金或任何其他适当的非铜金属材料所构成。
于本实施例中,电子元件11可为主动元件或是被动元件。电子元件11可为例如但不限于集成电路(Integrated Circuit,IC)芯片、整合性功率元件、金属氧化物半导体场效晶体管(MOSFET)、高电子迁移率晶体管(HEMT)、绝缘栅双极性晶体管(Insulated-gate bipolar transistor,IGBT)、二极管(Diode)、电容器、电阻器、电感器或保险丝。电子元件11的导接端110的数目则依据电子元件11的种类及架构而定,例如图1A所示,电子元件11是示范性地为集成电路芯片,根据该集成电路芯片的架构,电子元件11具有三个导接端110。
于一实施例中,半封装单元1还包括至少一个导热部件14。导热部件14是嵌设于第一绝缘层10,且设置于电子元件11的至少一侧边。举例而言,导热部件14环绕电子元件11而设置,且导热部件14是部分外露于第一绝缘层10,藉此电子元件11所产生的热能可通过导热部件14转移至封装结构的外部散热。于一些实施例中,导热部件14可由金属导线架实现,可替换地,导热部件14亦可由具良好导热特性的印刷电路基板或陶瓷基板(ceramicsubstrate)实现。
接着,如图1B所示,形成一光致抗蚀剂层21于半封装单元1的表面1a,以覆盖多个导接端110。之后,如图1C所示,利用微影及蚀刻工艺将一掩模(未图示)的图案转移至光致抗蚀剂层21并移除部分光致抗蚀剂层21,以形成光致抗蚀剂图案21a。因此,该光致抗蚀剂图案21a可覆盖于多个导接端110,并且暴露第一绝缘层10的部分、电子元件11的表面111的部分以及导热部件14的部分。
然后,如图1D所示,于前述图1C所示的最终结构上形成一金属层12,以覆盖光致抗蚀剂图案21a、第一绝缘层10、电子元件11的表面111及导热部件14。于一实施例中,金属层12可由沉积金属层,例如铜层、钛钨/铜(TiW/Cu)层、镍铬/铜(NiCr/Cu)层或其组合,于前述图1C所示的最终结构上所构成。之后,如图1E所示,通过光致抗蚀剂剥离(lift-off)工艺,依序将叠加于光致抗蚀剂图案21a上方部分的金属层12以及光致抗蚀剂图案21a移除,藉此使金属层12形成一金属遮罩12a并暴露多个导接端110。应注意的是,移除光致抗蚀剂图案21a及其上方部分的金属层12的方式并不以光致抗蚀剂剥离方式为限。
然后,如图1F所示,对未被金属遮罩12a覆盖的多个导接端110进行等离子体清洗(plasma clean)程序,藉此以去除多个导接端110上的原生氧化物(native oxide)及污染物(contaminant),其中等离子体清洗程序可依据导接端110的金属材质的不同而轻微调整。之后,如图1G所示,以例如沉积或电镀方式于金属遮罩12a及多个导接端110上形成金属重布线层13(MetalRe-Distribution Layer,Metal RDL),藉此使金属重布线层13覆盖于金属遮罩12a及多个导接端110上,并与其相导接。于本实施例中,金属重布线层13可由例如但不限于铜、钛钨/铜(TiW/Cu)、镍铬/铜(NiCr/Cu)或含铜材料所构成。金属重布线层13的厚度以介于2μm至15μm为较佳,其中金属重布线层13是以平面级铜重布线层(Panel-level Cu Re-Distribution layer,PLCR)为较佳。
然后,如图1H所示,于前述的金属重布线层13上形成光致抗蚀剂层22。之后,如图1I所示,利用微影及蚀刻工艺将掩模(未图示)的图案转移至光致抗蚀剂层22并移除部分光致抗蚀剂层22,藉此以形成光致抗蚀剂图案22a,其中对应于多个导接端110部分的金属重布线层13可为光致抗蚀剂图案22a所覆盖,而金属重布线层13的其他部分则暴露而出。之后,如图1J所示,以光致抗蚀剂图案22a为遮罩,移除部分的金属重布线层13以及部分的金属遮罩12a,其中保留下的金属重布线层13是对应于多个导接端110。然后,移除光致抗蚀剂图案22a,藉此以形成多个接触垫13a对应于多个导接端110。于此实施例中,每一个导接端110与其对应的接触垫13a是共同地架构为电极15。
于一实施例中,接触垫13a与对应的导接端110的尺寸与位置是相匹配。于其他实施例中,接触垫13a的尺寸是小于对应的导接端110的尺寸,可替换地,接触垫13a的尺寸亦可大于对应的导接端110的尺寸。于另一些实施例中,接触垫13a的位置是略偏移于对应的导接端110的位置。
接着,如图1K所示,以压合工艺或任何其他适当的工艺,形成第二绝缘层16于前述第1J图所示的最终结构上,藉此使第二绝缘层16覆盖多个电极15、电子元件11的表面111、第一绝缘层10及至少一个导热部件14。于一实施例中,第二绝缘层16可由树脂或是其他具高热传导系数的适当绝缘材料所构成。的后,如图1L所示,于第二绝缘层16对应于电极15或接触垫13a的位置以激光钻孔方式形成多个通孔16a。之后,进行除渣工艺(desmearprocess),以清除激光钻孔工艺于通孔16a内所产生的污染物,其中电极15或接触垫13a是贯穿第二绝缘层16,且电极15或接触垫13a是通过对应的通孔16a而暴露。于本实施例中,通孔16的数量大于或等于电极15的数量。
接着,如图1M所示,以盲孔电镀工艺(Blind via plating process)将导电材料填具于多个通孔16a中,藉此金属导接线路18遂得以形成于第二绝缘层16上,且多个导电通孔17则形成于第二绝缘层16内。于本实施例中,多个电极15可通过多个导电通孔17与金属导接线路18电连接。更甚者,多个电极15可通过金属导接线路18与外部系统电路电连接。通过前述封装方法可以制得具嵌入式封装结构的电源模块2。
于本实施例中,图1A所示的半封装单元1的制法可参阅图2A至2C而描述如下。图2A至2C是为图1A所示的半封装单元的制法的结构流程图。首先,如图2A所示,提供热释放胶膜(thermal release film)23、电子元件11及至少一个导热部件14。接着,将电子元件11及至少一个导热部件14置放于热释放胶膜23上,其中电子元件11的多个导接端110是接触于热释放胶膜23。之后,如图2B所示,压合第一绝缘层10于热释放胶膜23上,使第一绝缘层10覆盖电子元件11及该至少一个导热部件14。随后,如图2C所示,移除热释放胶膜23,且使电子元件11的多个导接端110暴露于第一绝缘层10。通过前述的工艺步骤即可完成半封装单元1的制作。
图3显示本发明封装方法中另一态样的半封装单元的结构示意图。相较于图1A与图2C所示的半封装单元1,本实施例的半封装单元1’还包括多个电子元件11,其中多个电子元件11的结构可为相同或相异。举例而言,如图3所示,半封装单元1’包括两个电子元件11a及11b,每一个电子元件11的导接端110的数量可视该电子元件11的种类而定。例如第一电子元件11a为集成电路芯片,第一电子元件11a的导接端110的数量可依该集成电路芯片的架构而定,第一电子元件11a具三个导接端110。例如第二电子元件11b具有两个导接端110,该第二电子元件11b可为电容器、电阻器、二极管或任何其他适当的被动元件。应注意的是,于半封装单元1’的电子元件11的数量可依实际应用需求而任施变化。
此外,半封装单元1’包括多个导热部件14。于本实施例中,每两个导热部件14是水平地设置于每一个电子元件11的两相对侧边。换言之,每一个导热部件14是排列于每两相邻的电子元件11之间。于其他实施例中,导热部件14更整合为具有多开口或孔洞的导线架结构。每一个孔洞或开口可容置一个或多个第一电子元件11。
图4A至4M是显示本发明第二较佳实施例的电子元件的封装方法的结构流程图。于本实施例中,电子元件的封装方法及其各步骤所形成的结构是相似于前述第一实施例的电子元件的封装方法与结构,其中相同元件符号代表相同的元件及/或膜层结构,于此不再赘述。
首先,如图4A所示,提供半封装单元1,其中半封装单元1包括第一绝缘层10及电子元件11。电子元件11是部分嵌设于第一绝缘层10内。再者,电子元件11包括至少一个导接端110,其中导接端110是设置于电子元件11的表面111,且自第一绝缘层10暴露而出。换言之,导接端110是设置于半封装单元1的表面1a。于本实施例中,电子元件11包括多个导接端110,且多个导接端110是由铝、银、金或任何其他适当的金属材料(例如铜)所构成。于一实施例中,半封装单元1还包括至少一个导热部件14,该导热部件14是嵌设于第一绝缘层10。再者,导热部件14是设置于电子元件11的至少一侧边。
接着,如图4B所示,形成金属层12于半封装单元1的表面1a,以覆盖多个导接端110、第一绝缘层10、电子元件11的表面111及导热部件14。于一实施例中,金属层12可由沉积金属层,例如铜层、钛钨/铜(TiW/Cu)层、镍铬/铜(NiCr/Cu)层或其组合,于半封装单元1的表面1a上所构成。随后,形成光致抗蚀剂层21于金属层12上。
然后,如图4C所示,利用微影及蚀刻工艺将一掩模(未图示)的图案转移至光致抗蚀剂层21,并移除部分光致抗蚀剂层21且使部分金属层12暴露,藉此以形成光致抗蚀剂图案21b,其中未被该光致抗蚀剂图案21b所覆盖的金属层12的部分是对应于多个导接端110。
接着,如图4D所示,利用光致抗蚀剂图案21b为遮罩,移除未被光致抗蚀剂图案21b覆盖的金属层12的部分,并使多个导接端110暴露。的后,如步骤4E所示,移除光致抗蚀剂图案21b,使剩余的金属层12暴露以定义形成金属遮罩12a。
后续工艺如图4F至4M所示的步骤是相似于图1F至1M所示的步骤,于此不再赘述。
综上所述,本发明提供一种电子元件的封装方法,其电子元件的导接端可由非铜金属材料所构成。由于电子元件的种类的选择较不受限,因此使得具本发明封装结构的电源模块的应用场合更为广泛。此外,通过本发明电子元件的封装方法,电子元件的多个导接端上可形成平面级接触垫,通过平面级接触垫可使嵌入式封装结构的后续步骤(例如绝缘层压合、激光钻孔、除渣及盲孔电镀等工艺)得以依序完成。再则,由于未被金属遮罩覆盖的导接端是进行等离子体清洗程序,因此导接端上的原生氧化物及污染物可以去除。
本发明可以由本领域技术人员作些许的修改与润饰,均不脱离如附权利要求所欲保护的范围。
Claims (11)
1.一种电子元件的封装方法,包括步骤:
(a)提供一半封装单元,其中该半封装单元包括一第一绝缘层及一电子元件,该电子元件是部分嵌设于该第一绝缘层且包括至少一个导接端,该至少一个导接端是设置于该半封装单元的一表面且未被该第一绝缘层覆盖;
(b)形成一金属层于该半封装单元的该表面上,且移除部分的该金属层,以形成一金属遮罩于该半封装单元的该表面且暴露未被该金属遮罩覆盖的该至少一个导接端;
(c)形成一金属重布线层于该金属遮罩与该至少一个导接端上,使该金属重布线层覆盖与导接于该金属遮罩与该至少一个导接端;以及
(d)移除部分的该金属重布线层以及部分的该金属遮罩,以形成至少一个接触垫对应于该至少一个导接端。
2.如权利要求1所述的电子元件的封装方法,其中该导接端是由非铜金属材料构成。
3.如权利要求1所述的电子元件的封装方法,其中该半封装单元包括至少一个导热部件,该至少一个导热部件是部分嵌设于该第一绝缘层,且设置于该电子元件的至少一侧边。
4.如权利要求3所述的电子元件的封装方法,其中该步骤(a)还包括步骤:
提供一热释放胶膜,且置放该电子元件及该至少一个导热部件于该热释放胶膜上,其中该电子元件的该至少一个导接端是接触于该热释放胶膜;
压合该第一绝缘层于该热释放胶膜上,使该第一绝缘层包覆该电子元件及部分的该导热部件;以及
移除该热释放胶膜,使该电子元件的该至少一个导接端暴露于该第一绝缘层,以形成该半封装单元。
5.如权利要求3所述的电子元件的封装方法,其中该步骤(b)包括步骤:
形成一光致抗蚀剂层于该半封装单元的该表面,以覆盖该至少一个导接端;
利用一微影及蚀刻工艺移除部分的该光致抗蚀剂层,以形成一光致抗蚀剂图案,其中该光致抗蚀剂图案是对应于该至少一个导接端;
形成该金属层以覆盖该光致抗蚀剂图案、该第一绝缘层、该电子元件及该至少一个导热部件;以及
移除该光致抗蚀剂图案以及叠置于该光致抗蚀剂图案上方的该金属层的部分,以形成该金属遮罩且暴露该至少一个导接端。
6.如权利要求3所述的电子元件的封装方法,其中该步骤(b)包括步骤:
形成该金属层以覆盖该第一绝缘层、该电子元件及该至少一个导接端;
形成一光致抗蚀剂层于该金属层上;
利用一微影及蚀刻工艺移除部分的该光致抗蚀剂层,以形成一光致抗蚀剂图案,其中未被该光致抗蚀剂图案覆盖的该金属层的部分是对应于该至少一个导接端;
利用该光致抗蚀剂图案为遮罩移除该金属层的该部分,并使该至少一个导接端暴露;以及
移除该光致抗蚀剂图案,以形成该金属遮罩。
7.如权利要求1所述的电子元件的封装方法,其中该步骤(b)之后还包括步骤:对未被该金属遮罩覆盖的该至少一个导接端进行一等离子体清洗程序。
8.如权利要求1所述的电子元件的封装方法,其中于该步骤(c)中,该金属重布线层是以一沉积方式或一电镀方式实现。
9.如权利要求1所述的电子元件的封装方法,其中该金属重布线层是由铜或含铜材料构成。
10.如权利要求1所述的电子元件的封装方法,其中该步骤(d)包括步骤:
形成一光致抗蚀剂层于该金属重布线层上;
利用一微影及蚀刻工艺移除部分的该光致抗蚀剂层,以形成一光致抗蚀剂图案,其中该光致抗蚀剂图案是对应于该至少一个导接端,并且暴露该金属重布线层中未被该光致抗蚀剂图案所覆盖的部分;
以一金属蚀刻工艺移除该金属重布线层中未被该光致抗蚀剂图案所覆盖的部分以及移除该金属遮罩;以及
移除该光致抗蚀剂图案,以形成该至少一个接触垫对应于该至少一个导接端,其中该至少一个导接端与对应的该接触垫是共同架构为一电极。
11.如权利要求1所述的电子元件的封装方法,其中于该步骤(d)之后包括步骤:
形成一第二绝缘层以覆盖该至少一个接触垫、该电子元件及该第一绝缘层;
利用一激光钻孔工艺于该第二绝缘层中形成至少一个通孔,该通孔是对应于该至少一个接触垫;
对该至少一个通孔进行一除渣工艺,其中该至少一个接触垫是通过该至少一个通孔而暴露;以及
利用一电镀工艺将一导电材料填充于该至少一通孔中,以形成多个导电通孔,并形成一金属导接线路。
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