CN105874599A - 金属薄膜电阻器及工艺 - Google Patents

金属薄膜电阻器及工艺 Download PDF

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Publication number
CN105874599A
CN105874599A CN201480071999.7A CN201480071999A CN105874599A CN 105874599 A CN105874599 A CN 105874599A CN 201480071999 A CN201480071999 A CN 201480071999A CN 105874599 A CN105874599 A CN 105874599A
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CN
China
Prior art keywords
stop layer
etching stop
resistor
etching
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201480071999.7A
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English (en)
Chinese (zh)
Inventor
A·阿里
E·比奇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
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Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of CN105874599A publication Critical patent/CN105874599A/zh
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/47—Resistors having no potential barriers
    • H10D1/474—Resistors having no potential barriers comprising refractory metals, transition metals, noble metals, metal compounds or metal alloys, e.g. silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/086—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving buried masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43—Layouts of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/498—Resistive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
CN201480071999.7A 2013-12-31 2014-12-31 金属薄膜电阻器及工艺 Pending CN105874599A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361922155P 2013-12-31 2013-12-31
US61/922,155 2013-12-31
US14/548,812 2014-11-20
US14/548,812 US9502284B2 (en) 2013-12-31 2014-11-20 Metal thin film resistor and process
PCT/US2014/073001 WO2015103394A2 (en) 2013-12-31 2014-12-31 A metal thin film resistor and process

Publications (1)

Publication Number Publication Date
CN105874599A true CN105874599A (zh) 2016-08-17

Family

ID=53482657

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480071999.7A Pending CN105874599A (zh) 2013-12-31 2014-12-31 金属薄膜电阻器及工艺

Country Status (5)

Country Link
US (2) US9502284B2 (enExample)
EP (1) EP3090446A4 (enExample)
JP (1) JP2017502522A (enExample)
CN (1) CN105874599A (enExample)
WO (1) WO2015103394A2 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110993582A (zh) * 2019-10-31 2020-04-10 重庆中科渝芯电子有限公司 适用于多层金属布线的金属薄膜电阻、应用金属薄膜电阻的集成电路和集成电路制造方法
JP2020527859A (ja) * 2017-07-11 2020-09-10 日本テキサス・インスツルメンツ合同会社 ビア遅延層を用いる薄膜抵抗器のためのデバイス及び方法
CN113728448A (zh) * 2019-04-11 2021-11-30 微芯片技术股份有限公司 在集成电路器件中形成薄膜电阻器（tfr）
CN114730839A (zh) * 2020-02-27 2022-07-08 微芯片技术股份有限公司 使用电介质盖的湿法蚀刻形成于集成电路器件中的薄膜电阻器(tfr)
CN114730840A (zh) * 2020-03-02 2022-07-08 微芯片技术股份有限公司 使用氧化物盖层作为薄膜电阻器（tfr）蚀刻硬掩模在集成电路器件中形成tfr

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CN107516646A (zh) * 2016-06-15 2017-12-26 中芯国际集成电路制造(上海)有限公司 半导体器件的形成方法
US10037990B2 (en) * 2016-07-01 2018-07-31 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing interconnect layer and semiconductor device which includes interconnect layer
KR102402670B1 (ko) 2017-06-26 2022-05-26 삼성전자주식회사 저항 구조체를 포함하는 반도체 소자
US10354951B1 (en) * 2018-01-16 2019-07-16 Texas Instruments Incorporated Thin film resistor with punch-through vias
US10770393B2 (en) 2018-03-20 2020-09-08 International Business Machines Corporation BEOL thin film resistor
KR102460719B1 (ko) 2018-07-20 2022-10-31 삼성전자주식회사 반도체 소자 및 이의 제조 방법
KR102732300B1 (ko) * 2019-07-17 2024-11-19 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US11315876B2 (en) 2020-02-17 2022-04-26 Globalfoundries Singapore Pte. Ltd. Thin film conductive material with conductive etch stop layer
US11508500B2 (en) * 2020-02-28 2022-11-22 Microchip Technology Incorporated Thin film resistor (TFR) formed in an integrated circuit device using TFR cap layer(s) as an etch stop and/or hardmask
KR102737514B1 (ko) 2020-06-11 2024-12-05 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR102766491B1 (ko) 2020-08-27 2025-02-14 삼성전자주식회사 반도체 소자
US12414312B2 (en) * 2021-12-20 2025-09-09 International Business Machines Corporation Back-end-of-line thin film resistor
JPWO2024014473A1 (enExample) * 2022-07-15 2024-01-18
US12555705B2 (en) * 2024-07-15 2026-02-17 Globalfoundries Singapore Pte Ltd Thin film resistor with viabar structure

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CN101647075A (zh) * 2005-02-16 2010-02-10 国际商业机器公司 具有电流密度增强层的薄膜电阻
US20130334659A1 (en) * 2012-06-15 2013-12-19 Texas Instruments Incorporated Multiple Depth Vias In An Integrated Circuit

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US6734076B1 (en) 2003-03-17 2004-05-11 Texas Instruments Incorporated Method for thin film resistor integration in dual damascene structure
US7323751B2 (en) 2003-06-03 2008-01-29 Texas Instruments Incorporated Thin film resistor integration in a dual damascene structure
DE10341059B4 (de) * 2003-09-05 2007-05-31 Infineon Technologies Ag Integrierte Schaltungsanordnung mit Kondensator und Herstellungsverfahren
SE0302810D0 (sv) 2003-10-24 2003-10-24 Infineon Technologies Ag Monolithically integrated circuit comprising a thin film resistor, and fabrication method thereof
US7303972B2 (en) 2006-01-19 2007-12-04 International Business Machines Incorporated Integrated thin-film resistor with direct contact
JP5564749B2 (ja) * 2006-11-20 2014-08-06 富士電機株式会社 半導体装置、半導体集積回路、スイッチング電源用制御ｉｃおよびスイッチング電源装置
US8013394B2 (en) 2007-03-28 2011-09-06 International Business Machines Corporation Integrated circuit having resistor between BEOL interconnect and FEOL structure and related method
JP5446120B2 (ja) * 2008-04-23 2014-03-19 富士通セミコンダクター株式会社 半導体装置の製造方法及び半導体装置
JP5291991B2 (ja) * 2008-06-10 2013-09-18 株式会社日立製作所 半導体装置およびその製造方法
US8298902B2 (en) 2009-03-18 2012-10-30 International Business Machines Corporation Interconnect structures, methods for fabricating interconnect structures, and design structures for a radiofrequency integrated circuit
RU2474921C1 (ru) 2011-08-30 2013-02-10 Федеральное государственное унитарное предприятие "Научно-производственное предприятие "Исток" (ФГУП НПП "Исток") Интегральная схема свч
US8680618B2 (en) * 2011-10-17 2014-03-25 Texas Instruments Incorporated Structure and method for integrating front end SiCr resistors in HiK metal gate technologies
JP2013143521A (ja) * 2012-01-12 2013-07-22 Renesas Electronics Corp 半導体装置とその製造方法
JP2013187325A (ja) * 2012-03-07 2013-09-19 Seiko Instruments Inc 半導体装置
JP5850407B2 (ja) * 2012-04-12 2016-02-03 株式会社デンソー 半導体装置及び半導体装置の製造方法
US8803287B2 (en) * 2012-10-17 2014-08-12 Texas Instruments Deutschland Gmbh Electronic device comprising a semiconductor structure having an integrated circuit back end capacitor and thin film resistor and method of manufacturing the same

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CN101647075A (zh) * 2005-02-16 2010-02-10 国际商业机器公司 具有电流密度增强层的薄膜电阻
US20130334659A1 (en) * 2012-06-15 2013-12-19 Texas Instruments Incorporated Multiple Depth Vias In An Integrated Circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020527859A (ja) * 2017-07-11 2020-09-10 日本テキサス・インスツルメンツ合同会社 ビア遅延層を用いる薄膜抵抗器のためのデバイス及び方法
JP7216463B2 (ja) 2017-07-11 2023-02-01 テキサス インスツルメンツ インコーポレイテッド ビア遅延層を用いる薄膜抵抗器のためのデバイス及び方法
CN113728448A (zh) * 2019-04-11 2021-11-30 微芯片技术股份有限公司 在集成电路器件中形成薄膜电阻器（tfr）
CN113728448B (zh) * 2019-04-11 2024-09-06 微芯片技术股份有限公司 在集成电路器件中形成薄膜电阻器（tfr）
CN110993582A (zh) * 2019-10-31 2020-04-10 重庆中科渝芯电子有限公司 适用于多层金属布线的金属薄膜电阻、应用金属薄膜电阻的集成电路和集成电路制造方法
CN110993582B (zh) * 2019-10-31 2022-04-08 重庆中科渝芯电子有限公司 金属薄膜电阻、应用金属薄膜电阻的集成电路和制造方法
CN114730839A (zh) * 2020-02-27 2022-07-08 微芯片技术股份有限公司 使用电介质盖的湿法蚀刻形成于集成电路器件中的薄膜电阻器(tfr)
CN114730840A (zh) * 2020-03-02 2022-07-08 微芯片技术股份有限公司 使用氧化物盖层作为薄膜电阻器（tfr）蚀刻硬掩模在集成电路器件中形成tfr

Also Published As

Publication number Publication date
WO2015103394A2 (en) 2015-07-09
US10177214B2 (en) 2019-01-08
EP3090446A4 (en) 2017-08-16
US9502284B2 (en) 2016-11-22
WO2015103394A3 (en) 2015-11-12
JP2017502522A (ja) 2017-01-19
US20150187632A1 (en) 2015-07-02
US20170069708A1 (en) 2017-03-09
EP3090446A2 (en) 2016-11-09

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Application publication date: 20160817