CN105762112A - 薄膜晶体管阵列基板及其制备方法、显示装置 - Google Patents
薄膜晶体管阵列基板及其制备方法、显示装置 Download PDFInfo
- Publication number
- CN105762112A CN105762112A CN201610279966.2A CN201610279966A CN105762112A CN 105762112 A CN105762112 A CN 105762112A CN 201610279966 A CN201610279966 A CN 201610279966A CN 105762112 A CN105762112 A CN 105762112A
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- Prior art keywords
- thin
- layer
- film transistor
- drain electrode
- transistor array
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- 239000010409 thin film Substances 0.000 title claims abstract description 117
- 238000002360 preparation method Methods 0.000 title claims abstract description 52
- 239000000758 substrate Substances 0.000 title claims abstract description 21
- 239000010408 film Substances 0.000 claims abstract description 74
- 239000004065 semiconductor Substances 0.000 claims abstract description 63
- 238000000034 method Methods 0.000 claims abstract description 57
- 239000010410 layer Substances 0.000 claims description 157
- 229920002120 photoresistant polymer Polymers 0.000 claims description 71
- 238000005530 etching Methods 0.000 claims description 41
- 239000010949 copper Substances 0.000 claims description 34
- 239000011241 protective layer Substances 0.000 claims description 33
- 238000000059 patterning Methods 0.000 claims description 29
- 229910052802 copper Inorganic materials 0.000 claims description 26
- 238000009413 insulation Methods 0.000 claims description 25
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 24
- 239000000463 material Substances 0.000 claims description 24
- 239000007788 liquid Substances 0.000 claims description 23
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 22
- 239000010953 base metal Substances 0.000 claims description 13
- 238000002161 passivation Methods 0.000 claims description 10
- 238000003475 lamination Methods 0.000 claims description 8
- 238000001259 photo etching Methods 0.000 claims description 7
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 claims description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 2
- 239000002041 carbon nanotube Substances 0.000 claims description 2
- 229910021393 carbon nanotube Inorganic materials 0.000 claims description 2
- 239000000203 mixture Substances 0.000 abstract description 22
- 238000004519 manufacturing process Methods 0.000 abstract description 13
- 229910052751 metal Inorganic materials 0.000 abstract description 11
- 239000002184 metal Substances 0.000 abstract description 11
- 238000010030 laminating Methods 0.000 abstract 2
- 238000004904 shortening Methods 0.000 abstract 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 9
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 7
- 239000011651 chromium Substances 0.000 description 7
- 229910052725 zinc Inorganic materials 0.000 description 7
- 239000011701 zinc Substances 0.000 description 7
- 239000008367 deionised water Substances 0.000 description 6
- 229910021641 deionized water Inorganic materials 0.000 description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 5
- 229910052733 gallium Inorganic materials 0.000 description 5
- 229910052738 indium Inorganic materials 0.000 description 5
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 5
- 229910021645 metal ion Inorganic materials 0.000 description 5
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 150000001298 alcohols Chemical class 0.000 description 4
- -1 alkyl sulfonic acid Chemical compound 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 4
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 229910001195 gallium oxide Inorganic materials 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 238000003892 spreading Methods 0.000 description 4
- 239000003381 stabilizer Substances 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 4
- 229920001621 AMOLED Polymers 0.000 description 3
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 3
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 3
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 3
- LRHPLDYGYMQRHN-UHFFFAOYSA-N N-Butanol Chemical compound CCCCO LRHPLDYGYMQRHN-UHFFFAOYSA-N 0.000 description 3
- ZMANZCXQSJIPKH-UHFFFAOYSA-N Triethylamine Chemical compound CCN(CC)CC ZMANZCXQSJIPKH-UHFFFAOYSA-N 0.000 description 3
- 150000001412 amines Chemical class 0.000 description 3
- 229910001431 copper ion Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 3
- 238000001755 magnetron sputter deposition Methods 0.000 description 3
- 239000011733 molybdenum Substances 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- PAYRUJLWNCNPSJ-UHFFFAOYSA-N Aniline Chemical compound NC1=CC=CC=C1 PAYRUJLWNCNPSJ-UHFFFAOYSA-N 0.000 description 2
- 229910002535 CuZn Inorganic materials 0.000 description 2
- BAVYZALUXZFZLV-UHFFFAOYSA-N Methylamine Chemical compound NC BAVYZALUXZFZLV-UHFFFAOYSA-N 0.000 description 2
- 229910016027 MoTi Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 229910001069 Ti alloy Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- WGQKYBSKWIADBV-UHFFFAOYSA-N benzylamine Chemical compound NCC1=CC=CC=C1 WGQKYBSKWIADBV-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 150000001879 copper Chemical class 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- ZPZCREMGFMRIRR-UHFFFAOYSA-N molybdenum titanium Chemical compound [Ti].[Mo] ZPZCREMGFMRIRR-UHFFFAOYSA-N 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- IIACRCGMVDHOTQ-UHFFFAOYSA-N sulfamic acid Chemical compound NS(O)(=O)=O IIACRCGMVDHOTQ-UHFFFAOYSA-N 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- IMNIMPAHZVJRPE-UHFFFAOYSA-N triethylenediamine Chemical compound C1CN2CCN1CC2 IMNIMPAHZVJRPE-UHFFFAOYSA-N 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- QUSNBJAOOMFDIB-UHFFFAOYSA-N Ethylamine Chemical compound CCN QUSNBJAOOMFDIB-UHFFFAOYSA-N 0.000 description 1
- 229910001182 Mo alloy Inorganic materials 0.000 description 1
- 229910001257 Nb alloy Inorganic materials 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- WERYXYBDKMZEQL-UHFFFAOYSA-N butane-1,4-diol Chemical compound OCCCCO WERYXYBDKMZEQL-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- HCAJEUSONLESMK-UHFFFAOYSA-N cyclohexylsulfamic acid Chemical compound OS(=O)(=O)NC1CCCCC1 HCAJEUSONLESMK-UHFFFAOYSA-N 0.000 description 1
- DLTBAYKGXREKMW-UHFFFAOYSA-N cyclopropanesulfonic acid Chemical compound OS(=O)(=O)C1CC1 DLTBAYKGXREKMW-UHFFFAOYSA-N 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 150000004985 diamines Chemical class 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000002372 labelling Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- DTSBBUTWIOVIBV-UHFFFAOYSA-N molybdenum niobium Chemical compound [Nb].[Mo] DTSBBUTWIOVIBV-UHFFFAOYSA-N 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229920000768 polyamine Polymers 0.000 description 1
- BDERNNFJNOPAEC-UHFFFAOYSA-N propan-1-ol Chemical compound CCCO BDERNNFJNOPAEC-UHFFFAOYSA-N 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 150000005846 sugar alcohols Polymers 0.000 description 1
- JOXIMZWYDAKGHI-UHFFFAOYSA-N toluene-4-sulfonic acid Chemical compound CC1=CC=C(S(O)(=O)=O)C=C1 JOXIMZWYDAKGHI-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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Abstract
薄膜晶体管阵列基板的制备方法,包括:在衬底基板上形成栅极层、栅绝缘层、氧化物半导体层、源漏电极层。所述源漏电极层包括源电极和漏电极。形成源漏电极层包括:在所述氧化物半导体层上依次形成透明导电薄膜和第一金属薄膜的叠层,所述透明导电薄膜与所述氧化物半导体层接触;对所述透明导电薄膜和所述第一金属薄膜的叠层进行一次构图工艺形成所述源极、所述漏极以及与所述源极或所述漏极一体形成的像素电极。该方法可以节省一次构图工艺,缩短生产时间,降低生产成本。
Description
技术领域
本发明的实施例涉及一种薄膜晶体管阵列基板及其制备方法、显示装置。
背景技术
氧化物半导体薄膜晶体管具有高迁移率、稳定性好、制作工艺简单等优点,以铟镓锌氧化物(IGZO)为代表的氧化物半导体材料在薄膜晶体管液晶显示器(TFT-LCD)和主动矩阵有机发光二极体面板(AMOLED)等领域的应用非常广泛。
目前氧化物半导体薄膜晶体管的结构主要有刻蚀阻挡型、背沟道刻蚀型和共面型三种类型,制作背沟道刻蚀型金属氧化物IGZO的薄膜晶体管工艺流程比较简单,比刻蚀阻挡型少一次光刻工艺,可以减少设备的投资,提高生产效率,所以背沟道刻蚀型是现阶段研究的热点。
发明内容
本发明的实施例提供一种薄膜晶体管阵列基板及其制备方法、显示装置。在该薄膜晶体管阵列基板制备过程中,源漏电极层和包含像素电极的透明导电层通过一次构图工艺形成,同时该透明导电层还起到了防止金属离子向氧化物半导体中扩散的缓冲层的作用。相比于单独形成缓冲层的方法,该方法减少了一次构图工艺,缩短了生产时间,降低了生产成本,而且该方法还可以提高工艺精度和开口率。
本发明至少一实施例提供薄膜晶体管阵列基板的制备方法,包括:在衬底基板上形成栅极层、栅绝缘层、氧化物半导体层、源漏电极层。所述源漏电极层包括源电极和漏电极,且形成源漏电极层包括:在所述氧化物半导体层上依次形成透明导电薄膜和第一金属薄膜的叠层,所述透明导电薄膜与所述氧化物半导体层接触;对所述透明导电薄膜和所述第一金属薄膜的叠层进行一次构图工艺形成所述源极、所述漏极以及与所述源极或所述漏极一体形成的像素电极。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述第一金属薄膜的材料为铜基金属。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述铜基金属为铜、铜锌合金、铜镍合金或铜锌镍合金。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述透明导电薄膜的材料为ITO、IZO、GZO或碳纳米管。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述氧化物半导体层的材料为IGZO、IZO、ZnO或GZO。
例如,本发明一实施例提供的薄膜晶体管阵列基板的制备方法,还包括:在所述第一金属薄膜上形成保护层薄膜,对所述透明导电薄膜、所述第一金属薄膜和所述保护层薄膜进行一次构图工艺形成所述像素电极、所述源极、所述漏极和保护层。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述保护层薄膜为ITO、IZO、IGZO、GZO或碳纳米管导电性薄膜。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述一次构图工艺包括使用灰色调掩模或半色调掩模的光刻工艺。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述一次构图工艺包括:在所述第一金属薄膜上涂覆光刻胶;对所述光刻胶进行曝光、显影,形成光刻胶全保留区域、光刻胶半保留区域和光刻胶去除区域;采用第一次刻蚀工艺去除所述光刻胶去除区域的所述透明导电薄膜和所述第一金属薄膜;采用灰化工艺去除所述光刻胶半保留区域的光刻胶;采用第二次刻蚀工艺去除所述光刻胶半保留区域的第一金属薄膜,形成所述像素电极;剥离所述光刻胶全保留区域的光刻胶,形成所述源极和所述漏极。所述光刻胶全保留区域对应所述源极和所述漏极形成的区域,所述光刻胶半保留区域对应所述像素电极形成的区域,所述光刻胶去除区域为所述光刻胶全保留区域和所述光刻胶半保留区域之外的区域。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,在所述第一次刻蚀工艺中使用的第一刻蚀液和在所述第二次刻蚀工艺中使用的第二刻蚀液均包括双氧水,所述第一刻蚀液中双氧水的浓度大于所述第二刻蚀液中双氧水的浓度。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述薄膜晶体管为底栅型薄膜晶体管,在形成所述像素电极、所述源极、所述漏极之前,依次形成所述栅极层、所述栅绝缘层和所述氧化物半导体层。
例如,在本发明一实施例提供的薄膜晶体管阵列基板的制备方法中,所述薄膜晶体管为顶栅型薄膜晶体管,在形成所述像素电极、所述源极、所述漏极和所述保护层之前,形成所述氧化物半导体层;在形成所述像素电极、所述源极、所述漏极和所述氧化物半导体层之后,依次形成所述栅绝缘层、所述栅极层。
例如,本发明一实施例提供的薄膜晶体管阵列基板的制备方法,还包括,形成钝化层以覆盖所述像素电极、所述源极、所述漏极、所述栅极层、所述栅绝缘层和所述氧化物半导体层。
例如,本发明一实施例提供的薄膜晶体管阵列基板的制备方法,还包括,在所述钝化层上形成公共电极。
本发明至少一个实施例还提供一种薄膜晶体管阵列基板,包括:衬底基板;设置在所述衬底基板上的栅极层、栅绝缘层、氧化物半导体层;依次形成在所述氧化物半导体层上的透明导电层和源漏电极层,且所述透明导电层与所述氧化物半导体层接触。所述源漏电极层包括源电极和漏电极;所述透明导电层包括像素电极;所述源极、所述漏极以及所述像素电极通过一次构图工艺形成。
例如,在本发明一实施例提供的薄膜晶体管阵列基板中,所述源漏电极层的材料为铜基金属。
例如,在本发明一实施例提供的薄膜晶体管阵列基板中,所述氧化物半导体层的材料为IGZO、IZO、ZnO或GZO。
例如,在本发明一实施例提供的薄膜晶体管阵列基板中,该薄膜晶体管阵列基板还包括:设置在所述源极和所述漏极上的保护层,其中,所述保护层与所述像素电极、所述源极、所述漏极通过一次构图工艺形成。
本发明至少一个实施例还提供一种显示装置,包括上述实施例中任一项所述的薄膜晶体管阵列基板。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例,而非对本发明的限制。
图1为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的流程图;
图2为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法中一次构图工艺的流程图;
图3-图12为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的过程图;
图13为本发明一实施例提供的另一种制备方法制备的薄膜晶体管阵列基板;
图14为本发明一实施例提供的薄膜晶体管阵列基板。
附图标记:
101-衬底基板;102-栅极层;103-栅绝缘层;104-氧化物半导体层;1051-源极;1052-漏极;106-透明导电薄膜;107-第一金属薄膜;108-像素电极;109-保护层薄膜;1091-保护层;110-光刻胶;111-钝化层;112-公共电极;113-透明导电层。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例的附图,对本发明实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于所描述的本发明的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本发明保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
对于氧化物半导体薄膜晶体管,如果源漏电极层的材料为金属材料,尤其是铜基金属材料(例如铜或铜合金等),则在金属和氧化物半导体之间需要添加一层缓冲层,否则金属离子会向氧化物半导体中扩散,这样会严重影响薄膜晶体管的特性。
本发明至少一实施例提供一种薄膜晶体管阵列基板的制备方法以及用该制备方法制备的薄膜晶体管阵列基板、包含该薄膜晶体管阵列基板的显示装置。薄膜晶体管阵列基板的制备方法,包括:在衬底基板上形成栅极层、栅绝缘层、氧化物半导体层、源漏电极层,其中,源漏电极层包括源电极和漏电极,且形成源漏电极层包括:在氧化物半导体层上依次形成透明导电薄膜和第一金属薄膜的叠层,该透明导电薄膜与氧化物半导体层接触;对透明导电薄膜和第一金属薄膜的叠层进行一次构图工艺形成源极、漏极以及与源极或漏极一体形成的像素电极。
在该薄膜晶体管阵列基板制备过程中,源漏电极层和包含像素电极的透明导电层通过一次构图工艺形成,同时该透明导电层还起到了防止金属离子向氧化物半导体中扩散的缓冲层的作用。相比于单独制备缓冲层的方法,该方法减少了一次构图工艺,缩短了生产时间,降低了生产成本,而且在一些实施例中,该方法还可以用于提高工艺精度和开口率。该透明导电层包括像素电极所在的第一部分和防止金属离子向氧化物半导体中扩散的第二部分,这两部分同层、同步形成,不需要对位,提高了对位精度;在制备工艺中,不需要预留对位空间,可以用于提高开口率。
下面通过几个实施例进行说明。
实施例一
本实施例提供一种薄膜晶体管阵列基板的制备方法,例如,图1为薄膜晶体管阵列基板的制备方法的流程图,包括:在衬底基板上形成栅极层、栅绝缘层、氧化物半导体层、源漏电极层,其中,源漏电极层包括源电极和漏电极。这里,形成源漏电极层包括:在氧化物半导体层上依次形成透明导电薄膜和第一金属薄膜的叠层,该透明导电薄膜与氧化物半导体层接触;对透明导电薄膜和第一金属薄膜的叠层进行一次构图工艺形成源极、漏极以及与源极或漏极一体形成的像素电极。
例如,该第一金属薄膜的材料为铜(Cu)基金属。铜基金属具有电阻率低、导电性好的特点,因而可以提高源极、漏极的信号传输速率,提高显示质量。
例如,该铜基金属为铜(Cu)、铜锌合金(CuZn)、铜镍合金(CuNi)或铜锌镍合金(CuZnNi),或者其他性能稳定的铜基金属合金。
例如,该第一金属薄膜的厚度可以为200-400nm,例如,可以为200nm、230nm、250nm、300nm、350nm、380nm以及400nm。
例如,该透明导电薄膜的材料为氧化铟锡(ITO)、氧化铟锌(IZO)、氧化铟镓(IGO)、氧化镓锌(GZO)和碳纳米管等,该透明导电薄膜的材料还可以为氧化锌(ZnO)、氧化铟(In2O3)和氧化铝锌(AZO)等。
例如,该透明导电薄膜可以利用磁控溅射的方式沉积而成,其厚度可以为30-50nm,例如,可以为30nm、40nm或50nm。
例如,该氧化物半导体层的材料为氧化铟镓锌(IGZO)、氧化铟锌(IZO)、氧化锌(ZnO)或氧化镓锌(GZO)等。
例如,该氧化物半导体层可以利用磁控溅射的方式沉积而成,其厚度可以为30-50nm,例如,可以为30nm、40nm以及50nm。
例如,该一次构图工艺包括使用灰色调掩模或半色调掩模的光刻工艺。例如,图2为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法中的一次构图工艺的流程图,该一次构图工艺包括以下步骤:在第一金属薄膜上涂覆光刻胶;对该光刻胶进行曝光、显影,形成光刻胶全保留区域、光刻胶半保留区域和光刻胶去除区域;采用第一次刻蚀工艺去除光刻胶去除区域的透明导电薄膜和第一金属薄膜;采用灰化工艺去除光刻胶半保留区域的光刻胶;采用第二次刻蚀工艺去除光刻胶半保留区域的第一金属薄膜,形成像素电极;剥离光刻胶全保留区域的光刻胶,形成源极和漏极。这里,光刻胶全保留区域对应源极和漏极形成的区域,光刻胶半保留区域对应像素电极形成的区域,光刻胶去除区域为光刻胶全保留区域和光刻胶半保留区域之外的区域。
例如,在第一次刻蚀工艺中使用的第一刻蚀液和在第二次刻蚀工艺中使用的第二刻蚀液均包括双氧水,第一刻蚀液中双氧水的浓度大于第二刻蚀液中双氧水的浓度。例如,该第一刻蚀液和该第二刻蚀液的成分可以包括氟化氢(HF)、双氧水(H2O2)和去离子水(H2O)。例如,在第一刻蚀液中,H2O2的质量百分含量为20%、HF的质量百分含量为1%、去离子水的质量百分含量为79%;在第二刻蚀液中,H2O2的质量百分含量为10%、HF的质量百分含量为1%、去离子水的质量百分含量为89%。
例如,为了克服由于双氧水分解而造成的刻蚀速度不稳定、刻蚀不均匀的问题,该氟化氢/双氧水刻蚀液还可以包括质量百分含量为0.2%-1%的刻蚀液稳定剂。例如,该刻蚀液稳定剂包括:质量百分含量为3%-6%的醇类,例如5%的醇类,该醇类可以为一元醇、二元醇或多元醇,例如,甲醇、乙醇、丙醇、1,4-丁二醇、乙二醇、正丁醇等;质量百分含量为10%-15%的有机胺类,例如13%的有机胺类,例如该有机胺类可以为一元胺、二元胺及多元胺中的一种或多种,例如,甲胺、乙胺、苯胺、苄胺、三乙烯二胺、三乙胺等;质量百分含量为2%-5%的磺酸基化合物,例如5%的磺酸基化合物,例如烷基磺酸、芳基磺酸、胺基磺酸中的一种或多种,例如,环己烷磺酸、胺基磺酸、环丙烷磺酸、环己胺磺酸及对甲苯磺酸等;质量百分含量为40%-85%的水,例如77%的水,例如,去离子水。
例如,在第一刻蚀液中,H2O2的质量百分含量为20%、HF的质量百分含量为1%、去离子水的质量百分含量为78%、刻蚀液稳定剂的质量百分含量为1%;在第二刻蚀液中,H2O2的质量百分含量为10%、HF的质量百分含量为1%、去离子水的质量百分含量为88%、刻蚀液稳定剂的质量百分含量为1%。
例如,在一个示例中,在第一金属薄膜上还可以形成保护层薄膜,该保护层薄膜可以保护第一金属薄膜在后续工艺中不被氧化,从而保证其导电性能。提高由其形成的源极、漏极的信号传输速率,从而提高显示质量。
在该示例中,例如,依次连续沉积透明导电薄膜、第一金属薄膜和保护层薄膜,然后对该透明导电薄膜、第一金属薄膜和保护层薄膜进行一次构图工艺形成像素电极、源极、漏极和保护层的三层层叠结构。该一次构图工艺可以减少两次成膜和两次刻蚀。该方法防止了第一金属薄膜被氧化、防止了第一金属薄膜中的铜离子扩散至氧化物半导体层,同时还减少了生产时间,降低了生产成本,提高了工艺的精度和开口率。
例如,该保护层薄膜的材料为氧化铟锡(ITO)、氧化铟锌(IZO)、氧化铟镓锌(IGZO)、氧化镓锌(GZO)和碳纳米管等导电性材料。该保护层薄膜既要保证第一金属薄膜不被氧化,也要保证有一定的导电性性能,因为在刻蚀第一金属薄膜形成的过孔结构处需要被电性连接,所以要求在过孔结构上覆盖的保护层也具有导电性能。
例如,图3-图12为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的过程图。例如,以该薄膜晶体管阵列基板中的薄膜晶体管为底栅型薄膜晶体管为例加以说明。
例如,如图3所示,在形成像素电极、源极、漏极之前,在衬底基板101上依次形成栅极层102、栅绝缘层103和氧化物半导体层104,例如,其形成过程如下所述。
在衬底基板101上沉积栅金属层(未示出),在该栅金属层上涂覆一层光刻胶(未示出),并进行曝光、显影、刻蚀和剥离光刻胶等过程形成栅极层102的图案。
然后,在形成有栅极层102的衬底基板101上沉积栅绝缘层薄膜,在该栅绝缘层薄膜上涂覆一层光刻胶(未示出),并进行曝光、显影、刻蚀和剥离光刻胶等过程形成栅绝缘层103的图案。
在形成有栅极层102栅绝缘层103的衬底基板101上沉积氧化物半导体层薄膜,在该氧化物半导体层薄膜上涂覆一层光刻胶(未示出),并进行曝光、显影、刻蚀和剥离光刻胶等过程形成氧化物半导体层104的图案。
例如,该栅金属层的材料可以为铜与其他金属的组合,例如,铜/钼(Cu/Mo)、铜/钛(Cu/Ti)、铜/钼钛合金(Cu/MoTi)、铜/钼钨合金(Cu/MoW)、铜/钼铌合金(Cu/MoNb)等;该栅金属层的材料也可以为铬基金属或铬与其他金属的组合,例如,铬/钼(Cr/Mo)、铬/钛(Cr/Ti)、铬/钼钛合金(Cr/MoTi)等。
例如,被用作栅绝缘层薄膜的材料包括氮化硅(SiNx)、氧化硅(SiOx)、氧化铝(Al2O3)、氮化铝(AlN)或其他适合的材料。
例如,光刻胶的涂覆可以采用旋涂、刮涂或者辊涂的方式。
例如,如图4所示,在依次形成有栅极层102、栅绝缘层103和氧化物半导体层104的衬底基板101上依次沉积透明导电薄膜106、第一金属薄膜107和保护层薄膜109。
例如,如图5所示,在保护层薄膜109上涂覆光刻胶110。
例如,如图6所示,对该光刻胶110进行曝光、显影,形成光刻胶全保留区域、光刻胶半保留区域和光刻胶去除区域。
例如,如图7所示,采用第一次刻蚀工艺去除光刻胶去除区域的透明导电薄膜106、第一金属薄膜107和保护层薄膜109。
例如,如图8所示,采用灰化工艺去除光刻胶半保留区域的光刻胶,同时光刻胶全保留区域的光刻胶的厚度也变薄。
例如,如图9所示,采用第二次刻蚀工艺去除光刻胶半保留区域的保护层薄膜109和第一金属薄膜107,形成像素电极108。
例如,如图10所示,剥离光刻胶全保留区域的光刻胶110,形成源极1051、漏极1052和保护层1091。
例如,光刻胶全保留区域对应源极1051和漏极1052形成的区域,光刻胶半保留区域对应像素电极108形成的区域,光刻胶去除区域为光刻胶全保留区域和光刻胶半保留区域之外的区域。
例如,如图11所示,本实施例中薄膜晶体管阵列基板的制备方法,还包括形成钝化层111以覆盖像素电极108、源极1051、漏极1052、栅极层102、栅绝缘层103和氧化物半导体层104。该钝化层111可以起到保护和绝缘的作用。例如,该钝化层111的材料可以为氮化硅(SiNx)、氧化硅(SiOx)、丙烯酸类树脂等。
例如,如图12所示,本实施例中薄膜晶体管阵列基板的制备方法,还包括在钝化层111上形成公共电极112。该公共电极112也可以在之前形成栅极层、源极等步骤中形成。在工作过程中,给公共电极112施加电压可以和像素电极108形成电容,让液晶分子偏转。在形成该公共电极的同时,还可以形成连接过孔结构处等断开的电路的连接电路等结构。
例如,该薄膜晶体管阵列基板中的薄膜晶体管为顶栅型薄膜晶体管,在形成像素电极、源极、漏极和保护层之前,形成氧化物半导体层;在形成像素电极、源极、漏极和氧化物半导体层之后,依次形成栅绝缘层、栅极层。
例如,如图13所示,该薄膜晶体管阵列基板中的薄膜晶体管为顶栅型薄膜晶体管。在衬底基板101上形成氧化物半导体层104,在氧化物半导体层104上形成像素电极108、源极1051、漏极1052、栅绝缘层103、栅极层102、钝化层111和公共电极112。各层结构的具体形成过程可参见上述底栅型薄膜晶体管阵列基板,在此不再赘述。
实施例二
本实施例提供一种薄膜晶体管阵列基板,该薄膜晶体管阵列基板采用本发明实施例一中的薄膜晶体管阵列基板的制备方法制备,例如,图14为本发明一实施例提供的薄膜晶体管阵列基板。该薄膜晶体管阵列基板包括:衬底基板101;设置在衬底基板101上的栅极层102、栅绝缘层103、氧化物半导体层104;依次形成在氧化物半导体层104上的透明导电层113和源漏电极层,且透明导电层113与氧化物半导体层104接触;其中,源漏电极层包括源电极1051和漏电极1052;透明导电层113包括像素电极108;源极1051、漏极1052以及像素电极108通过一次构图工艺形成。
例如,该薄膜晶体管阵列基板101中的薄膜晶体管可以是底栅型薄膜晶体管或顶栅型薄膜晶体管。
例如,该源漏电极层的材料为铜基金属。铜金属具有电阻率低、导电性好的特点,因而可以提高源极、漏极的信号传输速率,提高显示质量。
例如,该铜基金属为铜(Cu)、铜锌合金(CuZn)、铜镍合金(CuNi)或铜锌镍合金(CuZnNi)等性能稳定的铜基金属合金。
例如,该源漏电极层的厚度可以为200-400nm,例如,可以为200nm、230nm、250nm、300nm、350nm、380nm以及400nm。
例如,该氧化物半导体层104的材料为氧化铟镓锌(IGZO)、氧化铟锌(IZO)、氧化锌(ZnO)或氧化镓锌(GZO)等。
例如,该氧化物半导体层104可以利用磁控溅射的方式沉积而成,其厚度可以为30-50nm,例如,可以为30nm、40nm以及50nm。
例如,如图14所示,该薄膜晶体管阵列基板还包括:设置在源极1051和漏极1052上的保护层1091,其中,该保护层1091与该像素电极108、源极1051、漏极1052通过一次构图工艺形成,即形成像素电极108、源极1051、漏极1052和保护层1091的三层层叠结构,该一次构图工艺可以减少两次成膜和两次刻蚀。该三层层叠结构防止了第一金属薄膜被氧化、防止了第一金属薄膜中的铜离子扩散至氧化物半导体层,同时还减少了生产时间,降低了生产成本,提高了工艺的精度和开口率。
实施例三
本实施例提供一种显示装置,包括实施例二中的薄膜晶体管阵列基板。该显示装置可以为:液晶面板、电子纸、OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
综上所述,本发明的实施例提供一种薄膜晶体管阵列基板及其制备方法、显示装置。在该薄膜晶体管阵列基板制备过程中,源漏电极层和包含像素电极的透明导电层通过一次构图工艺形成,同时该透明导电层还起到了防止金属离子(尤其是铜离子)向氧化物半导体中扩散的作用。相比于独立形成缓冲层的方法,该方法减少了一次构图工艺,缩短了生产时间,降低了生产成本,提高了工艺精度和开口率。
有以下几点需要说明:
(1)本发明实施例附图只涉及到与本发明实施例涉及到的结构,其他结构可参考通常设计。
(2)为了清晰起见,在用于描述本发明的实施例的附图中,层或区域的厚度被放大或缩小,即这些附图并非按照实际的比例绘制。可以理解,当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。
(3)在不冲突的情况下,本发明的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,本发明的保护范围应以所述权利要求的保护范围为准。
Claims (19)
1.一种薄膜晶体管阵列基板的制备方法,包括:
在衬底基板上形成栅极层、栅绝缘层、氧化物半导体层、源漏电极层,其中,所述源漏电极层包括源电极和漏电极,且
形成源漏电极层包括:
在所述氧化物半导体层上依次形成透明导电薄膜和第一金属薄膜的叠层,所述透明导电薄膜与所述氧化物半导体层接触;
对所述透明导电薄膜和所述第一金属薄膜的叠层进行一次构图工艺形成所述源极、所述漏极以及与所述源极或所述漏极一体形成的像素电极。
2.根据权利要求1所述的薄膜晶体管阵列基板的制备方法,其中,所述第一金属薄膜的材料为铜基金属。
3.根据权利要求2所述的薄膜晶体管阵列基板的制备方法,其中,所述铜基金属为铜、铜锌合金、铜镍合金或铜锌镍合金。
4.根据权利要求1所述的薄膜晶体管阵列基板的制备方法,其中,所述透明导电薄膜的材料为ITO、IZO、GZO或碳纳米管。
5.根据权利要求1所述的薄膜晶体管阵列基板的制备方法,其中,所述氧化物半导体层的材料为IGZO、IZO、ZnO或GZO。
6.根据权利要求1所述的薄膜晶体管阵列基板的制备方法,还包括:
在所述第一金属薄膜上形成保护层薄膜,对所述透明导电薄膜、所述第一金属薄膜和所述保护层薄膜进行一次构图工艺以形成所述像素电极、所述源极、所述漏极和保护层。
7.根据权利要求6所述的薄膜晶体管阵列基板的制备方法,其中,所述保护层薄膜为ITO、IZO、IGZO、GZO或碳纳米管导电性薄膜。
8.根据权利要求1所述的薄膜晶体管阵列基板的制备方法,其中,所述一次构图工艺包括使用灰色调掩模或半色调掩模的光刻工艺。
9.根据权利要求8所述的薄膜晶体管阵列基板的制备方法,其中,所述一次构图工艺包括:
在所述第一金属薄膜上涂覆光刻胶;
对所述光刻胶进行曝光、显影,形成光刻胶全保留区域、光刻胶半保留区域和光刻胶去除区域;
采用第一次刻蚀工艺去除所述光刻胶去除区域的所述透明导电薄膜和所述第一金属薄膜;
采用灰化工艺去除所述光刻胶半保留区域的光刻胶;
采用第二次刻蚀工艺去除所述光刻胶半保留区域的第一金属薄膜,形成所述像素电极;
剥离所述光刻胶全保留区域的光刻胶,形成所述源极和所述漏极;
其中,所述光刻胶全保留区域对应所述源极和所述漏极形成的区域,所述光刻胶半保留区域对应所述像素电极形成的区域,所述光刻胶去除区域为所述光刻胶全保留区域和所述光刻胶半保留区域之外的区域。
10.根据权利要求9所述的薄膜晶体管阵列基板的制备方法,其中,
在所述第一次刻蚀工艺中使用的第一刻蚀液和在所述第二次刻蚀工艺中使用的第二刻蚀液均包括双氧水,且所述第一刻蚀液中双氧水的浓度大于所述第二刻蚀液中双氧水的浓度。
11.根据权利要求10所述的薄膜晶体管阵列基板的制备方法,其中,所述薄膜晶体管为底栅型薄膜晶体管,在形成所述像素电极、所述源极、所述漏极之前,依次形成所述栅极层、所述栅绝缘层和所述氧化物半导体层。
12.根据权利要求10所述的薄膜晶体管阵列基板的制备方法,其中,所述薄膜晶体管为顶栅型薄膜晶体管,在形成所述像素电极、所述源极、所述漏极和所述保护层之前,形成所述氧化物半导体层;在形成所述像素电极、所述源极、所述漏极和所述氧化物半导体层之后,依次形成所述栅绝缘层、所述栅极层。
13.根据权利要求11或12所述的薄膜晶体管阵列基板的制备方法,还包括:
形成钝化层以覆盖所述像素电极、所述源极、所述漏极、所述栅极层、所述栅绝缘层和所述氧化物半导体层。
14.根据权利要求13所述的薄膜晶体管阵列基板的制备方法,还包括:
在所述钝化层上形成公共电极。
15.一种薄膜晶体管阵列基板,包括:
衬底基板;
设置在所述衬底基板上的栅极层、栅绝缘层、氧化物半导体层;
依次形成在所述氧化物半导体层上的透明导电层和源漏电极层,且所述透明导电层与所述氧化物半导体层接触;
其中,所述源漏电极层包括源电极和漏电极,所述透明导电层包括像素电极,所述源极、所述漏极以及所述像素电极通过一次构图工艺形成。
16.根据权利要求15所述的薄膜晶体管阵列基板,其中,所述源漏电极层的材料为铜基金属。
17.根据权利要求16所述的薄膜晶体管阵列基板,其中,所述氧化物半导体层的材料为IGZO、IZO、ZnO或GZO。
18.根据权利要求15所述的薄膜晶体管阵列基板,还包括:设置在所述源极和所述漏极上的保护层,其中,所述保护层与所述像素电极、所述源极、所述漏极通过一次构图工艺形成。
19.一种显示装置,包括权利要求15-18任一项所述的薄膜晶体管阵列基板。
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