CN105745752B - 基板中的嵌入式桥接结构 - Google Patents

基板中的嵌入式桥接结构 Download PDF

Info

Publication number
CN105745752B
CN105745752B CN201480060242.8A CN201480060242A CN105745752B CN 105745752 B CN105745752 B CN 105745752B CN 201480060242 A CN201480060242 A CN 201480060242A CN 105745752 B CN105745752 B CN 105745752B
Authority
CN
China
Prior art keywords
substrate
dielectric layer
interconnects
group
embedded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201480060242.8A
Other languages
English (en)
Chinese (zh)
Other versions
CN105745752A (zh
Inventor
C-K·金
O·J·比奇厄
D·W·金
H·B·蔚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN105745752A publication Critical patent/CN105745752A/zh
Application granted granted Critical
Publication of CN105745752B publication Critical patent/CN105745752B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN201480060242.8A 2013-10-30 2014-10-28 基板中的嵌入式桥接结构 Active CN105745752B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/067,677 US9642259B2 (en) 2013-10-30 2013-10-30 Embedded bridge structure in a substrate
US14/067,677 2013-10-30
PCT/US2014/062683 WO2015066047A1 (en) 2013-10-30 2014-10-28 Embedded bridge structure in a substrate

Publications (2)

Publication Number Publication Date
CN105745752A CN105745752A (zh) 2016-07-06
CN105745752B true CN105745752B (zh) 2019-03-12

Family

ID=51866362

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480060242.8A Active CN105745752B (zh) 2013-10-30 2014-10-28 基板中的嵌入式桥接结构

Country Status (5)

Country Link
US (1) US9642259B2 (enExample)
EP (1) EP3063790B1 (enExample)
JP (1) JP6271004B2 (enExample)
CN (1) CN105745752B (enExample)
WO (1) WO2015066047A1 (enExample)

Families Citing this family (77)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9147663B2 (en) 2013-05-28 2015-09-29 Intel Corporation Bridge interconnection with layered interconnect structures
EP3058586B1 (en) 2013-10-16 2020-11-11 Intel Corporation Integrated circuit package substrate
US9275955B2 (en) * 2013-12-18 2016-03-01 Intel Corporation Integrated circuit package with embedded bridge
US9583426B2 (en) 2014-11-05 2017-02-28 Invensas Corporation Multi-layer substrates suitable for interconnection between circuit modules
US10074630B2 (en) * 2015-04-14 2018-09-11 Amkor Technology, Inc. Semiconductor package with high routing density patch
US9595494B2 (en) 2015-05-04 2017-03-14 Qualcomm Incorporated Semiconductor package with high density die to die connection and method of making the same
US10283492B2 (en) 2015-06-23 2019-05-07 Invensas Corporation Laminated interposers and packages with embedded trace interconnects
US9368450B1 (en) * 2015-08-21 2016-06-14 Qualcomm Incorporated Integrated device package comprising bridge in litho-etchable layer
US10163856B2 (en) * 2015-10-30 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Stacked integrated circuit structure and method of forming
US9852994B2 (en) * 2015-12-14 2017-12-26 Invensas Corporation Embedded vialess bridges
WO2017111959A1 (en) * 2015-12-22 2017-06-29 Intel Corporation Projecting contacts and method for making the same
WO2017111950A1 (en) * 2015-12-22 2017-06-29 Intel Corporation Electronic assembly that includes a bridge
CN109087908B (zh) * 2015-12-31 2020-10-27 华为技术有限公司 封装结构、电子设备及封装方法
KR102473408B1 (ko) * 2016-03-29 2022-12-02 삼성전기주식회사 인쇄회로기판 및 그 제조방법
KR101966328B1 (ko) * 2016-03-29 2019-04-05 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US20170287838A1 (en) * 2016-04-02 2017-10-05 Intel Corporation Electrical interconnect bridge
US10276403B2 (en) * 2016-06-15 2019-04-30 Avago Technologies International Sales Pe. Limited High density redistribution layer (RDL) interconnect bridge using a reconstituted wafer
EP3479398B1 (en) * 2016-07-01 2025-02-19 Intel Corporation Molded embedded bridge for enhanced emib applications
US20180005944A1 (en) * 2016-07-02 2018-01-04 Intel Corporation Substrate with sub-interconnect layer
US10283688B2 (en) * 2016-08-22 2019-05-07 Nichia Corporation Light emitting device
CN109830442A (zh) * 2016-10-24 2019-05-31 华为技术有限公司 一种封装基板及其制作方法、集成电路芯片
US11625523B2 (en) 2016-12-14 2023-04-11 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips
TWI892242B (zh) * 2016-12-14 2025-08-01 成真股份有限公司 標準大宗商品化現場可編程邏輯閘陣列(fpga)積體電路晶片組成之邏輯驅動器
US20190311983A1 (en) * 2016-12-27 2019-10-10 Intel Corporation Stacking multiple dies having dissimilar interconnect structure layout and pitch
KR20180086804A (ko) 2017-01-23 2018-08-01 앰코 테크놀로지 인코포레이티드 반도체 디바이스 및 그 제조 방법
US10943869B2 (en) * 2017-06-09 2021-03-09 Apple Inc. High density interconnection using fanout interposer chiplet
US10447274B2 (en) 2017-07-11 2019-10-15 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells
US20190019776A1 (en) * 2017-07-11 2019-01-17 Texas Instruments Incorporated Structures and methods for capacitive isolation devices
US10957679B2 (en) 2017-08-08 2021-03-23 iCometrue Company Ltd. Logic drive based on standardized commodity programmable logic semiconductor IC chips
US10622311B2 (en) * 2017-08-10 2020-04-14 International Business Machines Corporation High-density interconnecting adhesive tape
US10630296B2 (en) 2017-09-12 2020-04-21 iCometrue Company Ltd. Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells
US10957672B2 (en) * 2017-11-13 2021-03-23 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and method of manufacturing the same
US10651126B2 (en) * 2017-12-08 2020-05-12 Applied Materials, Inc. Methods and apparatus for wafer-level die bridge
US10163798B1 (en) 2017-12-22 2018-12-25 Intel Corporation Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same
US11569173B2 (en) * 2017-12-29 2023-01-31 Intel Corporation Bridge hub tiling architecture
US10608642B2 (en) 2018-02-01 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile radom access memory cells
US10623000B2 (en) 2018-02-14 2020-04-14 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
TWI670824B (zh) * 2018-03-09 2019-09-01 欣興電子股份有限公司 封裝結構
US10580738B2 (en) * 2018-03-20 2020-03-03 International Business Machines Corporation Direct bonded heterogeneous integration packaging structures
US11373951B2 (en) 2018-03-27 2022-06-28 Intel Corporation Via structures having tapered profiles for embedded interconnect bridge substrates
US10872862B2 (en) * 2018-03-29 2020-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure having bridge structure for connection between semiconductor dies and method of fabricating the same
US10742217B2 (en) 2018-04-12 2020-08-11 Apple Inc. Systems and methods for implementing a scalable system
US12476637B2 (en) 2018-05-24 2025-11-18 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US10608638B2 (en) 2018-05-24 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US11309334B2 (en) 2018-09-11 2022-04-19 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
US11114308B2 (en) 2018-09-25 2021-09-07 International Business Machines Corporation Controlling of height of high-density interconnection structure on substrate
US10937762B2 (en) 2018-10-04 2021-03-02 iCometrue Company Ltd. Logic drive based on multichip package using interconnection bridge
US11616046B2 (en) 2018-11-02 2023-03-28 iCometrue Company Ltd. Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip
US11211334B2 (en) 2018-11-18 2021-12-28 iCometrue Company Ltd. Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip
KR102615197B1 (ko) * 2018-11-23 2023-12-18 삼성전자주식회사 반도체 패키지
US11735533B2 (en) * 2019-06-11 2023-08-22 Intel Corporation Heterogeneous nested interposer package for IC chips
US11646274B2 (en) * 2019-06-18 2023-05-09 Intel Corporation Multi-package assemblies having foam structures for warpage control
US10985154B2 (en) 2019-07-02 2021-04-20 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cryptography circuits
US11227838B2 (en) 2019-07-02 2022-01-18 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cooperating or supporting circuits
US11887930B2 (en) 2019-08-05 2024-01-30 iCometrue Company Ltd. Vertical interconnect elevator based on through silicon vias
US11532580B2 (en) * 2019-08-29 2022-12-20 Taiwan Semiconductor Manufacturing Company Ltd. Interconnect structure, semiconductor structure including interconnect structure and method for forming the same
US11637056B2 (en) 2019-09-20 2023-04-25 iCometrue Company Ltd. 3D chip package based on through-silicon-via interconnection elevator
US11600526B2 (en) 2020-01-22 2023-03-07 iCometrue Company Ltd. Chip package based on through-silicon-via connector and silicon interconnection bridge
US11444019B2 (en) * 2020-04-06 2022-09-13 Qualcomm Incorporated Package comprising a substrate with interconnect routing over solder resist layer and an integrated device coupled to the substrate and method for manufacturing the package
CN114078803B (zh) * 2020-08-20 2025-06-24 欣兴电子股份有限公司 芯片封装结构
US12355000B2 (en) 2020-11-10 2025-07-08 Qualcomm Incorporated Package comprising a substrate and a high-density interconnect integrated device
KR102867027B1 (ko) * 2020-11-13 2025-10-01 삼성전기주식회사 연결구조체 내장기판
IT202100001637A1 (it) * 2021-01-27 2022-07-27 St Microelectronics Srl Sistema elettronico incapsulato formato da piastrine accoppiate elettricamente e isolate galvanicamente
US12469811B2 (en) 2021-03-26 2025-11-11 Qualcomm Incorporated Package comprising wire bonds coupled to integrated devices
KR20220135442A (ko) * 2021-03-30 2022-10-07 삼성전기주식회사 연결구조체 내장기판 및 이를 포함하는 기판구조체
US12176278B2 (en) 2021-05-30 2024-12-24 iCometrue Company Ltd. 3D chip package based on vertical-through-via connector
US20230035627A1 (en) * 2021-07-27 2023-02-02 Qualcomm Incorporated Split die integrated circuit (ic) packages employing die-to-die (d2d) connections in die-substrate standoff cavity, and related fabrication methods
US11848272B2 (en) 2021-08-16 2023-12-19 International Business Machines Corporation Interconnection between chips by bridge chip
KR20230032040A (ko) * 2021-08-30 2023-03-07 삼성전기주식회사 인쇄회로기판
US12268012B2 (en) 2021-09-24 2025-04-01 iCometrue Company Ltd. Multi-output look-up table (LUT) for use in coarse-grained field-programmable-gate-array (FPGA) integrated-circuit (IC) chip
KR20230089156A (ko) * 2021-12-13 2023-06-20 삼성전기주식회사 브리지를 포함하는 기판 및 전자 장치
US12328820B2 (en) 2022-03-14 2025-06-10 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and a semiconductor package including the same
US20240213217A1 (en) * 2022-12-21 2024-06-27 International Business Machines Corporation Clustering fine pitch micro-bumps for packaging and test
US12482755B2 (en) 2023-05-30 2025-11-25 STATS ChipPAC Pte. Ltd. Semiconductor device and method of making an interconnect bridge with integrated passive devices
CN116884947B (zh) * 2023-09-05 2024-01-23 长电集成电路(绍兴)有限公司 半导体封装结构及其制备方法
US20250098066A1 (en) * 2023-09-19 2025-03-20 Qualcomm Incorporated Package comprising a substrate with an interconnect block
US20250336830A1 (en) * 2024-04-25 2025-10-30 Avago Technologies International Sales Pte. Limited Die-to-die links using substrate and method of making

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101960589A (zh) * 2008-03-31 2011-01-26 英特尔公司 包含用于高密度互连的硅贴片的微电子封装及其制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4581768B2 (ja) 2005-03-16 2010-11-17 ソニー株式会社 半導体装置の製造方法
JP2008091638A (ja) 2006-10-02 2008-04-17 Nec Electronics Corp 電子装置およびその製造方法
JP4978269B2 (ja) 2007-03-27 2012-07-18 日本電気株式会社 多層配線基板
US7863096B2 (en) 2008-07-17 2011-01-04 Fairchild Semiconductor Corporation Embedded die package and process flow using a pre-molded carrier
US8227904B2 (en) 2009-06-24 2012-07-24 Intel Corporation Multi-chip package and method of providing die-to-die interconnects in same
US8654538B2 (en) 2010-03-30 2014-02-18 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
JP5645592B2 (ja) * 2010-10-21 2014-12-24 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8736065B2 (en) * 2010-12-22 2014-05-27 Intel Corporation Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same
US9059179B2 (en) 2011-12-28 2015-06-16 Broadcom Corporation Semiconductor package with a bridge interposer
US8946900B2 (en) * 2012-10-31 2015-02-03 Intel Corporation X-line routing for dense multi-chip-package interconnects
US9236366B2 (en) 2012-12-20 2016-01-12 Intel Corporation High density organic bridge device and method
US8901748B2 (en) 2013-03-14 2014-12-02 Intel Corporation Direct external interconnect for embedded interconnect bridge package

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101960589A (zh) * 2008-03-31 2011-01-26 英特尔公司 包含用于高密度互连的硅贴片的微电子封装及其制造方法

Also Published As

Publication number Publication date
WO2015066047A1 (en) 2015-05-07
EP3063790A1 (en) 2016-09-07
US20150116965A1 (en) 2015-04-30
US9642259B2 (en) 2017-05-02
JP2016536787A (ja) 2016-11-24
CN105745752A (zh) 2016-07-06
JP6271004B2 (ja) 2018-01-31
EP3063790B1 (en) 2018-06-13

Similar Documents

Publication Publication Date Title
CN105745752B (zh) 基板中的嵌入式桥接结构
CN107636813B (zh) 具有高密度管芯至管芯连接的半导体封装及其制造方法
CN105493278B (zh) 用于基板的超细间距和间隔互连
US9006912B2 (en) Printed circuit board with coextensive electrical connectors and contact pad areas
US7872483B2 (en) Circuit board having bypass pad
CN107078101A (zh) 在封装层中包括硅桥接的集成器件封装
JP6980530B2 (ja) 相互接続のスタックと、はんだレジスト層上の相互接続と、基板の側面部分上の相互接続とを備える基板
CN109216314A (zh) 具有穿硅过孔的嵌入式桥接器
CN107735860A (zh) 包括电容器、重分布层、和分立同轴连接的封装基板
CN107004612B (zh) 在基板与管芯之间包括光敏填料的集成器件封装
CN106165093B (zh) 包括表面互连和包含无电镀填充物的空腔的封装基板
WO2016018950A1 (en) PACKAGE ON PACKAGE (PoP) INTEGRATED DEVICE COMPRISING A PLURALITY OF SOLDER RESIST LAYERS
CN111902935A (zh) 在玻璃芯基板上的集成磁芯电感器
CN107112310B (zh) 包括高性能封装间连接的层叠封装(pop)器件
JP2016514909A (ja) 酸化層を備える低コストインターポーザ
CN105009693B (zh) 具有细间距迹线上的测试焊盘的封装基板
KR100923501B1 (ko) 패키지 기판 제조방법
CN108461405A (zh) 线路载板及其制造方法
CN116249259A (zh) 电路板结构及其制造方法
CN105789072B (zh) 一种面阵列无引脚csp封装件及其制造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant