CN105738791B - 半导体设备 - Google Patents

半导体设备 Download PDF

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Publication number
CN105738791B
CN105738791B CN201510983011.0A CN201510983011A CN105738791B CN 105738791 B CN105738791 B CN 105738791B CN 201510983011 A CN201510983011 A CN 201510983011A CN 105738791 B CN105738791 B CN 105738791B
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CN
China
Prior art keywords
test
semiconductor device
information
register
section
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Expired - Fee Related
Application number
CN201510983011.0A
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English (en)
Chinese (zh)
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CN105738791A (zh
Inventor
熊本明仁
西前和生
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Synaptics Inc
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Japan Ltd Co
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Publication of CN105738791A publication Critical patent/CN105738791A/zh
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Publication of CN105738791B publication Critical patent/CN105738791B/zh
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31724—Test controller, e.g. BIST state machine
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)
CN201510983011.0A 2014-12-26 2015-12-24 半导体设备 Expired - Fee Related CN105738791B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014-263772 2014-12-26
JP2014263772A JP6420139B2 (ja) 2014-12-26 2014-12-26 半導体デバイス

Publications (2)

Publication Number Publication Date
CN105738791A CN105738791A (zh) 2016-07-06
CN105738791B true CN105738791B (zh) 2020-05-26

Family

ID=56163863

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510983011.0A Expired - Fee Related CN105738791B (zh) 2014-12-26 2015-12-24 半导体设备

Country Status (3)

Country Link
US (1) US9837027B2 (enExample)
JP (1) JP6420139B2 (enExample)
CN (1) CN105738791B (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102703487B1 (ko) * 2018-08-03 2024-09-06 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
US12204782B2 (en) * 2023-06-20 2025-01-21 Stmicroelectronics International N.V. Communication logic to enhance area effectiveness for memory repair mechanism

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1534304A (zh) * 2003-02-14 2004-10-06 富士通株式会社 半导体测试电路、半导体存储器件和半导体测试方法
CN1654973A (zh) * 2005-03-04 2005-08-17 清华大学 采用加权扫描选通信号的基于扫描的自测试结构及方法
CN1692285A (zh) * 2002-12-20 2005-11-02 富士通株式会社 半导体装置及其检验方法
CN104122497A (zh) * 2014-08-11 2014-10-29 中国科学院自动化研究所 集成电路内建自测试所需测试向量的生成电路及方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
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JP3526019B2 (ja) * 1999-11-30 2004-05-10 インターナショナル・ビジネス・マシーンズ・コーポレーション 画像表示システム、画像表示装置、および画像表示方法
US6728798B1 (en) * 2000-07-28 2004-04-27 Micron Technology, Inc. Synchronous flash memory with status burst output
JP2003044315A (ja) * 2001-07-31 2003-02-14 Matsushita Electric Ind Co Ltd 半導体集積回路用デバッグ回路、および、半導体集積回路のデバッグ方法
JP2003271413A (ja) * 2002-03-15 2003-09-26 Ricoh Co Ltd 半導体集積回路
JP2003315423A (ja) 2002-04-26 2003-11-06 Hitachi Ltd 半導体集積回路
JP2006139485A (ja) * 2004-11-11 2006-06-01 Denso Corp コンピュータ制御装置
US7308534B2 (en) * 2005-01-13 2007-12-11 Hitachi, Ltd. Apparatus and method for managing a plurality of kinds of storage devices
JP4450787B2 (ja) * 2005-11-28 2010-04-14 株式会社ルネサステクノロジ 半導体集積回路装置
JP2008216980A (ja) * 2007-02-08 2008-09-18 Nec Electronics Corp ドライバ
JP2008269669A (ja) * 2007-04-17 2008-11-06 Renesas Technology Corp 半導体装置及びデータ処理システム
KR20090061247A (ko) * 2007-12-11 2009-06-16 삼성전자주식회사 디지털 방송 수신 장치의 ｏｓｄ 인터페이스
US8327066B2 (en) * 2008-09-30 2012-12-04 Samsung Electronics Co., Ltd. Method of managing a solid state drive, associated systems and implementations
JP2011154547A (ja) * 2010-01-27 2011-08-11 Toshiba Corp メモリ管理装置及びメモリ管理方法
US8819507B2 (en) * 2010-05-10 2014-08-26 Raytheon Company Field programmable gate arrays with built-in self test mechanisms
TW201234335A (en) * 2011-02-10 2012-08-16 Novatek Microelectronics Corp Display controller driver and testing method therefor
CN102969027A (zh) * 2012-11-28 2013-03-13 中国人民解放军国防科学技术大学 基于存储器内建自测试的片上存储器调试方法及装置
TWI475539B (zh) * 2013-01-17 2015-03-01 Raydium Semiconductor Corp 具有內建自我測試功能之驅動電路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1692285A (zh) * 2002-12-20 2005-11-02 富士通株式会社 半导体装置及其检验方法
CN1534304A (zh) * 2003-02-14 2004-10-06 富士通株式会社 半导体测试电路、半导体存储器件和半导体测试方法
CN1654973A (zh) * 2005-03-04 2005-08-17 清华大学 采用加权扫描选通信号的基于扫描的自测试结构及方法
CN104122497A (zh) * 2014-08-11 2014-10-29 中国科学院自动化研究所 集成电路内建自测试所需测试向量的生成电路及方法

Also Published As

Publication number Publication date
CN105738791A (zh) 2016-07-06
US20160187422A1 (en) 2016-06-30
JP2016126357A (ja) 2016-07-11
US9837027B2 (en) 2017-12-05
JP6420139B2 (ja) 2018-11-07

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Legal Events

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C06 Publication
PB01 Publication
CB02 Change of applicant information

Address after: Tokyo, Japan

Applicant after: Synaptics Japan G.K.

Address before: Tokyo, Japan

Applicant before: Synaptics Japan G.K.

COR Change of bibliographic data
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20240716

Address after: California, USA

Patentee after: SYNAPTICS Inc.

Country or region after: U.S.A.

Address before: Tokyo, Japan

Patentee before: Synaptics Japan G.K.

Country or region before: Japan

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20200526