CN1534304A - 半导体测试电路、半导体存储器件和半导体测试方法 - Google Patents
半导体测试电路、半导体存储器件和半导体测试方法 Download PDFInfo
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- CN1534304A CN1534304A CNA2004100043484A CN200410004348A CN1534304A CN 1534304 A CN1534304 A CN 1534304A CN A2004100043484 A CNA2004100043484 A CN A2004100043484A CN 200410004348 A CN200410004348 A CN 200410004348A CN 1534304 A CN1534304 A CN 1534304A
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- 238000012360 testing method Methods 0.000 title claims abstract description 156
- 239000004065 semiconductor Substances 0.000 title claims abstract description 90
- 230000001360 synchronised effect Effects 0.000 claims description 33
- 238000005538 encapsulation Methods 0.000 claims description 11
- 238000010998 test method Methods 0.000 claims description 10
- 230000008859 change Effects 0.000 abstract description 19
- 238000010276 construction Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 11
- 230000008569 process Effects 0.000 description 11
- 230000004044 response Effects 0.000 description 8
- 238000001514 detection method Methods 0.000 description 5
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- 230000000630 rising effect Effects 0.000 description 4
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- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 3
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 2
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- 238000012956 testing procedure Methods 0.000 description 2
- 101150110971 CIN7 gene Proteins 0.000 description 1
- 239000002229 CNT20 Substances 0.000 description 1
- 101000685663 Homo sapiens Sodium/nucleoside cotransporter 1 Proteins 0.000 description 1
- 101150110298 INV1 gene Proteins 0.000 description 1
- 101100328521 Schizosaccharomyces pombe (strain 972 / ATCC 24843) cnt6 gene Proteins 0.000 description 1
- 102100023116 Sodium/nucleoside cotransporter 1 Human genes 0.000 description 1
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- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- 229910044991 metal oxide Inorganic materials 0.000 description 1
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Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02K—DYNAMO-ELECTRIC MACHINES
- H02K5/00—Casings; Enclosures; Supports
- H02K5/04—Casings or enclosures characterised by the shape, form or construction thereof
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/20—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits using counters or linear-feedback shift registers [LFSR]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/36—Data generation devices, e.g. data inverters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/36—Data generation devices, e.g. data inverters
- G11C2029/3602—Pattern generator
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02K—DYNAMO-ELECTRIC MACHINES
- H02K7/00—Arrangements for handling mechanical energy structurally associated with dynamo-electric machines, e.g. structural association with mechanical driving motors or auxiliary dynamo-electric machines
- H02K7/10—Structural association with clutches, brakes, gears, pulleys or mechanical starters
- H02K7/1004—Structural association with clutches, brakes, gears, pulleys or mechanical starters with pulleys
- H02K7/1008—Structural association with clutches, brakes, gears, pulleys or mechanical starters with pulleys structurally associated with the machine rotor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Tests Of Electronic Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Abstract
Description
Claims (18)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003036125A JP2004246979A (ja) | 2003-02-14 | 2003-02-14 | 半導体試験回路、半導体記憶装置および半導体試験方法 |
JP036125/2003 | 2003-02-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1534304A true CN1534304A (zh) | 2004-10-06 |
CN100344983C CN100344983C (zh) | 2007-10-24 |
Family
ID=32923231
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100043484A Expired - Fee Related CN100344983C (zh) | 2003-02-14 | 2004-02-13 | 半导体测试电路、半导体存储器件和半导体测试方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7228470B2 (zh) |
JP (1) | JP2004246979A (zh) |
KR (1) | KR100959609B1 (zh) |
CN (1) | CN100344983C (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101548337A (zh) * | 2005-03-18 | 2009-09-30 | 恩纳柏斯技术公司 | 内部生成用于集成电路装置中进行测试的模式 |
CN105738791A (zh) * | 2014-12-26 | 2016-07-06 | 辛纳普蒂克斯显像装置合同会社 | 半导体设备 |
CN110853696A (zh) * | 2019-10-31 | 2020-02-28 | 上海华力集成电路制造有限公司 | 用于静态存储器功能检测的晶圆允收测试模块和方法 |
CN111354412A (zh) * | 2018-12-20 | 2020-06-30 | 中国科学院微电子研究所 | 一种内建自测试电路及存储器 |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050144525A1 (en) * | 2003-12-05 | 2005-06-30 | Keerthinarayan Heragu | Method to test memories that operate at twice their nominal bandwidth |
US7394272B2 (en) * | 2006-01-11 | 2008-07-01 | Faraday Technology Corp. | Built-in self test for system in package |
JP4968437B2 (ja) * | 2006-06-12 | 2012-07-04 | セイコーエプソン株式会社 | キャリッジ及び液体噴射装置 |
JP5125028B2 (ja) * | 2006-08-18 | 2013-01-23 | 富士通セミコンダクター株式会社 | 集積回路 |
KR100782495B1 (ko) * | 2006-10-20 | 2007-12-05 | 삼성전자주식회사 | 반도체 메모리 장치 및 이 장치의 데이터 라이트 및 리드방법 |
KR100914236B1 (ko) * | 2007-06-28 | 2009-08-26 | 삼성전자주식회사 | 테스트 어드레스 생성회로를 가지는 반도체 메모리 장치 및테스트 방법. |
JP5145844B2 (ja) | 2007-09-26 | 2013-02-20 | 富士通セミコンダクター株式会社 | 半導体装置及びメモリシステム |
US8234540B2 (en) | 2008-07-01 | 2012-07-31 | International Business Machines Corporation | Error correcting code protected quasi-static bit communication on a high-speed bus |
US20100096629A1 (en) * | 2008-10-20 | 2010-04-22 | Mediatek Inc. | Multi-chip module for automatic failure analysis |
US20100180154A1 (en) * | 2009-01-13 | 2010-07-15 | International Business Machines Corporation | Built In Self-Test of Memory Stressor |
US9390049B2 (en) * | 2011-06-03 | 2016-07-12 | Micron Technology, Inc. | Logical unit address assignment |
CN102495357B (zh) * | 2011-11-25 | 2013-09-11 | 哈尔滨工业大学 | 一种基于比较器响应分析器的输入向量监测并发内建自测试电路 |
GB201711055D0 (en) * | 2017-07-10 | 2017-08-23 | Accelercomm Ltd | Electronic device with bit pattern generation, integrated circuit and method for polar coding |
US10672496B2 (en) | 2017-10-24 | 2020-06-02 | Micron Technology, Inc. | Devices and methods to write background data patterns in memory devices |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6024963B2 (ja) * | 1978-03-16 | 1985-06-15 | 豊田工機株式会社 | シ−ケンスコントロ−ラ |
DE3732937A1 (de) * | 1987-09-30 | 1989-04-20 | Philips Patentverwaltung | Schaltungsanordnung zur vermeidung von ueberlast in einem breitband-vermittlungssystem |
CA1286421C (en) * | 1987-10-14 | 1991-07-16 | Martin Claude Lefebvre | Message fifo buffer controller |
JPH07113904B2 (ja) * | 1990-04-11 | 1995-12-06 | 株式会社東芝 | メモリ・アクセス装置 |
JP3552184B2 (ja) | 1996-10-18 | 2004-08-11 | 株式会社アドバンテスト | 半導体メモリ試験装置 |
JPH10162600A (ja) * | 1996-11-26 | 1998-06-19 | Mitsubishi Electric Corp | テスト機能内蔵半導体記憶装置 |
KR100258978B1 (ko) * | 1997-07-02 | 2000-06-15 | 윤종용 | 동적 메모리 테스트 회로의 어드레스 발생 장치 및방법 |
JPH11185497A (ja) * | 1997-12-24 | 1999-07-09 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP3955708B2 (ja) | 2000-02-04 | 2007-08-08 | 株式会社リコー | 組込み自己試験用回路 |
JP2002163899A (ja) | 2000-11-27 | 2002-06-07 | Toshiba Microelectronics Corp | 半導体記憶装置 |
-
2003
- 2003-02-14 JP JP2003036125A patent/JP2004246979A/ja active Pending
-
2004
- 2004-01-26 US US10/763,334 patent/US7228470B2/en not_active Expired - Fee Related
- 2004-02-11 KR KR1020040008849A patent/KR100959609B1/ko not_active IP Right Cessation
- 2004-02-13 CN CNB2004100043484A patent/CN100344983C/zh not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101548337A (zh) * | 2005-03-18 | 2009-09-30 | 恩纳柏斯技术公司 | 内部生成用于集成电路装置中进行测试的模式 |
CN105738791A (zh) * | 2014-12-26 | 2016-07-06 | 辛纳普蒂克斯显像装置合同会社 | 半导体设备 |
CN105738791B (zh) * | 2014-12-26 | 2020-05-26 | 辛纳普蒂克斯日本合同会社 | 半导体设备 |
CN111354412A (zh) * | 2018-12-20 | 2020-06-30 | 中国科学院微电子研究所 | 一种内建自测试电路及存储器 |
CN111354412B (zh) * | 2018-12-20 | 2022-04-19 | 中国科学院微电子研究所 | 一种内建自测试电路及存储器 |
CN110853696A (zh) * | 2019-10-31 | 2020-02-28 | 上海华力集成电路制造有限公司 | 用于静态存储器功能检测的晶圆允收测试模块和方法 |
CN110853696B (zh) * | 2019-10-31 | 2022-06-14 | 上海华力集成电路制造有限公司 | 用于静态存储器功能检测的晶圆允收测试模块和方法 |
Also Published As
Publication number | Publication date |
---|---|
CN100344983C (zh) | 2007-10-24 |
US7228470B2 (en) | 2007-06-05 |
US20040177296A1 (en) | 2004-09-09 |
KR20040073976A (ko) | 2004-08-21 |
KR100959609B1 (ko) | 2010-05-27 |
JP2004246979A (ja) | 2004-09-02 |
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Legal Events
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081017 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20081017 Address after: Tokyo, Japan, Japan Patentee after: Fujitsu Microelectronics Ltd. Address before: Kanagawa Patentee before: Fujitsu Ltd. |
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C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTOR CO., LTD. Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
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CP03 | Change of name, title or address |
Address after: Kanagawa Patentee after: Fujitsu Semiconductor Co., Ltd. Address before: Tokyo, Japan, Japan Patentee before: Fujitsu Microelectronics Ltd. |
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ASS | Succession or assignment of patent right |
Owner name: SUOSI FUTURE CO., LTD. Free format text: FORMER OWNER: FUJITSU SEMICONDUCTOR CO., LTD. Effective date: 20150513 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20150513 Address after: Kanagawa Patentee after: Co., Ltd. Suo Si future Address before: Kanagawa Patentee before: Fujitsu Semiconductor Co., Ltd. |
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CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20071024 Termination date: 20170213 |