CN105321913A - 器件管芯中的环形件结构 - Google Patents

器件管芯中的环形件结构 Download PDF

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Publication number
CN105321913A
CN105321913A CN201510001619.9A CN201510001619A CN105321913A CN 105321913 A CN105321913 A CN 105321913A CN 201510001619 A CN201510001619 A CN 201510001619A CN 105321913 A CN105321913 A CN 105321913A
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China
Prior art keywords
metal
annular members
layer
pad
metal pad
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CN201510001619.9A
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CN105321913B (zh
Inventor
陈英儒
陈洁
陈宪伟
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

管芯包括金属焊盘、金属焊盘上方的钝化层和钝化层上方的聚合物层。金属柱位于金属焊盘的上方并且电连接至金属焊盘。金属环形件与金属柱共平面。聚合物层包括与金属柱和金属环形件共平面的部分。本发明还涉及器件管芯中的环形件结构。

Description

器件管芯中的环形件结构
优先权声明和交叉引用
本申请要求2014年5月30日提交的标题为“ProtectivePillarsandMethodofFormingSame”的以下临时提交的美国专利申请第62/005,735号的权益，其全部内容结合于此作为参考。
技术领域
本发明涉及器件管芯中的环形件结构。
背景技术
现代电路的制造通常包括若干步骤。首先在半导体晶圆上制造集成电路，半导体晶圆包括多个重复的半导体芯片，每个半导体芯片均包括集成电路。然后从晶圆锯切半导体芯片并且进行封装。封装工艺具有两个主要目的：保护易碎的半导体芯片和将内部集成电路连接到外部引脚。
随着对更多功能的需求的不断增加，发展了叠层封装件(PoP)技术，在叠层封装件技术中将两个以上的封装件接合以便扩展封装件的集成能力。具有高集成度，得益于部件之间的缩短的连接路径，可以提高产生的PoP封装件的电性能。通过使用PoP技术，封装件设计变得更加灵活和简单。也减少了上市时间。
发明内容
为了解决现有技术中的问题，本发明提供了1.一种半导体结构，包括：管芯，包括：第一金属焊盘；钝化层，位于所述第一金属焊盘上方；聚合物层，位于所述钝化层上方；金属柱，位于所述第一金属焊盘上方并且电连接至所述第一金属焊盘；以及金属环形件，与所述金属柱共平面，其中，所述聚合物层包括与所述金属柱和所述金属环形件共平面的第一部分。
在上述半导体结构中，还包括与所述第一金属焊盘共平面的第二金属焊盘，其中，所述第二金属焊盘形成邻近所述管芯的边缘的额外的金属环形件。
在上述半导体结构中，还包括与所述第一金属焊盘共平面的第二金属焊盘，其中，所述第二金属焊盘形成邻近所述管芯的边缘的额外的金属环形件；其中，所述金属环形件延伸至所述钝化层内，所述金属环形件的底面与所述第二金属焊盘的顶面接触。
在上述半导体结构中，还包括与所述第一金属焊盘共平面的第二金属焊盘，其中，所述第二金属焊盘形成邻近所述管芯的边缘的额外的金属环形件；其中，所述金属环形件包括与所述钝化层的顶面接触的底面，所述金属环形件与所述第二金属焊盘完全分离。
在上述半导体结构中，其中，所述金属环形件是电浮动的。
在上述半导体结构中，还包括与所述金属环形件重叠的密封环形件，其中，所述密封环形件延伸至多个金属间介电(IMD)层内。
在上述半导体结构中，还包括：模塑材料，在所述模塑材料中模制所述管芯；多个通孔，穿透所述模塑材料；介电层，具有与所述模塑材料接触的表面；以及再分布线，位于所述介电层中并且电连接至所述金属柱和所述多个通孔，其中，所述金属环形件包括与所述介电层的表面共平面的表面，并且其中，所述金属环形件的整个表面与所述介电层接触。
在上述半导体结构中，其中，所述聚合物层还包括分别与所述金属柱和所述金属环形件重叠的第二部分和第三部分。
根据本发明的另一个方面，提供了一种半导体结构，包括：管芯，包括：第一金属焊盘；第二金属焊盘，与所述第一金属焊盘共平面，其中，所述第二金属焊盘形成环绕所述第一金属焊盘的环形件；钝化层，位于所述第一金属焊盘和所述第二金属焊盘上方，所述钝化层包括与所述第一金属焊盘的中心部分对准的开口；聚合物层，位于所述钝化层上方；金属柱，位于所述第一金属焊盘上方并且电连接至所述第一金属焊盘；金属环形件，与所述金属柱共平面，所述金属环形件环绕所述金属柱，其中，所述金属环形件与所述第二金属焊盘重叠；以及密封环形件，位于所述金属环形件下面并且与所述金属环形件重叠；模塑材料，包围所述管芯，其中，所述模塑材料的顶面与所述金属柱的第一顶面和所述金属环形件的第二顶面共平面；以及介电层，位于所述模塑材料上方并且与所述模塑材料接触；以及再分布线，位于所述介电层中并且电连接至所述金属柱，其中，整个所述金属环形件被所述介电层覆盖。
在上述半导体结构中，其中，在所述介电层中没有导电部件与所述金属环形件接触。
在上述半导体结构中，其中，所述金属环形件与所述第二金属焊盘接触。
在上述半导体结构中，其中，所述金属环形件与所述第二金属焊盘接触；其中，所述金属环形件包括位于所述钝化层中的部分，所述金属环形件的所述部分的底面与所述第二金属焊盘接触。
在上述半导体结构中，其中，所述金属环形件包括与所述钝化层的顶面接触的底面，所述金属环形件通过所述钝化层与所述第二金属焊盘完全分离。
在上述半导体结构中，其中，所述金属环形件在所述介电层中完全绝缘，所述金属环形件的所有表面均与所述介电层接触。
根据本发明的又一个方面，提供了一种形成半导体结构的方法，包括：形成管芯，所述管芯包括：金属柱；金属环形件，与所述金属柱共平面；以及聚合物层，包括与所述金属柱和所述金属环形件共平面的第一部分，所述聚合物层环绕所述金属柱和所述金属环形件；在模塑材料中模制所述管芯；以及研磨所述模塑材料以暴露所述金属柱的第一顶面和所述金属环形件的第二顶面。
在上述方法中，还包括：在所述金属柱、所述金属环形件和所述模塑材料的上方形成介电层，所述介电层与所述金属柱、所述金属环形件和所述模塑材料接触；以及在所述介电层中形成再分布线，其中，将所述再分布线中的一条连接至所述金属柱，并且在形成所述再分布线之后，所述金属环形件的整个第二顶面均与所述介电层的底面接触。
在上述方法中，还包括：在所述金属柱、所述金属环形件和所述模塑材料的上方形成介电层，所述介电层与所述金属柱、所述金属环形件和所述模塑材料接触；以及在所述介电层中形成再分布线，其中，将所述再分布线中的一条连接至所述金属柱，并且在形成所述再分布线之后，所述金属环形件的整个第二顶面均与所述介电层的底面接触；其中，在形成所述再分布线之后，在所述介电层中没有金属部件与所述金属环形件接触。
在上述方法中，还包括在所述模塑材料中形成通孔，其中，在研磨所述模塑材料之后，暴露出所述通孔。
在上述方法中，其中，所述金属环形件形成为与所述管芯中的密封环形件重叠。
在上述方法中，其中，所述金属环形件形成为与所述管芯中的密封环形件重叠；其中，所述金属环形件的底面与所述密封环形件接触。
附图说明
当结合附图进行阅读时，从以下详细描述最佳地理解本发明的各方面。应该注意，根据工业中的标准实践，各个部件未按比例绘制。实际上，为了清楚地讨论，各个部件的尺寸可以任意地增大或减小。
图1示出了根据一些实施例的晶圆的截面图；
图2至图16示出了根据一些实施例的封装件在形成中的中间阶段的截面图；以及
图17示出了根据一些实施例的晶圆的部分的顶视图。
具体实施方式
以下公开内容提供了许多用于实现本发明的不同特征的不同实施例或实例。下面描述了部件和布置的具体实例以简化本发明。当然，这些仅仅是实例，而不旨在限制本发明。例如，在以下描述中，在第二部件上方或者上形成第一部件可以包括第一部件和第二部件以直接接触的方式形成的实施例，并且也可以包括在第一部件和第二部件之间可以形成额外的部件，从而使得第一部件和第二部件可以不直接接触的实施例。此外，本发明可在各个实例中重复参考标号和/或字符。该重复是为了简单和清楚的目的，并且其本身不指示所讨论的各个实施例和/或配置之间的关系。
而且，为了便于描述，本文可以使用诸如“在…下面”、“在…下方”、“下部”、“在…上面”、“上部”等空间相对术语以描述如图所示的一个元件或部件与另一个(或另一些)元件或部件的关系。除了图中所示的方位外，空间相对术语旨在包括器件在使用或操作中的不同方位。装置可以以其他方式定向(旋转90度或在其他方位上)，并且在此使用的空间相对描述符可以同样地作出相应的解释。
根据各个示例性实施例，提供了器件管芯和形成包括器件管芯的封装件的方法。示出了形成封装件的中间阶段。讨论了实施例的变化。贯穿各个视图和说明性实施例。相同的标号用于标示相同的元件。
图1至图16示出了根据一些实施例的封装件在形成中的中间阶段的截面图。参照图1，提供包括多个器件管芯100’的晶圆100。晶圆100还包括半导体衬底10，半导体衬底10可以是块状硅衬底或绝缘上硅衬底。可选地，也可以使用包括III族、IV族和V族元素的其他半导体材料，其他半导体材料可以包括硅锗、硅碳和/或III-V族化合物半导体材料。在半导体衬底10中和/或上形成诸如晶体管(示意性示出为12)的集成电路器件。晶圆10还可以包括位于半导体衬底10上方的层间电介质(ILD)14和互连结构16。互连结构16包括在介电层18中形成的金属线20和通孔22。在下文中，在同一水平处的金属线共同地称为金属层。因此，互连结构16可以包括通过通孔22互连的多个金属层。金属线20和通孔22可以由铜或铜合金形成，尽管它们也可以由其他金属形成。在一些实施例中，介电层18包括低k介电材料。例如，低k介电材料的介电常数(k值)可以小于约3.0或约2.5。
金属层包括底部金属层(也称为金属层1或M1)至顶部金属层(Mtop)。在一些实施例中，Mtop层是在低k介电材料中形成的最高的金属层。
根据本发明的一些实施例，在顶部金属层Mtop和相应的介电层18的上方形成钝化层28。钝化层28具有大于3.8的k值并且使用非低k介电材料形成。在一些实施例中，钝化层28是包括氧化硅层(未示出)和位于氧化硅层上方的氮化硅层(未示出)的复合层。钝化层28也可以由诸如未掺杂硅酸盐玻璃(USG)、氮氧化硅等的其他无孔介电材料形成。
形成金属焊盘30(包括30A和30B)，金属焊盘30的部分位于钝化层28中，并且金属焊盘30可以通过通孔26、金属线20和通孔22电连接至集成电路器件12。金属焊盘30可以是铝焊盘或铝铜焊盘并且因此在下文中可选地称为铝焊盘30，尽管可以使用其他金属材料。例如，金属焊盘30可以具有在约99.5％和约99.9％之间的铝(原子)百分比以及在约0.1％和约0.5％之间的铜百分比。在图1中，通孔26示出为将Mtop层中的金属线20连接到上面的金属焊盘30。在可选实施例中，金属焊盘30可以与顶部金属层Mtop中的金属线(或焊盘)20物理接触，金属焊盘30与金属线(或焊盘)20之间无通孔。
又如图1所示，在钝化层28上方形成钝化层32。钝化层32的材料可以选自与钝化层28的材料相同的候选材料。钝化层28和32可以由相同的介电材料形成或可以由不同的介电材料形成。在一些实施例中，钝化层32包括氧化硅层和氧化硅层上方的氮化硅层。然后图案化钝化层32，从而使得钝化层32的部分覆盖铝焊盘30的边缘部分，并且通过钝化层32中的开口暴露铝焊盘30的中心部分。在一些实施例中，钝化层32也可以包括与金属焊盘30齐平的部分。
在金属焊盘30上方形成金属柱40。金属柱40的形成可以包括实施物理汽相沉积(PVD)以沉积晶种层；形成并图案化掩模层(未示出)，至少一些金属焊盘30未被掩模层掩蔽；以及然后实施镀步骤以形成金属柱40。然后蚀刻掩模层和被掩模层覆盖的晶种层的部分。金属柱40可以包括铜或其他金属或包括铜、铝、钨、镍、钴等的金属合金。
形成介电层36作为晶圆100的顶部部件。介电层36可以是聚合物层并且在下文中称为聚合物层36，尽管介电层36也可以由非聚合物材料和可能的无机材料形成。形成工艺可以包括旋涂，随后为固化工艺。由于固化工艺，聚合物层36凝固。在一些实施例中，聚合物层36由聚苯并恶唑(PBO)形成。在可选实施例中，聚合物层36由诸如苯并环丁烯(BCB)、聚酰亚胺等的其他聚合物形成。聚合物层36的材料可以是光敏材料，尽管也可以使用非光敏材料。
金属柱40包括40A和40B。金属柱40A用于器件管芯100’中的部件和要接合至器件管芯100’的部件之间的电连接。金属柱40B为靠近相应的器件管芯100’的边缘形成的金属环形件。图17示出了图1中的结构的顶视图，其中金属柱40B示出为具有四个侧面，每个侧面都邻近相应的管芯100’的相应边缘。相应的金属环形件40B环绕金属柱40A。如图1所示，在一些实施例中，聚合物层36延伸到金属柱40的顶部。
重新参照图1，根据一些实施例，金属环形件40B与相应的密封环形件42重叠。密封环形件42包括位于介电层18中的多个金属环形件，其中金属环形件包括形成环形件的多条金属线20和形成环形件的多个通孔22。连接金属线20的环形件和通孔22的环形件以形成延伸穿过所有介电层18的集成环形件。在一些实施例中，密封环形件42也包括由接触插塞44形成的环形件，接触插塞44延伸到半导体衬底10的顶面。此外，金属焊盘30B也可以形成环形件，由金属焊盘30B形成的金属环形件连接至介电层18中的环形件以形成集成且连续的金属环形件，其从聚合物层36连续延伸到ILD14或可能延伸到半导体衬底10。
如图17所示，密封环形件42也可以包括四个侧面，每个侧面都邻近相应的管芯100’的边缘。此外，金属环形件40B的四个侧面可以与密封环形件42侧相应侧面重叠。
又如图1所示，实施管芯锯切步骤(由锯片43表示)以将晶圆100锯成多个器件管芯100’，每个器件管芯100’均包括金属柱40A、金属环形件40B和密封环形件42。管芯附接薄膜(DAF)8附接至晶圆100的底面，并且因此也可以附接至每个管芯100’的底部。
图2至图16示出了根据一些示例性实施例的封装件中的管芯100’在封装中的中间阶段的截面图。参照图2，提供载体48，并且在载体48上设置粘合层50。载体48可以是空白玻璃载体、空白陶瓷载体等。粘合层50可以由诸如紫外(UV)胶、光热转换(LTHC)胶等的粘合剂形成，尽管可以使用其他类型的粘合剂。在一些实施例中，粘合层50具有在光热下分解的功能并且因此从在粘合层50上形成的结构上释放载体48。
在一些实施例中，在粘合层50上方形成缓冲层52。可选地，在粘合层50上方没有形成缓冲层52。根据本发明的一些实施例，缓冲层52是介电层，介电层可以是聚合物层。例如，聚合物可以是聚酰亚胺、PBO、BCB、阻焊膜(SR)等。缓冲层52是具有均匀厚度的平面层，其厚度可以大于约2μm并且可以在约2μm和约40μm之间。缓冲层52的顶面和底面也是平面。在可选实施例中，不形成缓冲层52。
例如，通过物理汽相沉积(PVD)或金属箔层压在缓冲层52上方形成晶种层53。晶种层53可以包括铜、铝、钛或它们的多层。在一些实施例中，晶种层53包括钛层(未示出)和钛层上方的铜层(未示出)。在可选实施例中，晶种层53包括单个铜层。
根据一些实施例，在晶种层53上方应用光刻胶54并且然后图案化光刻胶54。因此，在光刻胶54中形成开口56，通过开口56暴露晶种层53的一些部分。
如图3所示，通过镀在开口56中形成通孔58，镀可以是电镀或化学镀。在晶种层53的暴露部分上镀通孔58。通孔58可以包括铜、铝、钨、镍或它们的合金。通孔58的顶视形状包括但不限于矩形、正方形、圆形等。通孔58的高度由随后放置的管芯100’(图5)的厚度确定，在各个实施例中，通孔58的高度大于或等于管芯100’的厚度。
在镀通孔58之后，去除光刻胶54，并且在图4中示出了产生的结构。此外，暴露由光刻胶54覆盖的晶种层53(图2)的部分。然后实施蚀刻步骤以去除晶种层53的暴露部分，其中蚀刻可以是各向异性蚀刻或各向同性蚀刻。另一方面，保持不蚀刻晶种层53的与通孔58重叠的部分。在整个说明书中，晶种层53的剩余的下面的部分称为通孔58的底部。尽管晶种层53示出为具有与上面的通孔58的部分的可分辨的界面，但是当晶种层53由与相应的上面的通孔58的材料类似或相同的材料形成时，晶种层53可以与通孔58融合，它们之间没有可分辨的界面。因此，在随后的图中未示出晶种层53。在可选实施例中，在晶种层53和上面的通孔58的镀的部分之间存在可分辨的界面。
图5示出了在缓冲层52上方放置器件管芯100’。可以通过DAF8将器件管芯100’粘附至缓冲层52。尽管图5示出了放置单个器件管芯100’，但是在缓冲层52上方可以放置多个器件管芯100’，其中多个放置的器件管芯100’可以按多个行和列放置。
参照图6，在器件管芯100’和通孔58上模制模塑材料60。模塑材料60填充器件管芯100’和通孔58之间的间隙，并且模塑材料60可以与缓冲层52接触。模塑材料60可以包括模塑料、模制底部填充物、环氧化物或树脂。在模制工艺之后，模塑材料60的顶面高于金属柱40和通孔58的顶端。模塑材料60作为液体分配并且然后固化。
接下来，实施诸如化学机械抛光(CMP)步骤或研磨步骤的平坦化步骤以减薄模塑材料60，直至暴露通孔58。如图7所示，在一些实施例中，通过平坦化去除聚合物层36的位于金属柱40的顶部上的部分。由于研磨，因此暴露金属柱40。由于研磨，通孔58的顶面58A’与金属柱40的顶面40’基本上齐平(共平面)，并且与模塑材料60的顶面60A基本上齐平(共平面)。
参照图8，在模塑材料60、通孔58和金属柱40上方形成介电层62，并且介电层62接触模塑材料60、通孔58和金属柱40。根据本发明的一些实施例，介电层62由诸如PBO、聚酰亚胺等的聚合物形成。在可选实施例中，介电层62由诸如氮化硅、氧化硅、氮氧化硅等的无机介电材料形成。
接下来，参照图9，形成再分布线(RDL)64以连接至金属柱40和通孔58。RDL64也可以互连金属柱40和通孔58。尽管未示出，但是RDL64可以包括金属迹线(金属线)和位于RDL64下面且连接至RDL64的通孔。在这些实施例中，在介电层62中形成通孔，并且在介电层62上方形成金属迹线。在一些实施例中，以镀工艺形成RDL64，其中每条RDL64均包括晶种层(未示出)和晶种层上方的镀的金属材料。晶种层和镀的金属材料可以由相同的材料或不同的材料形成。
如图9所示，金属柱40A和通孔58电连接至RDL64并且可以物理接触RDL64。另一方面，金属环形件40B可以不连接至任何RDL64。因此，根据本发明的实施例，金属环形件40B的整个顶面与介电层62的底面接触，并且不与任何金属部件接触。
参照图10，根据各个实施例，在图9所示的结构上方形成一个或多个介电层66，在介电层66中形成RDL68。在一些实施例中，RDL68的每个层的形成均包括形成毯状晶种层，在毯状晶种层上方形成掩模层并且图案化掩模层，实施镀以形成RDL68，去除掩模层、以及实施蚀刻步骤以去除毯状晶种层的未被RDL68覆盖的部分。RDL68可以包括金属或包括铝、铜、钨、和/或它们合金的金属合金。
图10示出了一个RDL层68。在可选实施例中，取决于相应的封装件的布线需求，可以具有一层以上的RDL68。在这些实施例中，介电层66可以包括诸如PBO、聚酰亚胺、BCB等的聚合物。可选地，介电层66可以包括诸如氧化硅、氮化硅、碳化硅、氮氧化硅等的非有机介电材料。
图11示出了根据一些示例性实施例的介电层69、UBM70和电连接件72的形成。介电层69可以由选自用于形成介电层62和66的候选材料的材料形成。电连接件72的形成可以包括在UBM70的暴露部分上放置焊料球以及然后回流焊料球。在可选实施例中，电连接件72的形成包括实施镀步骤以在RDL68上方形成焊料区以及然后回流焊料区。电连接件72也可以包括也可以通过镀形成的金属柱或金属柱和焊料帽。在整个说明书中，包括器件管芯100’、通孔58、模塑材料60、上面的RDL64和68的组合结构将称为封装件74，封装件74可以是包括多个器件管芯100’的复合晶圆。
接下来，例如，通过将UV光或激光投射到粘合层50上，将封装件74从载体48上分离。残余的粘合层50和缓冲层52(如果存在)也从封装件74上去除。图12中示出了产生的结构。通过粘合层80将封装件74进一步粘附至载体78，其中电连接件72可以朝向接触粘合层80。然后形成介电层82和RDL84。根据本发明的一些实施例，示出的RDL84表示单个RDL层。在可选实施例中，示出的RDL84表示一个以上的RDL层，其中，形成通孔以互连不同RDL层中的不同金属迹线。介电层82也可以由诸如PBO、BCB、聚酰亚胺的聚合物或诸如氧化硅、氮化硅、氮氧化硅等的无机材料形成。
又如图12所示，在RDL84和介电层82上方形成介电层86。介电层86可以由PBO或其他有机或无机材料形成。在一些实施例中，如图13所示，在介电层86上方形成或层压胶带88。然后在介电层86和胶带88中形成开口90，并且因此暴露顶部RDL84中的金属焊盘。
在随后的步骤中，封装件74接合至封装件部件200，并且图14中示出了产生的结构。根据一些实施例，封装件部件200是在其中包括一个或多个存储管芯(诸如静态随机存取存储器(SRAM)管芯或动态随机存取存储器(DRAM)管芯)204的封装件。此外，封装件部件200可以包括封装件衬底202，在封装件衬底202上接合管芯204。
图14示出了在模塑材料60中模制一个管芯100’。在制造工艺中，多个管芯100’可以通过模塑材料60同时模制。在整个说明书中，封装件74包括多个封装件74’，每个封装件74’均包括器件管芯100’中的一个和周围的通孔58。因此，每个封装件74’可以接合至与封装件部件200相同的多个封装件部件中的一个。在接合之后，实施锯切步骤以将封装件74锯成多个封装件，每个封装件均包括封装件74’中的一个和相应的封装件部件200。
在图14中的实施例中，金属环形件40B的底面与金属焊盘30B的顶面接触，金属焊盘30B也形成环形件。在这些实施例中，金属环形件40B和相应的密封环形件42可以是电浮动的或电接地的。
根据可选实施例，如图15所示，金属环形件40B的底面与钝化层32的顶面接触，并且通过钝化层32与金属焊盘30B的顶面间隔开。因此，金属环形件40B在介电基质材料中是完全绝缘的，介电层62、32和36完全围绕其中的金属环形件40B。此外，在这些实施例中，金属环形件40B是电浮动的。
图14和图15示出了两个密封环形件(标记为42A和42B)和两个金属环形件40B1和40B2，密封环形件42A环绕密封环形件42B。金属环形件40B1还环绕金属环形件40B2。根据可选实施例，如图16所示，具有单个密封环形件42和单个金属环形件40B。
图17示出了晶圆100和在其中的器件管芯100’的顶视图。根据一些实施例，金属环形件40B的宽度A在约15μm和约70μm之间。金属环形件40B的宽度A可以是大于、等于或小于金属焊盘30的宽度E。铜柱40A的宽度或直径C可以在约50μm和约100μm之间。然而，应当理解，在整个说明书中列举的值仅是实例并且可以改变为不同的值。金属环形件40B1和40B2之间的间距D可以大于约20μm。图17示出了，在一些实施例中，具有由B表示的围护件的密封环形件42比相应的上面的金属环形件40B更宽，该围护件可以大于2μm。在可选实施例中，密封环形件42可以比相应的上面的金属环形件40B窄。
本发明的实施例具有一些有利特征。如图1所示，如果在将晶圆锯成多个器件管芯的步骤中，在顶部聚合物层中不形成金属环形件，则由锯片施加的机械力可能导致顶部聚合物层和下面的诸如钝化层的介电层之间的分层。通过形成金属环形件，提高了晶圆的机械强度，并且减小了发生分层的可能性。此外，金属环形件的形成还提高了管芯对湿气渗透的抵抗力。
根据本发明的一些实施例，管芯包括金属焊盘、金属焊盘上方的钝化层、和钝化层上方的聚合物层。金属柱位于金属焊盘上方并且电连接至金属焊盘。金属环形件与金属柱共平面，金属环形件具有接近管芯的边缘的多个侧面。聚合物层包括与金属柱和金属环形件共平面的部分。
根据本发明的可选实施例，一种结构包括管芯。管芯包括第一金属焊盘和与第一金属焊盘共平面的第二金属焊盘，其中第二金属焊盘形成环绕第一金属焊盘的环形件。管芯还包括位于第一金属焊盘和第二金属焊盘上方的钝化层，钝化层具有与第一金属焊盘的中心部分对准的开口。聚合物层位于钝化层的上方。金属柱位于第一金属焊盘上方并且电连接至第一金属焊盘。金属环形件与金属柱共平面，金属环形件环绕金属柱。金属环形件与第二金属焊盘重叠。密封环形件位于金属环形件的下面并且与金属环形件重叠。模塑材料包围管芯，其中模塑材料的顶面与金属柱的第一顶面和金属环形件的第二顶面共平面。介电层位于模塑材料上方并且与模塑材料接触。再分布线形成在介电层中并且电连接至金属柱，其中整个金属环形件被介电层覆盖。
根据本发明的又可选实施例，一种方法包括形成管芯，管芯包括金属柱、与金属柱共平面的金属环形件、金属环形件具有接近管芯的边缘的四个侧面，以及包括与金属柱和金属环形件共平面的部分的聚合物层。聚合物层环绕金属柱和金属环形件。该方法还包括在模塑材料中模制管芯，以及研磨模塑材料以暴露金属柱的第一顶面和金属环形件的第二顶面。
上面概述了若干实施例的特征，使得本领域技术人员可以更好地理解本发明的各方面。本领域技术人员应该理解，他们可以容易地使用本发明作为基础来设计或修改用于实施与本文所介绍实施例相同的目的和/或实现相同优势的其他工艺和结构。本领域技术人员也应该意识到，这种等同构造并不背离本发明的精神和范围，并且在不背离本发明的精神和范围的情况下，在此他们可以做出多种变化、替换以及改变。

Claims (10)

1.一种半导体结构，包括：
管芯，包括：
第一金属焊盘；
钝化层，位于所述第一金属焊盘上方；
聚合物层，位于所述钝化层上方；
金属柱，位于所述第一金属焊盘上方并且电连接至所述第一金属焊盘；以及
金属环形件，与所述金属柱共平面，其中，所述聚合物层包括与所述金属柱和所述金属环形件共平面的第一部分。
2.根据权利要求1所述的半导体结构，还包括与所述第一金属焊盘共平面的第二金属焊盘，其中，所述第二金属焊盘形成邻近所述管芯的边缘的额外的金属环形件。
3.根据权利要求2所述的半导体结构，其中，所述金属环形件延伸至所述钝化层内，所述金属环形件的底面与所述第二金属焊盘的顶面接触。
4.根据权利要求2所述的半导体结构，其中，所述金属环形件包括与所述钝化层的顶面接触的底面，所述金属环形件与所述第二金属焊盘完全分离。
5.根据权利要求1所述的半导体结构，其中，所述金属环形件是电浮动的。
6.根据权利要求1所述的半导体结构，还包括与所述金属环形件重叠的密封环形件，其中，所述密封环形件延伸至多个金属间介电(IMD)层内。
7.根据权利要求1所述的半导体结构，还包括：
模塑材料，在所述模塑材料中模制所述管芯；
多个通孔，穿透所述模塑材料；
介电层，具有与所述模塑材料接触的表面；以及
再分布线，位于所述介电层中并且电连接至所述金属柱和所述多个通孔，其中，所述金属环形件包括与所述介电层的表面共平面的表面，并且其中，所述金属环形件的整个表面与所述介电层接触。
8.根据权利要求1所述的半导体结构，其中，所述聚合物层还包括分别与所述金属柱和所述金属环形件重叠的第二部分和第三部分。
9.一种半导体结构，包括：
管芯，包括：
第一金属焊盘；
第二金属焊盘，与所述第一金属焊盘共平面，其中，所述第二金属焊盘形成环绕所述第一金属焊盘的环形件；
钝化层，位于所述第一金属焊盘和所述第二金属焊盘上方，所述钝化层包括与所述第一金属焊盘的中心部分对准的开口；
聚合物层，位于所述钝化层上方；
金属柱，位于所述第一金属焊盘上方并且电连接至所述第一金属焊盘；
金属环形件，与所述金属柱共平面，所述金属环形件环绕所述金属柱，其中，所述金属环形件与所述第二金属焊盘重叠；以及
密封环形件，位于所述金属环形件下面并且与所述金属环形件重叠；
模塑材料，包围所述管芯，其中，所述模塑材料的顶面与所述金属柱的第一顶面和所述金属环形件的第二顶面共平面；以及
介电层，位于所述模塑材料上方并且与所述模塑材料接触；以及
再分布线，位于所述介电层中并且电连接至所述金属柱，其中，整个所述金属环形件被所述介电层覆盖。
10.一种形成半导体结构的方法，包括：
形成管芯，所述管芯包括：
金属柱；
金属环形件，与所述金属柱共平面；以及
聚合物层，包括与所述金属柱和所述金属环形件共平面的第一部分，所述聚合物层环绕所述金属柱和所述金属环形件；
在模塑材料中模制所述管芯；以及
研磨所述模塑材料以暴露所述金属柱的第一顶面和所述金属环形件的第二顶面。
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DE102014112860A1 (de) 2015-12-03
US20150348916A1 (en) 2015-12-03
US10262952B2 (en) 2019-04-16
DE102014112860B4 (de) 2018-10-25
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US9852998B2 (en) 2017-12-26
TWI550787B (zh) 2016-09-21

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