Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
  • H10P90/19—Preparing inhomogeneous wafers
  • H10P90/1904—Preparing vertically inhomogeneous wafers
  • H10P90/1906—Preparing SOI wafers
  • H10P90/1914—Preparing SOI wafers using bonding
  • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
  • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
  • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
  • H10P90/12—Preparing bulk and homogeneous wafers
  • H10P90/16—Preparing bulk and homogeneous wafers by reclaiming or re-processing
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
  • H10P95/11—Separation of active layers from substrates
  • H10P95/112—Separation of active layers from substrates leaving a reusable substrate, e.g. epitaxial lift off
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
  • H10P95/90—Thermal treatments, e.g. annealing or sintering
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
  • H10W10/10—Isolation regions comprising dielectric materials
  • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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• Element Separation (AREA)
• Mechanical Treatment Of Semiconductor (AREA)

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• 2013
  • 2013-06-26 JP JP2013133868A patent/JP5888286B2/ja active Active
• 2014
  • 2014-05-19 EP EP14818587.9A patent/EP3016133B1/en active Active
  • 2014-05-19 WO PCT/JP2014/002615 patent/WO2014207988A1/ja not_active Ceased
  • 2014-05-19 SG SG11201510639QA patent/SG11201510639QA/en unknown
  • 2014-05-19 CN CN201480032979.9A patent/CN105283943B/zh active Active
  • 2014-05-19 US US14/895,184 patent/US9859149B2/en active Active
  • 2014-05-19 KR KR1020157036519A patent/KR102095383B1/ko active Active
  • 2014-06-16 TW TW103120720A patent/TWI567833B/zh active

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