CN104916579B - 半导体器件结构和制造方法 - Google Patents

半导体器件结构和制造方法 Download PDF

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Publication number
CN104916579B
CN104916579B CN201410443141.0A CN201410443141A CN104916579B CN 104916579 B CN104916579 B CN 104916579B CN 201410443141 A CN201410443141 A CN 201410443141A CN 104916579 B CN104916579 B CN 104916579B
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layer
conductive column
side wall
semiconductor device
device structure
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CN104916579A (zh
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李立国
刘宜臻
刘永盛
赖怡仁
陈俊仁
郑锡圭
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本发明提供了一种半导体器件结构和制造方法。该方法包括在半导体衬底上方形成导电柱。该方法还包括在导电柱上方形成焊料层。该方法还包括在焊料层上方形成水溶性助焊剂。此外，该方法包括使焊料层回流以在导电柱上方形成焊料凸块并在焊料层回流期间在导电柱的侧壁上方形成侧壁保护层。本发明还涉及半导体器件结构和制造方法。

Description

半导体器件结构和制造方法
技术领域
本发明涉及半导体器件结构和制造方法。
背景技术
半导体器件在多种电子应用中使用，诸如个人电脑、手机、数码相机和其它电子设备。半导体器件的制造包括在半导体衬底上方依次沉积绝缘层或介电层、导电层和半导体层，以及采用光刻工艺和蚀刻工艺图案化各种材料层以在半导体衬底上形成电路部件和元件。
半导体工业通过持续减小最小部件尺寸不断提高各种电子部件(例如，晶体管、二极管、电阻、电容等)的集成密度，这允许更多的部件被集成到给定区域中。输入和输出(I/O)连接件的数目显著提高。正在开发利用较少区域或更小高度的较小封装结构以封装半导体器件。诸如导电柱的导电凸块用以在芯片的I/O焊盘和封装件的引线框架的衬底之间建立电接触。
新的封装技术已经被开发出来以提高半导体器件的密度和功能。用于半导体器件的这些相对新型的封装技术在制造上面临着挑战。
发明内容
为了解决现有技术中的问题，本发明提供了一种用于形成半导体器件结构的方法，包括：在半导体衬底上方形成导电柱；在所述导电柱上方形成焊料层；在所述焊料层上方形成水溶性助焊剂；以及回流所述焊料层以在所述导电柱上方形成焊料凸块，并且在回流所述焊料层期间在所述导电柱的侧壁上方形成侧壁保护层。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱；还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM层的一部分以形成所述UBM元件。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱；还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM层的一部分以形成所述UBM元件；其中，在所述掩膜层的所述开口中形成所述焊料层。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱；还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM层的一部分以形成所述UBM元件；其中，使用电镀工艺形成所述导电柱。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱；还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM层的一部分以形成所述UBM元件；其中，使用电镀工艺形成所述焊料层。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱；还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM层的一部分以形成所述UBM元件；其中，在形成所述UBM元件之后形成所述水溶性助焊剂。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱；还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM层的一部分以形成所述UBM元件；还包括在形成所述焊料凸块之后去除所述水溶性助焊剂。
在上述用于形成半导体器件结构的方法中，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱；还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM层的一部分以形成所述UBM元件；其中，在去除所述掩膜层之后形成所述侧壁保护层。
在上述用于形成半导体器件结构的方法中，其中，所述焊料层的一部分在所述导电柱的侧壁上方延伸以形成所述侧壁保护层。
根据本发明的另一个方面，提供了一种用于形成半导体器件结构的方法，包括：在半导体衬底上方形成导电柱；在所述导电柱上方形成焊料层；在所述焊料层上方形成水溶性助焊剂；以及加热所述水溶性助焊剂和所述焊料层以在所述导电柱的侧壁上方形成侧壁保护层。
在上述用于形成半导体器件结构的方法中，还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM的一部分以形成凸块下金属化(UBM)元件。
在上述用于形成半导体器件结构的方法中，还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM的一部分以形成凸块下金属化(UBM)元件；其中，通过在由所述掩膜层的所述开口暴露的所述UBM层上方电镀铜来形成所述导电柱。
在上述用于形成半导体器件结构的方法中，还包括：在所述半导体衬底上方形成凸块下金属化(UBM)层；在所述UBM层上方形成掩膜层，其中，所述掩膜层具有暴露所述UBM层的开口；在所述开口中形成所述导电柱；去除所述掩膜层；以及去除所述UBM的一部分以形成凸块下金属化(UBM)元件；其中，以低于所述焊料层的回流温度的温度加热所述水溶性助焊剂和所述焊料层。
在上述用于形成半导体器件结构的方法中，其中，所述焊料层的一部分在所述导电柱的所述侧壁上方延伸以形成所述侧壁保护层。
根据本发明的又一个方面，提供了一种半导体器件结构，包括：半导体衬底；导电柱，位于所述半导体衬底上方；焊料凸块，位于所述导电柱上方；以及侧壁保护层，位于所述导电柱的侧壁上方，其中，所述侧壁保护层和所述焊料凸块都包含锡(Sn)和第二元素。
在上述半导体器件结构中，其中，所述第二元素包含银(Ag)、铋(Bi)、金(Au)、铝(Al)、砷(As)、铁(Fe)、镍(Ni)、铅(Pb)或锑(Sb)。
在上述半导体器件结构中，其中，所述第二元素包含银(Ag)、铋(Bi)、金(Au)、铝(Al)、砷(As)、铁(Fe)、镍(Ni)、铅(Pb)或锑(Sb)；其中，所述侧壁保护层还包含铜(Cu)。
在上述半导体器件结构中，其中，所述侧壁保护层和所述焊料凸块的材料基本相同。
在上述半导体器件结构中，还包括位于所述导电柱和所述半导体衬底之间的凸块下金属化(UBM)元件，其中，所述侧壁保护层覆盖所述UBM元件的侧表面。
附图说明
当结合附图进行阅读时，根据下面详细的描述可以最佳理解本发明的各个方面。应该注意，根据工业中的标准实践，各种部件没有被按比例绘制。实际上，为了清楚的讨论，各种部件的尺寸可以被任意增加或减少。
图1A至图1H是根据一些实施例的用于形成半导体器件结构的工艺的各个阶段的截面图。
图2A至图2E是根据一些实施例的用于形成半导体器件结构的工艺的各个阶段的截面图。
图3是根据一些实施例的半导体器件结构的截面图。
具体实施方式
以下公开提供了用于实现所提供主题的不同特征的许多不同的实施例或实例。以下描述部件和布置的具体实例以简化本公开。当然，这些仅仅是实例而不用于限制。例如，在以下描述中第一部件形成在第二部件上方或第二部件上可包括第一和第二部件形成直接接触的实施例，并且还可以包括形成插入第一和第二部件之间的附加部件以使第一和第二部件不直接接触的实施例。再者，本公开可在各个示例中重复参考标号和/或字母。该重复是为了简明和清楚，而且其本身没有规定所述各种实施例和/或配置之间的关系。
而且，为了便于描述，诸如“在…下方”、“在…下面”、“下”、“在…上方”、“上”等空间相对位置术语在本文中可以用于描述如附图所示的一个元件或部件与另一个(或另一些)元件或部件的关系。除了图中描述的方位外，这些空间相对位置术语旨在包括器件在使用或操作中的不同方位。装置可以以其他方式定向(旋转90度或在其他方位上)，并且本文中使用的空间相对位置描述符可以同样地进行相应的解释。
图1A至图1H是根据一些实施例用于形成半导体器件结构的工艺的各个阶段的截面图。参照图1A，提供了一种半导体衬底100。在一些实施例中，该半导体衬底100定义为指代包含一种或多种半导体材料的结构。在一些实施例中，该半导体衬底100包括半导体晶圆(诸如硅晶圆)或半导体晶圆的一部分。在一些实施例中，半导体衬底100包括处于单晶结构、多晶体结构或非晶体结构的包含硅或锗的元素半导体材料。在一些其它实施例中，半导体衬底100包括化合物半导体(诸如碳化硅、砷化镓、磷化钾、磷化铟、砷化铟)、合金半导体(诸如SiGe、GaAsP、AlInAs、AlGaAs、GaInAs、GaInP、GaInAsP)或它们的组合。在一些实施例中，半导体衬底100包括多层半导体、绝缘体上半导体(SOI)(诸如绝缘体上硅或绝缘体上锗)或它们的组合。
在一些实施例中，半导体衬底100包括隔离部件(未示出)。隔离部件可限定并隔离在半导体衬底100中形成的各种器件元件(未示出)。隔离部件包括浅沟槽隔离(STI)部件、局部硅氧化(LOCOS)部件、其它合适的隔离部件或它们的组合。
可在半导体衬底100中形成的各种器件元件的实例包括晶体管(例如，金属氧化物半导体场效应晶体管(MOSFET)、互补金属氧化物半导体(CMOS)晶体管、双极结型晶体管(BJT)、高压晶体管、高频晶体管、p沟道和/或n沟道场效应晶体管(PFET/NFET)等)、二极管、其它适用元件或它们的组合。
执行多种工艺来形成各种器件元件，这些工艺例如包括沉积、光刻、蚀刻、注入、退火、平坦化和/或其它合适的工艺。在一些实施例中，多种器件元件互连以形成集成电路器件。例如，该集成电路器件包括逻辑器件、存储器件(诸如静态随机存取存储器(SRAM)和/或动态随机存取存储器(DRAM))、射频(RF)器件、输入/输出(I/O)器件、片上系统芯片(SoC)器件、其它适用器件或它们的组合。
如图1A所示，根据一些实施例，介电层102在半导体衬底100上方形成。在一些实施例中，介电层102为堆叠的多个介电层。在一些实施例中，各种导电部件在介电层102中形成。导电部件例如包括多个水平互连件(诸如导线)和多个垂直互连件(诸如导电通孔或导电接触件)。形成在介电层102中的导电部件在于半导体衬底100中或上形成的器件元件(未示出)和介电层102上方的导电线路之间形成导电路径。该器件元件可为形成于半导体衬底100中或上方的掺杂区域。可选地，该器件元件可为形成于半导体衬底100中或上方的栅电极。多根导线和多个导电通孔或接触件(未示出)可在介电层中形成以电连接至器件元件。介电层102和导电部件可在半导体衬底100上方共同形成互连结构。
在一些实施例中，介电层102由氧化硅、氮化硅、氮氧化硅、正硅酸乙酯(TEOS)氧化物、磷硅玻璃(PSG)、硼磷硅玻璃(BPSG)、氟化硅玻璃(FSG)、碳掺杂的氧化硅、无定形氟化碳、低k介电材料、其他合适的材料或它们的组合形成。低k介电材料可具有低于约3.9或低于约2.8的介电常数(k值)。在一些实施例中，在介电层102中形成的导电部件由铜、铝、钨、钛、镍、金、铂、其它合适的材料或它们的组合形成。可执行多次沉积、光刻和蚀刻工艺以形成介电层102和位于其中的导电部件。
如图1A所示，根据一些实施例，导电部件104在半导体衬底100上方的介电层102上方形成。在一些实施例中，导电部件104为形成在顶层的层间介电层中或上的顶部金属化层。在一些实施例中，导电部件104包括彼此电连接的导电线路区和导电焊盘区。该导电部件104还可被称作重分布层。在一些实施例中，导电焊盘区为重分布层的某区域或端部。在一些实施例中，导电部件104通过形成在介电层102中的一些导线和导电通孔电连接至半导体衬底100中的一个器件元件。在一些实施例中，图1A示出了导电部件104的导电焊盘区的截面图。在一些其他实施例中，图1A示出了导电部件104的导电线路区的截面图。
在一些实施例中，导电部件104由AlCu、Al、Cu、其他合适的材料或它们的组合形成。在一些实施例中，导电部件104通过图案化沉积在介电层102上方的导电层而形成。例如，采用光刻工艺和蚀刻工艺图案化导电层以形成包括导电部件104的多个导电部件。
如图1A所示，根据一些实施例，将钝化层103沉积在介电层102和导电部件104上方并图案化。图案化钝化层103以使其具有暴露导电部件104的一部分的开口。该开口允许随后形成凸块。在一些实施例中，钝化层103由非导电材料形成。非导电材料可包括氮化硅、氮氧化硅、氧化硅、无掺杂硅玻璃(USG)、其它合适的材料或它们的组合。在一些实施例中，采用化学汽相沉积(CVD)工艺、旋涂工艺、物理汽相沉积(PVD)工艺、其它适用工艺或它们的组合沉积钝化材料层。此后，执行光刻工艺和蚀刻工艺来完成钝化层103的形成。本公开的实施例具有很多变化。在一些实施例中，并不形成钝化层103。
如图1A所示，根据一些实施例，保护层105沉积在钝化层103和导电部件104上方并进行图案化。图案化保护层105以使其具有暴露导电部件104的一部分的开口，该开口允许随后形成凸块。在一些实施例中，如图1A所示，保护层105的开口小于钝化层103的开口。保护层105的开口位于钝化层103的开口内。在一些其它实施例中，保护层105的开口大于或基本等于钝化层103的开口。
在一些实施例中，保护层105比较软并因此具有减少固有应力的功能。在一些实施例中，保护层105由有机材料制成。该有机材料可包括聚苯并恶唑(PBO)、聚酰亚胺(PI)、环氧树脂、苯并环丁烯(BCB)、其它合适的材料或它们的组合。本公开的实施例并不局限于此。可使用其它比较软的有机材料或介电材料形成保护层105。在一些实施例中，采用旋涂工艺、CVD工艺、PVD工艺、其它适用工艺或它们的组合来沉积保护材料层。此后，图案化保护材料层以形成保护层105。本公开的实施例具有多种变化。在一些实施例中，并不形成保护层105。
如图1B所示，根据一些实施例，将凸块下金属化(UBM)层106沉积在保护层105和导电部件104上方。在一些实施例中，UBM层106为单层或堆叠的多层。例如，UBM层106可由Ti、TiW、TiCu、Ni、其它合适的材料或它们的组合制成。例如，在一些实施例中，该UBM层106包括具有扩散势垒层(或粘合层)和晶种层的子层。
在一些实施例中，扩散势垒层由钛(Ti)、钽(Ta)、氮化钛(TiN)、氮化钽(TaN)、其它合适的材料或它们的组合制成。在一些实施例中，晶种层为形成在扩散势垒层上的铜晶种层。铜晶种层可由铜或包括银、铬、镍、锡、金或它们的组合的诸多铜合金中的一种制成。在一些实施例中，采用物理汽相沉积(PVD)工艺(例如包括溅射工艺或蒸镀工艺)、化学汽相沉积(CVD)工艺、电镀工艺、旋涂工艺、另一适用工艺或它们的组合来沉积UBM层106。
如图1C所示，根据一些实施例，在UBM层106上方形成掩膜层108。掩膜层108用于限定凸块窗。掩膜108具有包括开口110在内的一个或多个开口。在一些实施例中，开口110暴露UBM层106的位于导电部件104上方的一部分。在一些实施例中，开口110比导电部件104宽。在一些实施例中，掩膜层108为光刻胶层、干膜、其它合适的膜或它们的组合。在一些实施例中，采用旋涂工艺、喷涂工艺、CVD工艺、附接工艺、其它适用工艺或它们的组合沉积掩膜层108。在一些实施例中，通过使用包括掩膜工艺、曝光工艺、烘焙工艺、显影工艺和漂洗工艺(未必以此顺序)中的一种或多种的光刻工艺来图案化掩膜层108。
如图1D所示，根据一些实施例，将导电柱112沉积在由掩膜层108的开口110暴露的UBM层106上方。在一些实施例中，导电柱112由铜(Cu)、金(Au)、铂(Pt)、钛(Ti)、镍(Ni)、铝(Al)、其它合适的材料或它们的组合制成。在一些实施例中，导电柱112包括纯元素铜、含一些杂质的铜或包含少量元素的铜合金。例如，铜合金可包含钽、铟、锡、锌、锰、铬、钛、锗、锶、铂、镁、铝、锆、其它合适的元素或它们的组合。
在一些实施例中，采用电镀工艺、PVD工艺、CVD工艺、化学镀工艺、其它适用工艺或它们的组合来形成导电柱112。在一些实施例中，UBM层106还用作电镀晶种层。诸如铜的合适的导电材料电镀到UBM层106上以形成导电柱112。
如图1D所示，根据一些实施例，在导电柱112上方形成焊料层114。焊料层114包括锡(Sn)并可包含铅或不含铅。在一些实施例中，焊料层114包含锡(Sn)和其它材料，这些材料包括铅(Pb)、银(Ag)、铋(Bi)、铜(Cu)、金(Au)、铝(Al)、砷(As)、铁(Fe)、镍(Ni)、锑(Sb)、其它合适的材料或它们的组合。在一些实施例中，采用电镀工艺或其它适用工艺形成焊料层114。
本公开的实施例具有很多变化。在一些实施例中，在形成焊料层114之前，在导电柱112上方形成势垒层(未示出)。该势垒层可用以防止导电柱112中的离子(诸如铜离子)扩散到焊料层114中。对离子扩散(诸如铜扩散)的防止可增强可靠性和粘接强度。在一些实施例中，势垒层由由镍(Ni)、金(Au)、锡铅(SnPb)、银(Ag)、钯(Pd)、铟(In)、镍钯金(NiPdAu)、镍-金(NiAu)、其它合适的材料或它们的组合制成。在一些实施例中，采用电镀工艺、化学镀工艺、PVD工艺、CVD工艺、旋涂工艺、其它适用工艺或它们的组合来形成势垒层。
此后，根据一些实施例，如图1E所示，去除掩膜层108。在一些实施例中，采用剥离工艺、灰化工艺、其它适用工艺或它们的组合来去除掩膜层108。
如图1F所示，根据一些实施例，随后图案化UBM层106以在半导体衬底100上方形成一个或多个UBM元件。在一些实施例中，如图1F所示，在导电部件104上方形成UBM元件106a。在一些实施例中，采用蚀刻工艺图案化UBM层106。蚀刻工艺可包括干法蚀刻工艺、湿法蚀刻工艺或它们的组合。例如，焊料层114和导电柱112共同用作蚀刻掩膜。在蚀刻工艺之后，去除未由蚀刻掩膜覆盖的UBM层106以暴露保护层105。因此，形成了包括UBM元件106a在内的一个或多个UBM元件。
如图1G所示，根据一些实施例，在焊料层114上方形成助焊剂116。在一些实施例中，同样在保护层105上方形成助焊剂116。在一些实施例中，助焊剂116也形成在导电柱112的侧壁上方。在一些实施例中，助焊剂116为水溶性助焊剂。该水溶性助焊剂可包括合适的皂化剂、合适的松香、二乙二醇丁醚、合适的表面活性剂、合适的有机酸、乙二醇、乙氧基化牛脂烷基胺、合适的有机盐、合适的矿物盐、其它合适的材料或它们的组合。在一些实施例中，采用旋涂工艺、喷涂工艺、应用工艺、CVD工艺、其它适用工艺或它们的组合形成助焊剂116。在一些实施例中，助焊剂116具有的厚度在约5μm至约50μm的范围内。在一些其它实施例中，助焊剂116具有的厚度在约10μm至约30μm的范围内。在一些其它实施例中，助焊剂116具有的厚度小于约5μm。
如图1H所示，根据一些实施例，焊料层114回流以在导电柱112上方形成焊料凸块114a。在一些实施例中，焊料层114以从约200℃至约280℃范围内的回流温度回流。在一些其它实施例中，回流温度在约220℃至约260℃的范围内。在一些实施例中，在形成焊料凸块114a的回流工艺之后执行清洗操作来去除助焊剂残渣。在一些实施例中，由于助焊剂116的水溶性特性，所以易于执行清洗工作。
如图1H所示，根据一些实施例，侧壁保护层118形成在导电柱112的侧壁上方。在一些实施例中，导电柱112的侧壁例如由侧壁保护层118完全覆盖。在一些实施例中，在导电柱112的侧壁上共形形成侧壁保护层118。根据一些实施例，如图1H所示，侧壁保护层118覆盖UBM元件106a的侧表面107。在一些实施例中，侧壁保护层118直接接触UBM元件106a的侧表面107。在一些实施例中，在回流工艺期间，侧壁保护层118在导电柱112的侧壁上方形成。在一些实施例中，侧壁保护层118直接接触保护层105。在一些实施例中，侧壁保护层118不直接接触导电部件104。
研究表明，如果使用的助焊剂116是水溶性的，则会形成侧壁保护层118。侧壁保护层118的形成机制并不清楚。可能的情况是，水溶性助焊剂116会引起焊料层114的材料在导电柱112的侧壁上方延伸。例如，焊料层114的一部分可溶解和/或散布在水溶性助焊剂116中且可被引导至导电柱112的侧壁上。因此，导电柱112的侧壁被涂覆有侧壁保护层118。在一些实施例中，侧壁保护层118和焊料凸块114a同时形成。在一些实施例中，侧壁保护层118在焊料凸块114a完全形成之前形成。在一些其它实施例中，侧壁保护层118在焊料凸块114a完全形成之后形成。
在一些实施例中，侧壁保护层118包括锡(Sn)。在一些实施例中，由于水溶性助焊剂116的影响，所以焊料层114的一部分在导电柱112的侧壁上方延伸以形成侧壁保护层118。在一些实施例中，侧壁保护层118包括含铜的锡合金(SnCu)。该SnCu合金可由来自焊料层114的锡与来自导电柱112的铜之间的反应而形成。在一些实施例中，侧壁保护层118与焊料凸块114a的材料可基本相同。
在一些实施例中，焊料凸块114a包括锡(Sn)和除锡外的元素。例如，焊料凸块114a还包括银(Ag)、铋(Bi)、金(Au)、铝(Al)、砷(As)、铁(Fe)、镍(Ni)、铅(Pb)或锑(Sb)。在一些实施例中，侧壁保护层118还包括除锡外的元素。在一些实施例中，侧壁保护层118包括锡和第二元素。第二元素例如包括银(Ag)、铋(Bi)、金(Au)、铝(Al)、砷(As)、铁(Fe)、镍(Ni)、铅(Pb)或锑(Sb)。在一些实施例中，侧壁保护层118包括锡、铜和第三元素。第三元素例如包括银(Ag)、铋(Bi)、金(Au)、铝(Al)、砷(As)、铁(Fe)、镍(Ni)、铅(Pb)或锑(Sb)。
本公开的实施例具有很多变化。在一些实施例中，在焊料层114回流期间未形成侧壁保护层118。在一些实施例中，以低于焊料层114的回流温度的温度共同加热助焊剂116和焊料层114。该温度可在约150℃至约190℃的范围内。在一些其它实施中，该温度在约120℃至约180℃的范围内。即便焊料层114并不回流以形成焊料凸块114a，侧壁保护层118仍在导电柱112的侧壁上方形成。侧壁保护层118的形成机制并不清楚。可能的情况是，焊料层114的一部分可溶解和/或散布到水溶性助焊剂116中并可被引导至导电柱112的侧壁上，即便加热温度不如回流温度高。在一些实施例中，加热温度被进一步提高至基本等同或高于回流温度以形成焊料凸块114a。在这些情况下，侧壁保护层118在形成焊料凸块114a之前形成。
在一些实施例中，导电柱112由铜或在制造过程中易于被氧化的另一材料制成。被氧化的铜柱可导致电子部件与衬底的附着性低劣。这种低劣的附着性可能由于漏电而导致可靠性问题。被氧化的铜柱还可能导致底部填充胶沿着底部填充胶与铜柱之间的界面开裂。这种开裂可能传导至下层低k介电层或用以将铜柱接合至衬底的焊料。尽管上面提到的问题可能并不经常发生，但仍期望减少或避免导电柱的氧化。
在本公开的一些实施例中，由于存在侧壁保护层118，导电柱112受到保护。故防止或显著减少了导电柱112的氧化。导电柱112的质量和可靠性得以提高。通过用于形成焊料凸块114a的回流工艺形成侧壁保护层118。在一些实施例中，无需或不使用另外的工艺来形成侧壁保护层118。故极大降低了制造成本和制造时间。助焊剂116是在清洗操作过程中易于去除的水溶性助焊剂。因此进一步降低了制造成本和制造时间。
本公开的实施例具有很多变化。正如上面所提到的，在一些实施例中，钝化层103和保护层105是可选择的。图2A至图2E是根据一些实施例用于形成半导体器件结构的工艺的不同阶段的截面图。在图2A至图2E所示的实施例中，不形成钝化层103和保护层105。
如图2A所示，提供了一种与图1A所示的结构相似的结构。如图2A所示，不形成钝化层103和保护层105。如图2A所示，根据一些实施例，UBM层106在介电层102和导电部件104上方形成。UBM层106的材料和形成方法与图1B中所示的UBM层106的材料和形成方法类似。此后，根据一些实施例，如图2A所示，在UBM层106上方形成具有开口110’的掩膜层108’。如图2A所示，导电部件104比开口110’宽。在一些实施例中，掩膜层108’的材料和形成方法与图1C中所示的掩膜层108的材料和形成方法相似。
如图2B所示，根据一些实施例，导电柱112’形成在由掩膜层108’的开口110’暴露的UBM层106的上方。在一些实施例中，导电柱112’的材料和形成方法与图1D中所示的导电柱112的材料和形成方法类似。如图2B所示，导电部件104比导电柱112’宽。此后，如图2B所示，根据一些实施例，将焊料层114’沉积在导电柱112’上方。在一些实施例中，焊料层114’的材料和形成方法与图1D中所示的焊料层114的材料和形成方法类似。势垒层(未示出)可在焊料层114’与导电柱112’之间形成。
如图2C所示，根据一些实施例去除掩膜层108’。此后，如图2D所示，根据一些实施例，图案化UBM层106以形成包括UBM元件106a的一个或多个UBM元件。如图2D所示，根据一些实施例，在焊料层114’上方形成助焊剂116。在一些实施例中，同样在导电柱112’的侧壁上方、导电部件104和介电层102上方形成助焊剂116。助焊剂116的材料和形成方法可与图1G中所示的助焊剂116的材料和形成方法类似。
如图2E所示，根据一些实施例，回流焊料层114’以形成焊料凸块114a’。在一些实施例中，用于形成焊料凸块114a’的回流工艺与图1H中所示的焊料凸块114a的回流工艺类似。可选地执行清洗操作以在回流工艺之后去除助焊剂残渣。
如图2E所示，根据一些实施例，在导电柱112’的侧壁上方形成侧壁保护层118。在一些实施例中，侧壁保护层118与导电部件104直接接触。在一些实施例中，侧壁保护层118覆盖UBM元件106a的侧表面107。在一些实施例中，侧壁保护层118直接接触UBM元件106a的侧表面107。在一些实施例中，侧壁保护层118的材料和形成方法与图1H中所示侧壁保护层118的材料和形成方法类似。因此，可防止导电柱112’被氧化。提高了导电柱112’的质量和可靠性。
本公开的实施例具有很多变化。图3是根据一些实施例的半导体器件结构的截面图。在一些实施例中，侧壁保护层118直接接触导电部件104。在一些实施例中，侧壁保护层118覆盖UBM元件106a的侧表面107。在一些实施例中，侧壁保护层118直接接触UBM元件106a的侧表面107。图3中所示实施例与图2E中所示的实施例类似。如图3所示，形成了钝化层103而未形成保护层105。钝化层103的材料和形成方法与图1A中所示的钝化层103的材料和形成方法类似。如图3所示，在制作过程中，侧壁保护层118保护导电柱112’不被氧化。
在一些实施例中，图1H、图2E和图3中所示的结构接合到衬底上以形成封装结构(未示出)。执行合适的工艺(诸如回流工艺、热压缩工艺等)以在上述结构和衬底之间形成接合结构。例如，焊料凸块可接合到衬底上方形成的焊盘或线路上。在一些实施例中，在半导体衬底与衬底之间形成保护材料以围绕接合结构。在一些实施例中，保护材料包括树脂材料，诸如环氧树脂、酚醛树脂、其它合适的材料或它们的组合。在一些实施例中，保护材料包括底部填充材料、非导电膏(NCP)、其它合适的隔离材料或它们的组合。在一些实施例中，分配保护材料、使保护材料流动和/或应用保护材料以围绕封装结构的接合结构。
本公开的实施例采用水溶性助焊剂辅助回流工艺用于在导电柱上方形成焊料凸块。由于水溶性助焊剂的影响，在导电柱的侧壁上方形成了侧壁保护层。侧壁保护层保护导电柱不被氧化。导电柱的质量和可靠性得以极大提高。侧壁保护层在进行回流工艺的同时形成。并未采用造价昂贵的工艺(诸如电镀工艺和/或浸渍工艺)形成侧壁保护层。同时还极大低降低了制造成本和制造时间。
根据一些实施例，提供了一种用于形成半导体器件结构的方法。该方法包括在半导体衬底上方形成导电柱。该方法还包括在导电柱上方形成焊料层。该方法还包括在焊料层上方形成水溶性助焊剂。此外，该方法还包括使焊料层回流以在导电柱上方形成焊料凸块并在焊料层回流期间在导电柱的侧壁上方形成侧壁保护层。
根据一些实施例，提供了一种用于形成半导体器件结构的方法。该方法包括在半导体衬底上方形成导电柱。该方法还包括在导电柱上方形成焊料层。该方法还包括在焊料层上方形成水溶性助焊剂。此外，该方法包括加热水溶性助焊剂和焊料层以在导电柱的侧壁上方形成侧壁保护层。
根据一些实施例，提供了一种半导体器件结构。该半导体器件结构包括半导体衬底和位于半导体衬底上方的导电柱。该半导体器件结构还包括位于导电柱上方的焊料凸块。半导体器件结构还包括位于导电柱的侧壁上方的侧壁保护层。侧壁保护层和焊料凸块都包含锡(Sn)和第二元素。
上面概述了若干实施例的部件，使得本领域普通技术人员可以更好地理解本发明的各个方面。本领域普通技术人员应该理解，可以很容易地使用本发明作为基础来设计或更改其他用于达到与这里所介绍实施例相同的目的和/或实现相同优点的工艺和结构。本领域普通技术人员也应该意识到，这种等效构造并不背离本发明的精神和范围，并且在不背离本发明的精神和范围的情况下，可以进行多种变化、替换以及改变。

Claims (19)

1.一种用于形成半导体器件结构的方法，包括：
在半导体衬底上方形成导电柱；
在所述导电柱上方形成焊料层；
在所述焊料层上方形成水溶性助焊剂；
以低于所述焊料层的回流温度的温度加热所述水溶性助焊剂和所述焊料层，以在所述导电柱的侧壁上方形成侧壁保护层；以及
回流所述焊料层以在所述导电柱上方形成焊料凸块。
2.根据权利要求1所述的用于形成半导体器件结构的方法，还包括在所述半导体衬底上方形成凸块下金属化(UBM)元件，其中，在所述凸块下金属化元件上形成所述导电柱。
3.根据权利要求2所述的用于形成半导体器件结构的方法，还包括：
在所述半导体衬底上方形成凸块下金属化(UBM)层；
在所述凸块下金属化层上方形成掩膜层，其中，所述掩膜层具有暴露所述凸块下金属化层的开口；
在所述开口中形成所述导电柱；
去除所述掩膜层；以及
去除所述凸块下金属化层的一部分以形成所述凸块下金属化元件。
4.根据权利要求3所述的用于形成半导体器件结构的方法，其中，在所述掩膜层的所述开口中形成所述焊料层。
5.根据权利要求3所述的用于形成半导体器件结构的方法，其中，使用电镀工艺形成所述导电柱。
6.根据权利要求3所述的用于形成半导体器件结构的方法，其中，使用电镀工艺形成所述焊料层。
7.根据权利要求3所述的用于形成半导体器件结构的方法，其中，在形成所述凸块下金属化元件之后形成所述水溶性助焊剂。
8.根据权利要求3所述的用于形成半导体器件结构的方法，还包括在形成所述焊料凸块之后去除所述水溶性助焊剂。
9.根据权利要求3所述的用于形成半导体器件结构的方法，其中，在去除所述掩膜层之后形成所述侧壁保护层。
10.根据权利要求1所述的用于形成半导体器件结构的方法，其中，所述焊料层的一部分在所述导电柱的侧壁上方延伸以形成所述侧壁保护层。
11.一种用于形成半导体器件结构的方法，包括：
在半导体衬底上方形成导电柱；
在所述导电柱上方形成焊料层；
在所述焊料层上方形成水溶性助焊剂；以及
以低于所述焊料层的回流温度的温度加热所述水溶性助焊剂和所述焊料层以在所述导电柱的侧壁上方形成侧壁保护层。
12.根据权利要求11所述的用于形成半导体器件结构的方法，还包括：
在所述半导体衬底上方形成凸块下金属化(UBM)层；
在所述凸块下金属化层上方形成掩膜层，其中，所述掩膜层具有暴露所述凸块下金属化层的开口；
在所述开口中形成所述导电柱；
去除所述掩膜层；以及
去除所述凸块下金属化层的一部分以形成凸块下金属化(UBM)元件。
13.根据权利要求12所述的用于形成半导体器件结构的方法，其中，通过在由所述掩膜层的所述开口暴露的所述凸块下金属化层上方电镀铜来形成所述导电柱。
14.根据权利要求11所述的用于形成半导体器件结构的方法，其中，所述焊料层的一部分在所述导电柱的所述侧壁上方延伸以形成所述侧壁保护层。
15.一种根据权利要求1-14中任一项所述的方法形成的半导体器件结构，包括：
半导体衬底；
导电柱，位于所述半导体衬底上方；
焊料凸块，位于所述导电柱上方；以及
侧壁保护层，位于所述导电柱的侧壁上方，其中，所述侧壁保护层和所述焊料凸块都包含锡(Sn)和第二元素。
16.根据权利要求15所述的半导体器件结构，其中，所述第二元素包含银(Ag)、铋(Bi)、金(Au)、铝(Al)、砷(As)、铁(Fe)、镍(Ni)、铅(Pb)或锑(Sb)。
17.根据权利要求16所述的半导体器件结构，其中，所述侧壁保护层还包含铜(Cu)。
18.根据权利要求15所述的半导体器件结构，其中，所述侧壁保护层和所述焊料凸块的材料相同。
19.根据权利要求15所述的半导体器件结构，还包括位于所述导电柱和所述半导体衬底之间的凸块下金属化(UBM)元件，其中，所述侧壁保护层覆盖所述凸块下金属化元件的侧表面。
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