CN104867812A - 多晶硅薄膜和半导体器件的制备方法、显示基板及装置 - Google Patents

多晶硅薄膜和半导体器件的制备方法、显示基板及装置 Download PDF

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CN104867812A
CN104867812A CN201510142635.XA CN201510142635A CN104867812A CN 104867812 A CN104867812 A CN 104867812A CN 201510142635 A CN201510142635 A CN 201510142635A CN 104867812 A CN104867812 A CN 104867812A
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resilient coating
preparation
polysilicon membrane
groove
amorphous silicon
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徐文清
龙春平
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to US14/894,908 priority patent/US10062566B2/en
Priority to PCT/CN2015/084215 priority patent/WO2016155149A1/zh
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Abstract

本发明公开了一种多晶硅薄膜和半导体器件的制备方法、显示基板及装置，所述多晶硅薄膜的制备方法包括：在基板上形成缓冲层，在所述缓冲层的表面形成规则排列的第一凹槽，在所述缓冲层上形成非晶硅薄膜，采用光学退火工艺对所述非晶硅薄膜进行结晶处理从而形成多晶硅薄膜。本发明提供的技术方案在形成非晶硅薄膜之前，在缓冲层上形成规则排列的第一凹槽，然后采用光学退火工艺进行结晶处理。由于第一凹槽处不是激光束的焦点，因此能量相对于其他位置较低，在结晶过程中形成未融化的结晶种子，从而形成多晶硅。由于这些第一凹槽是规则排列的，因此能够形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。

Description

多晶硅薄膜和半导体器件的制备方法、显示基板及装置
技术领域
本发明涉及半导体技术领域，尤其涉及一种多晶硅薄膜和半导体器件的制备方法、显示基板及装置。
背景技术
现有的非晶硅本身存在很多无法避免的缺点，例如，低迁移率、低稳定性等。与非晶硅相比，低温多晶硅具有较高的迁移率和稳定性。因此，低温多晶硅技术迅速发展。然而，多晶硅的晶粒尺寸的不均匀性以及晶粒的不规则排列会引起阈值电压的不均匀性，从而影响显示面板的画面品质。
发明内容
为解决上述问题，本发明提供一种多晶硅薄膜和半导体器件的制备方法、显示基板及装置，用于解决现有技术中多晶硅的晶粒尺寸不均匀以及晶粒排列不规则的问题。
为此，本发明提供一种多晶硅薄膜的制备方法，包括：
在基板上形成缓冲层；
在所述缓冲层的表面形成规则排列的第一凹槽；
在所述缓冲层上形成非晶硅薄膜；
采用光学退火工艺对所述非晶硅薄膜进行结晶处理，以形成多晶硅薄膜。
可选的，所述光学退火工艺包括准分子激光退火工艺。
可选的，所述缓冲层包括至少一个第一缓冲子层和至少一个第二缓冲子层，所述第一缓冲子层与所述第二缓冲子层间隔排列。
可选的，所述第一缓冲子层的构成材料包括二氧化硅，所述第二缓冲子层的构成材料包括氮化硅。
可选的，所述第一凹槽之间的距离范围包括300nm至400nm。
可选的，所述第一凹槽的形状为圆形或者方形。
可选的，所述采用光学退火工艺对所述非晶硅薄膜进行结晶处理的步骤之前包括：
对所述非晶硅薄膜进行脱氢处理。
可选的，所述缓冲层的构成材料包括二氧化硅。
可选的，所述缓冲层的厚度范围包括100nm至600nm。
本发明还提供一种半导体器件的制备方法，包括上述任一多晶硅薄膜的制备方法。
本发明还提供一种显示基板，包括基板，所述基板上设置有缓冲层，所述缓冲层的表面设置有规则排列的第一凹槽，所述缓冲层上设置有多晶硅薄膜，所述多晶硅薄膜由非晶硅薄膜经过光学退火工艺进行结晶处理形成。
可选的，所述缓冲层包括至少一个第一缓冲子层和至少一个第二缓冲子层。
可选的，所述第一缓冲子层与所述第二缓冲子层间隔排列，所述第一缓冲子层的构成材料包括二氧化硅，所述第二缓冲子层的构成材料包括氮化硅。
可选的，所述第一凹槽之间的距离范围包括300nm至400nm。
可选的，所述缓冲层的厚度范围包括100nm至600nm。
本发明还提供一种显示装置，包括上述任一显示基板。
本发明具有下述有益效果：
本发明提供的多晶硅薄膜和半导体器件的制备方法、显示基板及装置中，所述多晶硅薄膜的制备方法包括：在基板上形成缓冲层，在所述缓冲层的表面形成规则排列的第一凹槽，在所述缓冲层上形成非晶硅薄膜，采用光学退火工艺对所述非晶硅薄膜进行结晶处理从而形成多晶硅薄膜。本发明提供的技术方案在形成非晶硅薄膜之前，在缓冲层上形成规则排列的第一凹槽，然后采用光学退火工艺进行结晶处理。由于第一凹槽处不是激光束的焦点，因此能量相对于其他位置较低，在结晶过程中形成未融化的结晶种子，从而形成多晶硅。由于这些第一凹槽是规则排列的，因此能够形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。
附图说明
图1为本发明实施例一提供的一种多晶硅薄膜的制备方法的流程图；
图2为实施例一形成的缓冲层的截面图；
图3为实施例一形成的缓冲层的A-A剖面图；
图4为实施例一形成的非晶硅薄膜的截面图；
图5为图4所示非晶硅薄膜进行退火处理的示意图；
图6为实施例一形成的多晶硅薄膜的截面图；
图7为实施例一形成的多晶硅薄膜的B-B剖面图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图对本发明提供的多晶硅薄膜和半导体器件的制备方法、显示基板及装置进行详细描述。
实施例一
图1为本发明实施例一提供的一种多晶硅薄膜的制备方法的流程图。如图1所示，所述多晶硅薄膜的制备方法包括：
步骤1001、在基板上形成缓冲层。
图2为实施例一形成的缓冲层的截面图，图3为实施例一形成的缓冲层的A-A剖面图。如图2和图3所示，在基板上形成缓冲层101。所述缓冲层101的构成材料包括二氧化硅。可选的，所述缓冲层101包括第一缓冲子层和第二缓冲子层。在实际应用中，所述缓冲层101可以包括多个第一缓冲子层和多个第二缓冲子层，所述第一缓冲子层与所述第二缓冲子层间隔排列。优选的，所述第一缓冲子层的构成材料包括二氧化硅，所述第二缓冲子层的构成材料包括氮化硅。优选的，所述缓冲层的厚度范围包括100nm至600nm。所述缓冲层用于平滑所述基板，防止在形成多晶硅薄膜的过程中基板内的杂质渗透进入多晶硅薄膜。
步骤1002、在所述缓冲层的表面形成规则排列的第一凹槽。
参见图2和图3，在所述缓冲层101的表面形成规则排列的第一凹槽102。在实际应用中，在所述缓冲层上涂敷光刻胶，采用掩膜板对所述光刻胶进行曝光显影以形成光刻胶保留区域和光刻胶去除区域，所述光刻胶去除区域对应于形成第一凹槽的图形区域，所述光刻胶保留区域对应于所述图形区域之外的其它区域，对所述缓冲层进行刻蚀以形成第一凹槽。可选的，所述第一凹槽102之间的距离范围包括300nm至400nm，所述第一凹槽102的形状为圆形或者方形。
步骤1003、在所述缓冲层上形成非晶硅薄膜。
图4为实施例一形成的非晶硅薄膜的截面图。如图4所示，在所述缓冲层101上形成非晶硅薄膜103。由于所述缓冲层101的表面设置有第一凹槽102，因此所述非晶硅薄膜103的表面也会形成与所述第一凹槽102对应的第二凹槽104。由于所述第一凹槽102是规则排列的，因此所述第二凹槽104也应是规则排列的。优选的，对所述非晶硅薄膜进行脱氢处理。
步骤1004、采用光学退火工艺对所述非晶硅薄膜进行结晶处理，以形成多晶硅薄膜。
图5为图4所示非晶硅薄膜进行退火处理的示意图。如图5所示，采用准分子激光退火工艺对所述非晶硅薄膜103进行结晶处理，由于所述非晶硅薄膜103上设置有规则排列的第二凹槽104，因此激光108的焦点只能够聚焦于所述第二凹槽104之外的区域，而不能够聚焦于所述第二凹槽104。所述第二凹槽104所接收的能量比所述第二凹槽104之外的区域要低一些，因此当所述第二凹槽104之外的区域的非晶硅融化时，所述第二凹槽104处仍会有一些非晶硅不能融化，从而形成结晶种子105。规则排列的第二凹槽104必然形成规则排列的结晶种子105，从而形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。
图6为实施例一形成的多晶硅薄膜的截面图，图7为实施例一形成的多晶硅薄膜的B-B剖面图。如图6和图7所示，在所述第一凹槽103内形成有结晶种子105，以所述结晶种子105为核心形成晶粒107。由于这些第一凹槽103是规则排列的，因此形成的晶粒107的尺寸均匀，而且晶粒107是规则排布的。
本实施例提供的多晶硅薄膜的制备方法中，所述多晶硅薄膜的制备方法包括：在基板上形成缓冲层，在所述缓冲层的表面形成规则排列的第一凹槽，在所述缓冲层上形成非晶硅薄膜，采用光学退火工艺对所述非晶硅薄膜进行结晶处理从而形成多晶硅薄膜。本实施例提供的技术方案在形成非晶硅薄膜之前，在缓冲层上形成规则排列的第一凹槽，然后采用光学退火工艺进行结晶处理。由于第一凹槽处不是激光束的焦点，因此能量相对于其他位置较低，在结晶过程中形成未融化的结晶种子，从而形成多晶硅。由于这些第一凹槽是规则排列的，因此能够形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。
实施例二
本实施例提供一种半导体器件的制备方法，包括上述实施例一提供的多晶硅薄膜的制备方法，具体内容可参照上述实施例一的描述，此处不再赘述。
本实施例提供的半导体器件的制备方法中，所述多晶硅薄膜的制备方法包括：在基板上形成缓冲层，在所述缓冲层的表面形成规则排列的第一凹槽，在所述缓冲层上形成非晶硅薄膜，采用光学退火工艺对所述非晶硅薄膜进行结晶处理从而形成多晶硅薄膜。本实施例提供的技术方案在形成非晶硅薄膜之前，在缓冲层上形成规则排列的第一凹槽，然后采用光学退火工艺进行结晶处理。由于第一凹槽处不是激光束的焦点，因此能量相对于其他位置较低，在结晶过程中形成未融化的结晶种子，从而形成多晶硅。由于这些第一凹槽是规则排列的，因此能够形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。
实施例三
本实施例提供一种显示基板，包括基板，所述基板上设置有缓冲层，所述缓冲层的表面设置有规则排列的第一凹槽，所述缓冲层上设置有多晶硅薄膜。所述多晶硅薄膜由非晶硅薄膜经过光学退火工艺进行结晶处理形成，具体来说，在所述缓冲层上形成非晶硅薄膜。由于所述缓冲层的表面设置有第一凹槽，因此所述非晶硅薄膜的表面也会形成与所述第一凹槽对应的第二凹槽。由于所述第一凹槽是规则排列的，因此所述第二凹槽也应是规则排列的。然后，采用准分子激光退火工艺对所述非晶硅薄膜进行结晶处理，由于所述非晶硅薄膜上设置有规则排列的第二凹槽，因此激光的焦点只能够聚焦于所述第二凹槽之外的区域，而不能够聚焦于所述第二凹槽。所述第二凹槽所接收的能量比所述第二凹槽之外的区域要低一些，因此当所述第二凹槽之外的区域的非晶硅融化时，所述第二凹槽处仍会有一些非晶硅不能融化，从而形成结晶种子。规则排列的第二凹槽必然形成规则排列的结晶种子，从而形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。
本实施例中，所述缓冲层包括第一缓冲子层和第二缓冲子层。在实际应用中，所述缓冲层可以包括多个第一缓冲子层和多个第二缓冲子层，所述第一缓冲子层与所述第二缓冲子层间隔排列。可选的，所述第一缓冲子层的构成材料包括二氧化硅，所述第二缓冲子层的构成材料包括氮化硅。优选的，所述缓冲层的厚度范围包括100nm至600nm。所述缓冲层用于平滑所述基板，防止在形成多晶硅薄膜的过程中基板内的杂质渗透进入多晶硅薄膜。
可选的，所述第一凹槽之间的距离范围包括300nm至400nm，所述第一凹槽的形状为圆形或者方形，所述缓冲层的厚度范围包括100nm至600nm。
本实施例提供的显示基板中，所述多晶硅薄膜的制备方法包括：在基板上形成缓冲层，在所述缓冲层的表面形成规则排列的第一凹槽，在所述缓冲层上形成非晶硅薄膜，采用光学退火工艺对所述非晶硅薄膜进行结晶处理从而形成多晶硅薄膜。本实施例提供的技术方案在形成非晶硅薄膜之前，在缓冲层上形成规则排列的第一凹槽，然后采用光学退火工艺进行结晶处理。由于第一凹槽处不是激光束的焦点，因此能量相对于其他位置较低，在结晶过程中形成未融化的结晶种子，从而形成多晶硅。由于这些第一凹槽是规则排列的，因此能够形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。
实施例四
本实施例还提供一种显示装置，包括实施例三提供的显示基板，具体内容可参照上述实施例三的描述，此处不再赘述。
本实施例提供的显示装置中，所述多晶硅薄膜的制备方法包括：在基板上形成缓冲层，在所述缓冲层的表面形成规则排列的第一凹槽，在所述缓冲层上形成非晶硅薄膜，采用光学退火工艺对所述非晶硅薄膜进行结晶处理从而形成多晶硅薄膜。本实施例提供的技术方案在形成非晶硅薄膜之前，在缓冲层上形成规则排列的第一凹槽，然后采用光学退火工艺进行结晶处理。由于第一凹槽处不是激光束的焦点，因此能量相对于其他位置较低，在结晶过程中形成未融化的结晶种子，从而形成多晶硅。由于这些第一凹槽是规则排列的，因此能够形成晶粒尺寸均匀而且晶粒排列规则的多晶硅薄膜。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (16)

1.一种多晶硅薄膜的制备方法，其特征在于，包括：
在基板上形成缓冲层；
在所述缓冲层的表面形成规则排列的第一凹槽；
在所述缓冲层上形成非晶硅薄膜；
采用光学退火工艺对所述非晶硅薄膜进行结晶处理，以形成多晶硅薄膜。
2.根据权利要求1所述的多晶硅薄膜的制备方法，其特征在于，所述光学退火工艺包括准分子激光退火工艺。
3.根据权利要求1所述的多晶硅薄膜的制备方法，其特征在于，所述缓冲层包括至少一个第一缓冲子层和至少一个第二缓冲子层，所述第一缓冲子层与所述第二缓冲子层间隔排列。
4.根据权利要求3所述的多晶硅薄膜的制备方法，其特征在于，所述第一缓冲子层的构成材料包括二氧化硅，所述第二缓冲子层的构成材料包括氮化硅。
5.根据权利要求1所述的多晶硅薄膜的制备方法，其特征在于，所述第一凹槽之间的距离范围包括300nm至400nm。
6.根据权利要求1所述的多晶硅薄膜的制备方法，其特征在于，所述第一凹槽的形状为圆形或者方形。
7.根据权利要求1所述的多晶硅薄膜的制备方法，其特征在于，所述采用光学退火工艺对所述非晶硅薄膜进行结晶处理的步骤之前包括：
对所述非晶硅薄膜进行脱氢处理。
8.根据权利要求1所述的多晶硅薄膜的制备方法，其特征在于，所述缓冲层的构成材料包括二氧化硅。
9.根据权利要求1所述的多晶硅薄膜的制备方法，其特征在于，所述缓冲层的厚度范围包括100nm至600nm。
10.一种半导体器件的制备方法，其特征在于，包括权利要求1-9所述的多晶硅薄膜的制备方法。
11.一种显示基板，其特征在于，包括基板，所述基板上设置有缓冲层，所述缓冲层的表面设置有规则排列的第一凹槽，所述缓冲层上设置有多晶硅薄膜，所述多晶硅薄膜由非晶硅薄膜经过光学退火工艺进行结晶处理形成。
12.根据权利要求11所述的显示基板，其特征在于，所述缓冲层包括至少一个第一缓冲子层和至少一个第二缓冲子层，所述第一缓冲子层与所述第二缓冲子层间隔排列，
13.根据权利要求12所述的显示基板，其特征在于，所述第一缓冲子层的构成材料包括二氧化硅，所述第二缓冲子层的构成材料包括氮化硅。
14.根据权利要求11所述的显示基板，其特征在于，所述第一凹槽之间的距离范围包括300nm至400nm。
15.根据权利要求11所述的显示基板，其特征在于，所述缓冲层的厚度范围包括100nm至600nm。
16.一种显示装置，其特征在于，包括权利要求11-15所述的显示基板。
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