CN104508810B - 布线基板 - Google Patents

布线基板 Download PDF

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Publication number
CN104508810B
CN104508810B CN201380038723.4A CN201380038723A CN104508810B CN 104508810 B CN104508810 B CN 104508810B CN 201380038723 A CN201380038723 A CN 201380038723A CN 104508810 B CN104508810 B CN 104508810B
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China
Prior art keywords
circuit board
insulating barrier
connection terminal
basic unit
opening portion
Prior art date
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Application number
CN201380038723.4A
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English (en)
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CN104508810A (zh
Inventor
西田智弘
森圣二
若园诚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
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Priority claimed from JP2012258208A external-priority patent/JP5491605B1/ja
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Publication of CN104508810A publication Critical patent/CN104508810A/zh
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Publication of CN104508810B publication Critical patent/CN104508810B/zh
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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Abstract

一种布线基板，其能抑制形成因填底胶的填充不良而产生的空隙。布线基板包括：基层，其具有绝缘性；绝缘层，其层叠于基层；以及连接端子，其具有导电性，在开口部的内侧自绝缘层突出。绝缘层具有：第1表面，其形成有开口部；以及第2表面，其在开口部的内侧相对于第1表面向基层侧凹陷。第2表面在开口部的内侧形成在从第1表面到连接端子的整个范围内。在沿着绝缘层相对于基层层叠的层叠方向的平面、即剖面中，自第2表面中的任意点朝向绝缘层外侧的法线、同自该任意点以与第1表面平行的方式朝向连接端子的平行线所成的角度大于0°且小于90°。

Description

布线基板
技术领域
本发明涉及布线基板。
背景技术
对于布线基板而言，已知有构成为能够安装半导体芯片的布线基板(例如，参照专利文献1、2)。在这样的布线基板上形成有连接端子，该连接端子构成为能够与半导体芯片连接。
在专利文献1中记载了这样的技术：为了防止因镀敷材料导致连接端子之间发生电短路，而形成具有开口的绝缘层，该开口能使多个连接端子暴露，在该开口处的多个连接端子之间形成绝缘物，之后，对多个连接端子实施镀敷。在专利文献2中记载了这样的技术：为了防止因软钎料导致连接端子之间发生电短路，而将形成在连接端子之间的绝缘层减薄至连接端子的厚度以下。
在向布线基板安装半导体芯片时，将布线基板的连接端子钎焊于半导体芯片，并且向连接端子周围的布线基板与半导体芯片之间的间隙填充液状固化性树脂，该液状固化性树脂还被称作填底胶(underfill)(例如，参照专利文献3)。
现有技术文献
专利文献
专利文献1：日本特开2007-103648号公报
专利文献2：日本特开2011-192692号公报
专利文献3：日本特开2010-153495号公报
发明内容
发明要解决的问题
在专利文献1、2中，考虑到了防止因镀敷、软钎料导致连接端子之间发生短路的情况，但对于向连接端子周围填充的填底胶没有进行充分的考虑，因而存在这样的问题：有时会形成空隙(空洞)，该空隙是因填底胶的流动受到阻碍、填底胶的填充不良而产生的。在专利文献3中，没有对填底胶被吸入布线基板与半导体芯片之间的间隙后的流动情况进行充分的考虑，因而存在这样的问题：有时会形成因填底胶的填充不良而产生的空隙。
用于解决问题的方案
本发明是为了解决所述问题而做成的，能够通过以下的技术方案实现。
(1)根据本发明的一技术方案，提供一种布线基板，该布线基板包括：基层，其具有绝缘性；绝缘层，其层叠于所述基层，具有第1表面和第2表面，该第1表面形成有开口部，该第2表面在所述开口部的内侧相对于所述第1表面向所述基层侧凹陷；以及连接端子，其具有导电性，在所述开口部的内侧自所述绝缘层突出。在该布线基板中，所述第2表面在所述开口部的内侧形成在从所述第1表面到所述连接端子的整个范围内；在沿着所述绝缘层相对于所述基层层叠的层叠方向的平面、即剖面中，自所述第2表面中的任意点朝向所述绝缘层外侧的法线、同自所述任意点以与所述第1表面平行的方式朝向所述连接端子的平行线所成的角度大于0°且小于90°。采用该技术方案的布线基板，在第2表面的各个部位将填底胶的流动向连接端子侧引导，从而能够使填底胶的流动稳定化。其结果，能够抑制形成因填底胶的填充不良而产生的空隙。
(2)在所述技术方案的布线基板中，也可以是，所述第2表面由曲面构成。与第2表面由平面构成的情况相比，采用该技术方案的布线基板，第2表面的与填底胶接触的表面积增加，因此能够提高第2表面与填底胶之间的密合性。并且，与第2表面由平面构成的情况相比，绝缘层的随着填底胶的固化而产生的应力减小，因此能够抑制绝缘层出现开裂(裂纹)。
(3)在所述技术方案的布线基板中，也可以是，所述第2表面由平面构成。与第2表面由曲面构成的情况相比，采用该技术方案的布线基板，填底胶在第2表面之上流动的距离缩短，因此能够缩短填充填底胶所需要的时间。
(4)在所述技术方案的布线基板中，也可以是，所述第2表面的表面粗糙度大于所述第1表面的表面粗糙度。采用该技术方案的布线基板，不会阻碍填底胶的流动性，能够利用毛细管现象使填底胶遍及第2表面上的各个部位。
本发明也能够通过除布线基板以外的各种形式实现。例如，能够通过包括布线基板的装置、制造布线基板的制造方法等形式实现。
附图说明
图1是示意性地表示第1实施方式的布线基板的结构的局部剖面图。
图2是示意性地表示安装有半导体芯片的布线基板的结构的局部剖面图。
图3是示意性地表示第2实施方式的布线基板的结构的局部剖面图。
图4是示意性地表示第3实施方式的布线基板的结构的局部剖面图。
图5是示意性地表示第4实施方式的布线基板的结构的局部剖面图。
具体实施方式
A.第1实施方式：图1是示意性地表示第1实施方式的布线基板10的结构的局部剖面图。图2是示意性地表示安装有半导体芯片20的布线基板10的结构的局部剖面图。布线基板10利用有机材料形成，是板状的构件，还被称作有机基板(organic基板)。在本实施方式中，如图2所示，布线基板10是构成为能够安装半导体芯片20的倒装芯片安装基板。
布线基板10包括基层120、导体层130和绝缘层140。在本实施方式中，布线基板10是通过在基层120之上形成导体层130之后，再在该导体层130之上形成绝缘层140而成的。在其他实施方式中，布线基板10既可以在基层120之上具有将多层导体层和多层绝缘层交替层叠而成的多层构造，也可以在基层120的两面均具有这样的多层构造。
在图1中示出了互相正交的XYZ轴。图1中的XYZ轴与其他图中的XYZ轴相对应。在图1中的XYZ轴中，将沿着绝缘层140相对于基层120的层叠方向的轴设为Z轴。在沿着Z轴的Z轴方向中，将自基层120朝向绝缘层140的方向设为+Z轴方向，将+Z轴方向的相反方向设为－Z轴方向。在图1中的XYZ轴中，将沿着与Z轴正交的层叠面方向的两个轴设为X轴和Y轴。在图1的说明中，在沿着X轴的X轴方向中，将自纸面左朝向纸面右的方向设为+X轴方向，将+X轴方向的相反方向设为－X轴方向。在图1的说明中，在沿着Y轴的Y轴方向中，将从纸面跟前侧朝向纸面里侧的方向设为+Y轴方向，将+Y轴方向的相反方向设为－Y轴方向。
布线基板10的基层120是由绝缘性材料形成的板状构件。在本实施方式中，基层120的绝缘性材料为热固化性树脂(例如，双马来酰亚胺三嗪树脂(Bismaleimide-TriazineResin，BT)，环氧树脂等)。在其他实施方式中，基层120的绝缘性材料也可以是纤维增强树脂(例如，玻璃纤维增强环氧树脂等)。虽然在图1和图2中未图示，但在基层120的内部形成有导体(例如，通孔、穿孔等)，该导体构成与导体层130连接的布线的一部分。
布线基板10的导体层130是由形成在基层120之上的导电性材料构成的导体图案。在本实施方式中，导体层130是通过将形成在基层120的表面之上的铜镀层蚀刻成期望的形状而形成的。导体层130包括自绝缘层140露出的连接端子132和被绝缘层140覆盖的内部布线136。
如图2所示，导体层130的连接端子132构成为能够借助软钎料SD与半导体芯片20的连接端子232相连接。在本实施方式中，在连接端子132的表面实施了镀敷处理。
布线基板10的绝缘层140是由绝缘性材料形成的层，该绝缘性材料也被称作阻焊剂。绝缘层140具有第1表面141和第2表面142。
绝缘层140的第1表面141是绝缘层140的形成有开口部150的表面。在本实施方式中，第1表面141是沿着X轴和Y轴朝向+Z轴方向侧的面，构成绝缘层140的+Z轴方向侧的表面。
绝缘层140的第2表面142是绝缘层140的在开口部150内侧的、相对于第1表面141向基层120侧凹陷的表面。导体层130的连接端子132自第2表面142露出，在本实施方式中，连接端子132自第2表面142向+Z轴方向侧突出。在本实施方式中，在第2表面142设有一个连接端子132。在其他实施方式中，也可以在第2表面142设有两个以上的连接端子132。
图1中的布线基板10的剖面是与Z轴和X轴平行的ZX平面。在ZX平面中，第2表面142形成在从第2表面142与第1表面141连接的连接点P1到第2表面142与连接端子132连接的连接点P2的整个范围内。
在图1中，在ZX平面上图示有点AP、法线NL、平行线PL和角度θ。点AP是构成形成在从连接点P1到连接点P2的整个范围内的第2表面142的任意点。法线NL是与第2表面142的在任意点AP处的切线垂直的线，是自任意点AP朝向绝缘层140的外侧(+Z轴方向)的线。平行线PL是自任意点AP以与第1表面141平行的方式朝向连接端子132的线。在本实施方式中，平行线PL是沿着X轴的线。在ZX平面中，第2表面142上的任意点AP处的法线NL与平行线PL所成的角度θ大于0°且小于90°。
在本实施方式中，第2表面142由曲面构成。在本实施方式中，第2表面142的靠第1表面141侧的部分由朝向绝缘层140的外侧(+Z轴方向)凸出的凸状曲面构成，第2表面142的靠连接端子132侧的部分由朝向绝缘层140的内侧(－Z轴方向)凹陷的凹状曲面构成。
在本实施方式中，第2表面142的表面粗糙度大于第1表面141的表面粗糙度。在本实施方式中，第2表面142的中心线平均粗糙度Ra为0.06μm～0.8μm(微米)，第2表面142的十点平均粗糙度Rz为1.0μm～9.0μm。相对于这样的第2表面142的表面粗糙度，第1表面141的中心线平均粗糙度Ra为0.02μm～0.25μm，第1表面141的十点平均粗糙度Rz为0.6μm～5.0μm。
在本实施方式中，绝缘层140是通过在形成有导体层130的基层120之上涂布光固化型绝缘性树脂之后进行曝光、显影而形成的。绝缘层140的开口部150相当于在曝光时被掩膜的部分，将显影时未固化部分冲洗掉，从而形成绝缘层140的第2表面142。像这样，绝缘层140的第1表面141和第2表面142作为构成单层的部位形成为一体。在本实施方式中，第2表面142的形状和表面粗糙度能够通过对光固化型绝缘性树脂的材质，曝光时的掩膜的形状，以及曝光时的照射光的强度、照射时间和照射角度等进行调整来实现。
在向布线基板10安装半导体芯片20时，如图2所示，将连接端子132钎焊于半导体芯片20的连接端子232，并且向在开口部150中的半导体芯片20与第2表面142之间形成的间隙内填充填底胶30。
采用以上说明的第1实施方式，通过在第2表面142的各个部位将填底胶30的流动向连接端子132侧引导，从而能够使填底胶30的流动稳定化。其结果，能够抑制因填底胶30的填充不良而形成空隙。
另外，与第2表面142由平面构成的情况相比，由于第2表面142由曲面构成，因此第2表面142的与填底胶30接触的表面积增加，因此，能够提高第2表面142与填底胶30之间的密合性。并且，与第2表面142由平面构成的情况相比，绝缘层140的随着填底胶30的固化而产生的应力减小，因此能够抑制绝缘层140出现开裂(裂纹)。
B.第2实施方式：图3是示意性地表示第2实施方式的布线基板10B的结构的局部剖面图。在第2实施方式的说明中，对与第1实施方式相同的结构标注同一附图标记并省略说明。
对于第2实施方式的布线基板10B，除了第2表面142的形状不同这一点之外，其余的部分与第1实施方式的相同。第2实施方式的第2表面142由凹状曲面构成，该凹状曲面在从连接点P1到连接点P2的整个范围内朝向绝缘层140的内侧(－Z轴方向)凹陷，除此之外，第2实施方式的第2表面142的其余部分与第1实施方式的相同。在第2实施方式中，与第1实施方式同样地，在ZX平面中，第2表面142上的任意点AP处的法线NL与平行线PL所成的角度θ大于0°且小于90°。在第2实施方式中，角度θ随着任意点AP的位置从连接点P1朝向连接点P2移动而增大。
采用以上说明的第2实施方式，与第1实施方式同样地，能够抑制形成因填底胶30的填充不良而产生的空隙。另外，由于第2表面142由曲面构成，因此与第1实施方式同样地，能够提高第2表面142与填底胶30之间的密合性。另外，由于第2表面142由曲面构成，因此与第1实施方式同样地，能够抑制绝缘层140出现开裂。
C.第3实施方式：图4是示意性地表示第3实施方式的布线基板10C的结构的局部剖面图。在第3实施方式的说明中，对与第1实施方式相同的结构标注同一附图标记并省略说明。
对于第3实施方式的布线基板10C，除了第2表面142的形状不同这一点之外，其余的部分与第1实施方式的相同。第3实施方式的第2表面142由平面构成，除此之外，其余的部分与第1实施方式的相同。在第3实施方式中，第2表面142由从连接点P1到连接点P2的整个范围内的平面构成。
在第3实施方式中，与第1实施方式同样地，在ZX平面中，第2表面142上的任意点AP处的法线NL与平行线PL所成的角度θ大于0°且小于90°。在第3实施方式中，不管任意点AP的位置是从连接点P1到连接点P2的范围内的哪一位置，角度θ均保持不变。
采用以上说明的第3实施方式，与第1实施方式同样地，能够抑制形成因填底胶30的填充不良而产生的空隙。另外，与第2表面142由曲面构成的情况相比，填底胶30在第2表面142之上流动的距离缩短，因此能够缩短填充填底胶30所需要的时间。
D.第4实施方式：图5是示意性地表示第4实施方式的布线基板10D的结构的局部剖面图。在第4实施方式的说明中，对与第1实施方式相同的结构标注同一附图标记并省略说明。
对于第4实施方式的布线基板10D，除了第2表面142的形状不同这一点之外，其余的部分与第1实施方式的相同。第4实施方式的第2表面142由平面构成，除此之外，其余的部分与第1实施方式的相同。在第4实施方式中，第2表面142由从连接点P1到中间点MP的整个范围内的平面和从中间点MP到连接点P2的整个范围内的平面构成。中间点MP是第2表面142上的位于连接点P1与连接点P2之间的点。
在第4实施方式中，与第1实施方式同样地，在ZX平面中，第2表面142上的任意点AP处的法线NL与平行线PL所成的角度θ大于0°且小于90°。在第4实施方式中，与任意点AP的位置相对中间点MP而言靠连接点P1侧的情况相比，在任意点AP的位置相对中间点MP而言靠连接点P2侧的情况下，角度θ较大。
采用以上说明的第4实施方式，与第1实施方式同样地，能够抑制形成因填底胶30的填充不良而产生的空隙。另外，与第2表面142由曲面构成的情况相比，填底胶30在第2表面142上流动的距离缩短，因此能够缩短填充填底胶30所需要的时间。
E.其他实施方式：本发明并不限定于所述实施方式、实施例、变形例，能够在不脱离本发明的主旨的范围内通过各种结构实现。例如，为了解决所述问题的一部分或全部、或者为了达到所述效果的一部分或全部，能够适当地对与本发明的发明内容中记载的各技术方案中的技术特征相对应的实施方式、实施例、变形例中的技术特征进行调换、组合。并且，若这些技术特征未作为本说明书中必须的技术特征进行说明，则能够适当地删除。
对于第2表面142，只要满足0°＜θ＜90°，就能够以各种形状实现。例如，第2表面142也可以是在连接点P1与连接点P2之间具有3个以上拐点的曲面。另外，第2表面142也可以由在连接点P1与连接点P2之间角度θ的值不同的3个以上的平面构成。另外，第2表面142也可以是由曲面与平面的组合构成的形状。
附图标记说明
10、10B、10C、10D、布线基板；20、半导体芯片；30、填底胶；120、基层；130、导体层；132、连接端子；136、内部布线；140、绝缘层；141、第1表面；142、第2表面；150、开口部；232、连接端子；SD、软钎料；P1、连接点；P2、连接点；MP、中间点；AP、任意点；NL、法线；PL、平行线。

Claims (3)

1.一种布线基板，该布线基板包括：
基层，其具有绝缘性；
绝缘层，其层叠于所述基层，具有第1表面和第2表面，该第1表面形成有开口部，该第2表面在所述开口部的内侧相对于所述第1表面向所述基层侧凹陷；以及
连接端子，其具有导电性，在所述开口部的内侧自所述绝缘层突出，
在向该布线基板安装半导体芯片时，将所述连接端子钎焊于所述半导体芯片的连接端子，并且向在所述开口部中的所述半导体芯片与所述第2表面之间形成的间隙内填充填底胶，
该布线基板的特征在于，
所述第2表面在所述开口部的内侧形成在从所述第1表面到所述连接端子的整个范围内，
在沿着所述绝缘层相对于所述基层层叠的层叠方向的平面、即剖面中，自所述第2表面中的任意点朝向所述绝缘层外侧的法线、同自所述任意点以与所述第1表面平行的方式朝向所述连接端子的平行线所成的角度大于0°且小于90°，
所述第2表面的表面粗糙度大于所述第1表面的表面粗糙度。
2.根据权利要求1所述的布线基板，其特征在于，
所述第2表面由曲面构成。
3.根据权利要求1所述的布线基板，其特征在于，
所述第2表面由平面构成。
CN201380038723.4A 2012-08-24 2013-08-23 布线基板 Active CN104508810B (zh)

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