CN104319261B - 一种阵列基板的制备方法、阵列基板和显示装置 - Google Patents

一种阵列基板的制备方法、阵列基板和显示装置 Download PDF

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Publication number
CN104319261B
CN104319261B CN201410567591.0A CN201410567591A CN104319261B CN 104319261 B CN104319261 B CN 104319261B CN 201410567591 A CN201410567591 A CN 201410567591A CN 104319261 B CN104319261 B CN 104319261B
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glass substrate
passivation layer
preparation
passivation
organic insulator
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CN104319261A (zh
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沈奇雨
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BOE Technology Group Co Ltd
Hefei BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei BOE Optoelectronics Technology Co Ltd
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Priority to CN201410567591.0A priority Critical patent/CN104319261B/zh
Publication of CN104319261A publication Critical patent/CN104319261A/zh
Priority to US14/767,759 priority patent/US9978782B2/en
Priority to PCT/CN2015/074684 priority patent/WO2016061995A1/zh
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    • H01L27/1259—Multistep manufacturing methods
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

本发明提供一种阵列基板的制备方法、阵列基板和显示装置。该制备方法包括：在玻璃基板上形成薄膜晶体管和信号线；在对应薄膜晶体管和信号线的上方形成有机绝缘层；在有机绝缘层上方形成钝化绝缘层，在形成钝化绝缘层之前，还包括对形成有机绝缘层的玻璃基板进行预加热处理。该制备方法通过对形成有机绝缘层的玻璃基板进行预加热处理，且相比于现有技术，去除了对形成有机绝缘层的玻璃基板的氮气等离子体处理和氮气流处理，使形成有机绝缘层的玻璃基板的界面态特性增强，从而使钝化绝缘层与形成有机绝缘层的玻璃基板之间的粘附性增强，进而能够防止形成在有机绝缘层上方的钝化绝缘层发生脱落，保证了阵列基板的品质。

Description

一种阵列基板的制备方法、阵列基板和显示装置
技术领域
本发明涉及液晶显示技术领域，具体地，涉及一种阵列基板的制备方法、阵列基板和显示装置。
背景技术
薄膜晶体管液晶显示器(TFT-LCD)因其体积小，功耗低、无辐射等特点，在当前的平板显示器市场占据了主导地位。TFT-LCD显示面板是由阵列基板和彩膜基板对盒而形成的。在阵列基板中相互交叉地设置定义像素区域的栅线和数据线，在各像素区域中设置像素电极和薄膜晶体管。将栅极驱动信号施加到栅线上，通过薄膜晶体管将图像数据信号从数据线引入到像素电极上。在彩膜基板上设置黑矩阵，使光不能透过除了像素电极以外的区域，在各像素区域配置滤色层，在此基础上在配置公共电极。在阵列基板和彩膜基板对盒形成的间隙中充入液晶，通过上述的公共电极和像素电极之间形成的电场来控制液晶的偏转从而控制光线的强弱，配合彩膜基板的功能，在显示面板上显示出所要表达的图像。
随着人们对视觉感受要求的提高，高解析度、低功耗的液晶显示器越来越受到人们的欢迎。目前的液晶显示器通常采用非晶硅薄膜晶体管，即薄膜晶体管的有源层采用非晶硅材质，受到非晶硅薄膜晶体管迁移率的影响，薄膜晶体管的有源层通常设计为宽长比比较大的有源层，这种设计不利于提高液晶显示器的解析度，还降低了液晶显示器的开口率，同时液晶显示器的功耗也相应地上升不少，导致数据驱动芯片无法正常驱动。
为了降低液晶显示器件面板的功耗，引入了有机绝缘膜材料制成的有机绝缘层，有机绝缘层通常设置在像素电极与栅线和数据线之间。有机绝缘层的引入增大了像素电极与栅线和数据线之间的间距，从而使像素电极与栅线和数据线之间的寄生电容相应减小，进而降低了液晶显示器件面板的功耗。随着液晶显示器件面板功耗的降低，能够相应地增加像素电极的数量，从而提高非晶硅薄膜晶体管液晶显示器件的解析度。
但引入有机绝缘层后，在有机绝缘层上方沉积形成钝化绝缘层之前，传统的方法会对形成有机绝缘层的玻璃衬底进行氮气等离子体处理和氮气流(N2Plasma和N2flow)处理，该处理会使形成有机绝缘层的玻璃衬底的界面态特性减弱，从而使形成在该玻璃衬底上的钝化绝缘层与该玻璃衬底的粘附性减弱。另外，在形成有机绝缘层的玻璃衬底上方沉积形成钝化绝缘层本身就会降低钝化绝缘层与玻璃衬底之间的粘附性能。因此由于上述原因，使钝化绝缘层很容易从形成有机绝缘层的玻璃衬底上脱落，导致液晶显示器件的显示不良。
发明内容
本发明针对现有技术中存在的上述技术问题，提供一种阵列基板的制备方法、阵列基板和显示装置。该阵列基板的制备方法，能使形成有机绝缘层的玻璃基板的界面态特性增强，从而使钝化绝缘层与形成有机绝缘层的玻璃基板之间的粘附性增强，进而能够防止形成在有机绝缘层上方的钝化绝缘层发生脱落。
本发明提供一种阵列基板的制备方法，包括：在玻璃基板上形成薄膜晶体管和信号线；在对应所述薄膜晶体管和所述信号线的上方形成有机绝缘层；在所述有机绝缘层上方形成钝化绝缘层，在形成所述钝化绝缘层之前，还包括对形成所述有机绝缘层的所述玻璃基板进行预加热处理。
优选地，所述钝化绝缘层包括第一钝化层，所述信号线包括栅线和数据线，所述制备方法具体包括：
步骤S10：在玻璃基板上形成所述薄膜晶体管、所述栅线、所述数据线和所述有机绝缘层，所述有机绝缘层形成在所述薄膜晶体管、所述栅线和所述数据线的上方；
步骤S11：对完成步骤S10的所述玻璃基板进行预加热处理；
步骤S12：在完成步骤S11的所述玻璃基板上形成所述第一钝化层；
还包括步骤S13：在完成步骤S12的所述玻璃基板上形成第一透明电极。
优选地，所述钝化绝缘层还包括第二钝化层，所述制备方法还包括：
步骤S14：对完成步骤S13的所述玻璃基板进行预加热处理；
步骤S15：在完成步骤S14的所述玻璃基板上形成所述第二钝化层；
步骤S16：在完成步骤S15的所述玻璃基板上形成第二透明电极。
优选地，所述钝化绝缘层包括第二钝化层，所述信号线包括栅线和数据线，所述制备方法具体包括：
步骤S10’：在玻璃基板上形成所述薄膜晶体管、所述栅线、所述数据线和所述有机绝缘层，还形成第一钝化层和第一透明电极，所述第一钝化层形成在所述薄膜晶体管、所述栅线和所述数据线上方，所述有机绝缘层形成在所述第一钝化层上方，所述第一透明电极形成在所述有机绝缘层的上方；
步骤S11’：对完成步骤S10’的所述玻璃基板进行预加热处理；
步骤S12’：在完成步骤S11’的所述玻璃基板上形成所述第二钝化层；
还包括步骤S13’：在完成步骤S12’的所述玻璃基板上形成第二透明电极。
优选地，所述预加热处理的温度范围为230℃-300℃，所述预加热处理的时长范围为15秒-25秒。
优选地，所述第一透明电极为像素电极或公共电极，所述第二透明电极为公共电极或像素电极。
优选地，所述第二钝化层包括缓冲层、底部钝化层和顶部钝化层；形成所述第二钝化层的步骤具体包括：
步骤S101：在经过预加热处理的所述玻璃基板上沉积用于形成所述缓冲层的缓冲层膜；
步骤S102：在完成步骤S101的所述玻璃基板上沉积用于形成所述底部钝化层的底部钝化层膜；
步骤S103：在完成步骤S102的所述玻璃基板上沉积用于形成所述顶部钝化层的顶部钝化层膜；
步骤S104：通过一次曝光、显影和刻蚀工艺形成所述第二钝化层的图形。
优选地，所述缓冲层膜、所述底部钝化层膜和所述顶部钝化层膜均采用化学气相沉积法沉积形成；
在所述步骤S101中，沉积所述缓冲层膜的沉积功率范围为6kW-20kW，沉积间距范围为20-30mm，沉积压力范围为600-1000mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.3:15.6-1:16:45，沉积温度范围为230℃-300℃；
在所述步骤S102中，沉积所述底部钝化层膜的沉积功率范围为6kW-18kW，沉积间距范围为20-26mm，沉积压力范围为1000-1500mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.5:7.5-1:3.2:9.0，沉积温度范围为230℃-300℃；
在所述步骤S103中，沉积所述顶部钝化层膜的沉积功率范围为6kW-15kW，沉积间距范围为20-26mm，沉积压力范围为1500-2000mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.5:7.5-1:3.2:9.0，沉积温度范围为230℃-300℃。
优选地，所述薄膜晶体管包括有源层，所述有源层采用非晶硅材料、低温多晶硅材料或透明金属氧化物材料制成。
优选地，所述薄膜晶体管包括顶栅型和底栅型。
本发明还提供一种阵列基板，所述阵列基板采用上述的制备方法制备形成。
本发明还提供一种显示装置，包括上述阵列基板。
本发明的有益效果：本发明所提供的阵列基板的制备方法，在有机绝缘层上方形成钝化绝缘层之前，对形成有机绝缘层的玻璃基板进行预加热处理，且相比于现有技术，去除了对形成有机绝缘层的玻璃基板的氮气等离子体处理和氮气流处理，使形成有机绝缘层的玻璃基板的界面态特性增强，从而使钝化绝缘层与形成有机绝缘层的玻璃基板之间的粘附性增强，进而能够防止形成在有机绝缘层上方的钝化绝缘层发生脱落，保证了阵列基板的品质。
本发明所提供的阵列基板，通过采用上述制备方法制备形成，使形成在有机绝缘层上方的钝化绝缘层不容易从玻璃基板上脱落，从而确保了阵列基板的品质。
本发明所提供的显示装置，通过采用上述阵列基板，保证了该显示装置的质量。
附图说明
图1为本发明所提供的阵列基板的制备方法的步骤示意图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明所提供的一种阵列基板的制备方法、阵列基板和显示装置作进一步详细描述。
实施例1：
本实施例提供一种阵列基板的制备方法，如图1所示，包括：步骤S1：在玻璃基板上形成薄膜晶体管和信号线；在对应薄膜晶体管和信号线的上方形成有机绝缘层；步骤S3：在有机绝缘层上方形成钝化绝缘层，在形成钝化绝缘层之前，还包括步骤S2：对形成有机绝缘层的玻璃基板进行预加热处理。
预加热处理能使形成有机绝缘层的玻璃基板的界面态特性增强，从而使钝化绝缘层与形成有机绝缘层的玻璃基板之间的粘附性增强，进而能够防止形成在有机绝缘层上方的钝化绝缘层发生脱落，保证了阵列基板的品质。
本实施例中，钝化绝缘层包括第一钝化层，信号线包括栅线和数据线，阵列基板的制备方法具体包括：
步骤S10：在玻璃基板上形成薄膜晶体管、栅线、数据线和有机绝缘层，有机绝缘层形成在薄膜晶体管、栅线和数据线的上方。
本实施例的该步骤中，栅线和薄膜晶体管的栅极采用相同的材料同时形成，数据线与薄膜晶体管的源极和漏极采用相同的材料同时形成，即栅线和栅极形成在同一层中，数据线与源极和漏极形成在同一层中。
该步骤中有机绝缘层的制备过程为：在形成薄膜晶体管、栅线和数据线的玻璃基板上涂敷一层有机绝缘材料，然后采用曝光、显影和刻蚀工艺最终形成有机绝缘层的图形。
步骤S11：对完成步骤S10的玻璃基板进行预加热处理。
在该步骤中，预加热处理的温度范围为230℃-300℃，预加热处理的时长范围为15秒-25秒。如此处理能够确保完成步骤S10的玻璃基板界面态特性增强。
步骤S12：在完成步骤S11的玻璃基板上形成第一钝化层。
在该步骤中，第一钝化层与完成步骤S11的玻璃基板之间的粘附性增强，从而能够牢固地粘附在一起，使第一钝化层不易从完成步骤S11的玻璃基板上脱落。
还包括步骤S13：在完成步骤S12的玻璃基板上形成第一透明电极。
本实施例中，钝化绝缘层还包括第二钝化层，阵列基板的制备方法还包括：
步骤S14：对完成步骤S13的玻璃基板进行预加热处理。
在该步骤中，预加热处理的温度范围为230℃-300℃，预加热处理的时长范围为15秒-25秒。如此处理能够确保完成步骤S13的玻璃基板界面态特性增强。
步骤S15：在完成步骤S14的玻璃基板上形成第二钝化层。
在该步骤中，第二钝化层包括缓冲层、底部钝化层和顶部钝化层；形成第二钝化层的步骤具体包括：
步骤S101：在经过预加热处理的玻璃基板上沉积用于形成缓冲层的缓冲层膜。在该步骤中，缓冲层膜采用化学气相沉积法沉积形成。沉积缓冲层膜的沉积功率范围为6kW-20kW，沉积间距范围为20-30mm，沉积压力范围为600-1000mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.3:15.6-1:16:45，沉积温度范围为230℃-300℃。
步骤S102：在完成步骤S101的玻璃基板上沉积用于形成底部钝化层的底部钝化层膜。在该步骤中，底部钝化层膜采用化学气相沉积法沉积形成。沉积底部钝化层膜的沉积功率范围为6kW-18kW，沉积间距范围为20-26mm，沉积压力范围为1000-1500mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.5:7.5-1:3.2:9.0，沉积温度范围为230℃-300℃。
步骤S103：在完成步骤S102的玻璃基板上沉积用于形成顶部钝化层的顶部钝化层膜。在该步骤中，顶部钝化层膜采用化学气相沉积法沉积形成。沉积顶部钝化层膜的沉积功率范围为6kW-15kW，沉积间距范围为20-26mm，沉积压力范围为1500-2000mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.5:7.5-1:3.2:9.0，沉积温度范围为230℃-300℃。
步骤S104：通过一次曝光、显影和刻蚀工艺形成第二钝化层的图形。
本实施例中，由缓冲层、底部钝化层和顶部钝化层组成了第二钝化层。其中，缓冲层能够防止第二钝化层形成过程中与第一透明电极成份发生化学反应，形成黑点不良。第二钝化层的底部钝化层与顶部钝化层的致密度不同，从而在进行干法刻蚀的时候，能形成良好的坡度，使后续膜层通过形成在第二钝化层中的过孔与被覆盖在第二钝化层下方的膜层导通时，不发生断裂，防止搭接不良的产生。
在步骤S15中，第二钝化层与完成步骤S14的玻璃基板之间的粘附性增强，从而能够牢固地粘附在一起，使第二钝化层不易从完成步骤S14的玻璃基板上脱落。
步骤S16：在完成步骤S15的玻璃基板上形成第二透明电极。
本实施例中，第一透明电极为像素电极，第二透明电极为公共电极。当然，第一透明电极也可以为公共电极，第二透明电极为像素电极。即本实施例中的阵列基板为ADS型的阵列基板。本实施例中，有机绝缘层能够减小像素电极与栅线、数据线以及栅极和源极之间的寄生电容，同时还能减小公共电极与栅线、数据线以及栅极和源极之间的寄生电容，从而降低了阵列基板的功耗。
本实施例中，薄膜晶体管包括有源层，有源层采用非晶硅材料制成。需要说明的是，有源层也可以采用低温多晶硅材料或透明金属氧化物材料制成。
另外，本实施例中，薄膜晶体管为顶栅型结构，当然薄膜晶体管也可以为底栅型结构。
实施例2：
本实施例提供一种阵列基板的制备方法，与实施例1不同的是，钝化绝缘层不包括第二钝化层，相应地，阵列基板的制备方法也不包括步骤S14-步骤S16。
相应地，本实施例中的第一透明电极为像素电极。即本实施例中的阵列基板为TN型的阵列基板。
本实施例中阵列基板的制备方法的其他步骤与实施例1中相同，此处不再赘述。
实施例3：
本实施例提供一种阵列基板的制备方法，与实施例1-2不同的是，钝化绝缘层包括第二钝化层，信号线包括栅线和数据线，阵列基板的制备方法具体包括：
步骤S10’：在玻璃基板上形成薄膜晶体管、栅线、数据线和有机绝缘层，还形成第一钝化层和第一透明电极，第一钝化层形成在薄膜晶体管、栅线和数据线上方，有机绝缘层形成在第一钝化层上方，第一透明电极形成在有机绝缘层的上方。
步骤S11’：对完成步骤S10’的玻璃基板进行预加热处理。
在该步骤中，预加热处理的温度范围为230℃-300℃，预加热处理的时长范围为15秒-25秒。如此处理能够确保完成步骤S10’的玻璃基板界面态特性增强。
步骤S12’：在完成步骤S11’的玻璃基板上形成第二钝化层。
第二钝化层的构成以及制备方法和制备过程与实施例1中相同，此处不再赘述。
还包括步骤S13’：在完成步骤S12’的玻璃基板上形成第二透明电极。
本实施例中的阵列基板为ADS型的阵列基板。
本实施例中阵列基板的其他结构及材料与实施例1中相同，此处不再赘述。
实施例1-3的有益效果：实施例1-3中所提供的阵列基板的制备方法，在有机绝缘层上方形成钝化绝缘层之前，对形成有机绝缘层的玻璃基板进行预加热处理，且相比于现有技术，去除了对形成有机绝缘层的玻璃基板的氮气等离子体处理和氮气流处理，使形成有机绝缘层的玻璃基板的界面态特性增强，从而使钝化绝缘层与形成有机绝缘层的玻璃基板之间的粘附性增强，进而能够防止形成在有机绝缘层上方的钝化绝缘层发生脱落，保证了阵列基板的品质。
实施例4：
本实施例提供一种阵列基板，该阵列基板采用实施例1-3任意一个中的制备方法制备形成。
该阵列基板包括TN型的阵列基板和ADS型的阵列基板。
通过采用实施例1-3任意一个中的制备方法制备形成的阵列基板，使形成在有机绝缘层上方的钝化绝缘层不容易从玻璃基板上脱落，从而确保了阵列基板的品质。
实施例5：
本实施例提供一种显示装置，包括实施例4中的阵列基板。
通过采用实施例4中的阵列基板，保证了该显示装置的质量。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (12)

1.一种阵列基板的制备方法，包括：在玻璃基板上形成薄膜晶体管和信号线；在对应所述薄膜晶体管和所述信号线的上方形成有机绝缘层；在所述有机绝缘层上方形成钝化绝缘层，其特征在于，所述钝化绝缘层包括第一钝化层和/或第二钝化层，在形成所述第一钝化层或所述第二钝化层之前，还包括对形成所述有机绝缘层的所述玻璃基板进行预加热处理，其中：预加热处理的温度范围为230℃-300℃，预加热处理的时长范围为15秒-25秒。
2.根据权利要求1所述的制备方法，其特征在于，所述钝化绝缘层包括第一钝化层，所述信号线包括栅线和数据线，所述制备方法具体包括：
步骤S10：在玻璃基板上形成所述薄膜晶体管、所述栅线、所述数据线和所述有机绝缘层，所述有机绝缘层形成在所述薄膜晶体管、所述栅线和所述数据线的上方；
步骤S11：对完成步骤S10的所述玻璃基板进行预加热处理；
步骤S12：在完成步骤S11的所述玻璃基板上形成所述第一钝化层；
还包括步骤S13：在完成步骤S12的所述玻璃基板上形成第一透明电极。
3.根据权利要求2所述的制备方法，其特征在于，所述钝化绝缘层还包括第二钝化层，所述制备方法还包括：
步骤S14：对完成步骤S13的所述玻璃基板进行预加热处理；
步骤S15：在完成步骤S14的所述玻璃基板上形成所述第二钝化层；
步骤S16：在完成步骤S15的所述玻璃基板上形成第二透明电极。
4.根据权利要求1所述的制备方法，其特征在于，所述钝化绝缘层包括第二钝化层，所述信号线包括栅线和数据线，所述制备方法具体包括：
步骤S10’：在玻璃基板上形成所述薄膜晶体管、所述栅线、所述数据线和所述有机绝缘层，还形成第一钝化层和第一透明电极，所述第一钝化层形成在所述薄膜晶体管、所述栅线和所述数据线上方，所述有机绝缘层形成在所述第一钝化层上方，所述第一透明电极形成在所述有机绝缘层的上方；
步骤S11’：对完成步骤S10’的所述玻璃基板进行预加热处理；
步骤S12’：在完成步骤S11’的所述玻璃基板上形成所述第二钝化层；
还包括步骤S13’：在完成步骤S12’的所述玻璃基板上形成第二透明电极。
5.根据权利要求1-4任意一项所述的制备方法，其特征在于，所述预加热处理的温度范围为230℃-300℃，所述预加热处理的时长范围为15秒-25秒。
6.根据权利要求4所述的制备方法，其特征在于，所述第一透明电极为像素电极或公共电极，所述第二透明电极为公共电极或像素电极。
7.根据权利要求3或4所述的制备方法，其特征在于，所述第二钝化层包括缓冲层、底部钝化层和顶部钝化层；形成所述第二钝化层的步骤具体包括：
步骤S101：在经过预加热处理的所述玻璃基板上沉积用于形成所述缓冲层的缓冲层膜；
步骤S102：在完成步骤S101的所述玻璃基板上沉积用于形成所述底部钝化层的底部钝化层膜；
步骤S103：在完成步骤S102的所述玻璃基板上沉积用于形成所述顶部钝化层的顶部钝化层膜；
步骤S104：通过一次曝光、显影和刻蚀工艺形成所述第二钝化层的图形。
8.根据权利要求7所述的制备方法，其特征在于，所述缓冲层膜、所述底部钝化层膜和所述顶部钝化层膜均采用化学气相沉积法沉积形成；
在所述步骤S101中，沉积所述缓冲层膜的沉积功率范围为6kW-20kW，沉积间距范围为20-30mm，沉积压力范围为600-1000mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.3:15.6-1:16:45，沉积温度范围为230℃-300℃；
在所述步骤S102中，沉积所述底部钝化层膜的沉积功率范围为6kW-18kW，沉积间距范围为20-26mm，沉积压力范围为1000-1500mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.5:7.5-1:3.2:9.0，沉积温度范围为230℃-300℃；
在所述步骤S103中，沉积所述顶部钝化层膜的沉积功率范围为6kW-15kW，沉积间距范围为20-26mm，沉积压力范围为1500-2000mTorr，沉积气体为SiH4、NH3和N2的混合气体，SiH4、NH3和N2的气体流量比范围为1:2.5:7.5-1:3.2:9.0，沉积温度范围为230℃-300℃。
9.根据权利要求1-4任意一项所述的制备方法，其特征在于，所述薄膜晶体管包括有源层，所述有源层采用非晶硅材料、低温多晶硅材料或透明金属氧化物材料制成。
10.根据权利要求9所述的制备方法，其特征在于，所述薄膜晶体管包括顶栅型和底栅型。
11.一种阵列基板，其特征在于，所述阵列基板采用如权利要求1-10任意一项所述的制备方法制备形成。
12.一种显示装置，其特征在于，包括权利要求11所述的阵列基板。
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