CN105957834A - 薄膜晶体管阵列基板及其制备方法、显示装置 - Google Patents

薄膜晶体管阵列基板及其制备方法、显示装置 Download PDF

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Publication number
CN105957834A
CN105957834A CN201610440115.1A CN201610440115A CN105957834A CN 105957834 A CN105957834 A CN 105957834A CN 201610440115 A CN201610440115 A CN 201610440115A CN 105957834 A CN105957834 A CN 105957834A
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China
Prior art keywords
electrode
organic film
thin
film transistor
layer
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CN201610440115.1A
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English (en)
Inventor
邹志翔
杨成绍
宋博韬
黄寅虎
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Application filed by BOE Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201610440115.1A priority Critical patent/CN105957834A/zh
Publication of CN105957834A publication Critical patent/CN105957834A/zh
Priority to US15/533,159 priority patent/US10431607B2/en
Priority to PCT/CN2016/107066 priority patent/WO2017215195A1/en
Priority to EP16905307.1A priority patent/EP3308395A4/en
Pending legal-status Critical Current

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Abstract

一种薄膜晶体管阵列基板及其制备方法、显示装置，该薄膜晶体管阵列基板的制备方法包括：在衬底基板上形成有机膜层；对所述有机膜层进行表面处理以去除有机物残渣；在对所述有机膜层进行表面处理后的所述衬底基板上形成钝化层。在该薄膜晶体管阵列基板的制备过程中可通过去除形成有机膜层时引入的有机物残渣来改善薄膜晶体管阵列基板的表面环境，从而改善产品的鼓包问题、改善封框胶与薄膜晶体管阵列基板之间的粘结力减弱的问题、改善膜层结合困难的问题，使产品的PCT检测通过,并显著提升产品良率和信赖性。

Description

薄膜晶体管阵列基板及其制备方法、显示装置
技术领域
本发明的实施例涉及一种薄膜晶体管阵列基板及其制备方法、显示装置。
背景技术
由彩膜基板和薄膜晶体管阵列基板对盒形成的显示面板是液晶显示器的重要组成部分，而制作高分辨率和高透过率的显示面板会带来高功耗和高污染，从而限制了液晶显示器的发展。
在薄膜晶体管阵列基板中设置有机膜层可用来制作高分辨率、低功耗的液晶显示器。例如，在采用ADS(高级超维场转换)模式的液晶显示器中，设置在阵列基板上的电极(例如：像素电极或公共电极)与金属层(例如：栅金属层或源漏金属层)之间会产生寄生电容，寄生电容的存在会造成显示器的功耗过大。通过在电极和金属层之间形成一层比较厚的有机膜层(例如树脂层)可以降低电路电容、提高液晶显示器的分辨率、降低功耗，同时可以起到平坦化的作用。
但是，在形成有机膜层的过程中会产生有机物残渣，有机物残渣的存在会在后续工艺中给薄膜晶体管阵列基板带来鼓包问题、容易造成封框胶与薄膜晶体管阵列基板之间的粘结力减弱的问题和膜层结合困难的问题。
发明内容
本发明至少一实施例提供一种薄膜晶体管阵列基板及其制备方法、显示装置。在该薄膜晶体管阵列基板的制备过程中可通过去除形成有机膜层时引入的有机物残渣，来改善薄膜晶体管阵列基板的表面环境，从而改善产品的鼓包问题、改善封框胶与薄膜晶体管阵列基板之间的粘结力减弱的问题、改善膜层结合困难的问题，使产品的PCT检测通过,并显著提升产品良率和信赖性。
本发明至少一个实施例提供一种薄膜晶体管阵列基板的制备方法，包括：在衬底基板上形成有机膜层；对所述有机膜层进行表面处理以去除有机物残渣；在对所述有机膜层进行表面处理后的所述衬底基板上形成钝化层。
例如，在本发明一实施例提供的方法中，使用等离子体处理所述有机膜层的表面，生成相应的产物，并去除所述产物。
例如，在本发明一实施例提供的方法中，使用一氧化二氮、氧气或氮气产生的等离子体处理所述有机膜层的表面。
例如，在本发明一实施例提供的方法中，所述等离子体处理所述有机膜层的表面时的功率为2kw-25kw。
例如，在本发明一实施例提供的方法中，所述等离子体处理所述有机膜层的表面时的功率为8kw-15kw。
例如，在本发明一实施例提供的方法中，所述等离子体处理所述有机膜层的表面的时间为5-120秒。
例如，在本发明一实施例提供的方法中，所述等离子体处理所述有机膜层的表面的时间为10-60秒。
例如，在本发明一实施例提供的方法中，使用一氧化二氮、氧气或氮气产生的等离子体处理所述有机膜层的表面生成的产物包括碳氧化物、氮氧化物，并用抽真空的方式去除所述产物。
例如，在本发明一实施例提供的方法中，在温度为170℃-500℃、功率为1kw-50kw的条件下处理所述有机膜层的表面以去除有机物残渣。
例如，在本发明一实施例提供的方法中，所述有机膜层的材料包括丙烯酸树脂、聚硅烷、聚酰亚胺、聚偏氟乙烯、聚丙烯或聚四氟乙烯。
例如，本发明一实施例提供的方法，还包括：在形成所述有机膜层之后，在所述有机膜层之上形成电极层，在所述电极层之上形成所述钝化层，其中，在所述有机膜层之上形成所述电极层之前或之后，对所述有机膜层进行表面处理以去除有机物残渣。
例如，在本发明一实施例提供的方法中，所述电极层为像素电极。
例如，在本发明一实施例提供的方法中，在所述钝化层之上形成公共电极。
例如，在本发明一实施例提供的方法中，所述薄膜晶体管阵列基板中的薄膜晶体管可以是底栅型、顶栅型或双栅型结构的薄膜晶体管。
例如，在本发明一实施例提供的方法中，所述薄膜晶体管的有源层为氧化物半导体层、非晶硅半导体层、多晶硅半导体层或有机物半导体层。
本发明至少一个实施例还提供一种薄膜晶体管阵列基板，包括：设置在衬底基板上的栅极、栅绝缘层、有源层、源极、漏极、有机膜层；设置在所述有机膜层上的第一电极和在所述第一电极上的钝化层；其中，在形成所述钝化层之前对所述有机膜层进行过去除有机物残渣的表面处理。
例如，本发明一实施例提供的薄膜晶体管阵列基板，还包括：设置在所述钝化层之上的第二电极。
例如，在本发明一实施例提供的薄膜晶体管阵列基板中，所述第一电极为像素电极，所述第二电极为公共电极；或者，所述第一电极为公共电极，所述第二电极为像素电极。
本发明至少一个实施例还提供一种显示装置，包括上述任一实施例中的薄膜晶体管阵列基板。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例，而非对本发明的限制。
图1为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的流程图；
图2为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的又一流程图；
图3为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的再一流程图；
图4为本发明一实施例提供的一种底栅型薄膜晶体管阵列基板的结构示意图；
图5为本发明一实施例提供的底栅型薄膜晶体管阵列基板的又一结构示意图；
图6为本发明一实施例提供的底栅型薄膜晶体管阵列基板的再一结构示意图；
图7为本发明一实施例提供的一种顶栅型薄膜晶体管阵列基板的结构示意图。
附图标记：
400-薄膜晶体管阵列基板；401-衬底基板；402-栅极；403-栅绝缘层；404-有源层；405-漏极；406-源极；407-绝缘层；408-有机膜层；409-第一电极；410-钝化层；411-第二电极；412-过孔。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
如果在电极层和金属层之间形成一层比较厚的有机膜层(例如树脂层)，则可以降低电路电容，从而降低功耗，提高产品的分辨率，提升产品性能，同时还能起到平坦化的作用。但是，在形成有机膜层的过程中会导致有机物残渣，有机物残渣的存在会在后续工艺中给薄膜晶体管阵列基板带来鼓包问题。同时，有机物残渣和残留气体的存在容易造成封框胶与薄膜晶体管阵列基板之间的粘结力减弱的问题，水汽容易从粘结力薄弱的位置进入显示面板的内部，从而造成产品的PCT(压力锅蒸煮试验或饱和蒸汽试验)检测无法达到要求。除此之外，有机物残渣的存在也会带来膜层结合困难的问题。
PCT问题是有机膜产品普遍需要面对的问题，这里PCT被作为高温高压高湿的环境中测试薄膜晶体管阵列基板与彩膜基板的粘合力以及液晶是否泄漏等的参数。
例如，PCT检测的具体过程可以为：把刚完成对盒工艺的显示面板，放置在温度为121℃，湿度为100％,压力为2个标准大气压的测试环境中检测12小时，检测结束后观察基板、封框胶有无破损，液晶有无泄露，如无此类问题，则PCT信赖性检测成功通过，否则PCT检测不通过。
本发明至少一实施例提供一种薄膜晶体管阵列基板及其制备方法、显示装置。该薄膜晶体管阵列基板的制备方法，包括：在衬底基板上形成有机膜层；对该有机膜层进行表面处理以去除有机物残渣；在对该有机膜层进行表面处理后的衬底基板上形成钝化层。在该薄膜晶体管阵列基板的制备过程中可通过去除形成有机膜层时引入的有机物残渣来改善薄膜晶体管阵列基板的表面环境，从而改善产品的鼓包问题、改善封框胶与薄膜晶体管阵列基板之间的粘结力减弱的问题、改善膜层结合困难的问题，使产品的PCT检测通过,并显著提升产品良率和信赖性。
下面通过几个实施例进行说明。
实施例一
本实施例提供一种薄膜晶体管阵列基板的制备方法，例如，图1为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的流程图，该制备方法包括以下步骤：
S101：在衬底基板上形成有机膜层；
S102：对该有机膜层进行表面处理以去除有机物残渣；
S103：在对该有机膜层进行表面处理后的衬底基板上形成钝化层。
例如，在对该有机膜层进行表面处理以去除有机物残渣时，可以采用等离子体处理该有机膜层的表面。等离子体是不同于固、液、气等状态的物质存在的第四种状态，由大量的带正电、带负电的离子组成，可作为中间反应介质，特别是处于激发态的高能离子或原子，可促使很多复杂化学反应的发生。任何气体均能形成等离子体，很容易调整反应系统的气氛，通过对等离子介质的选择可获得氧化气氛、还原气氛或中性气氛。
例如，可采用辉光放电、电晕放电、介质阻挡放电和微波放电等放电的方法产生等离子体；例如，也可采用施加高频能量的方法产生等离子体，在CCP(容性耦合等离子体)腔室、ICP(电感耦合等离子体)装置或ECR(电子回旋共振)装置中进行等离子体处理；例如，也可采用加热的方法产生等离子体。
例如，采用等离子体处理有机物残渣时，其过程为：利用等离子体中的高能电子与有机物中的原子、分子碰撞产生激发态的原子、分子及自由基。等离子体中富集的离子，电子，激发态的原子、分子及自由基极其活泼，从而可进行热化学反应较困难甚至不可能进行的化学反应，这样就可以使有机物残渣与等离子体反应，最后反应产生的气体产物通过抽真空的方式从等离子体反应腔室中排出。
例如，在本发明的实施例中，可采用一氧化二氮(N2O)、氧气(O2)或氮气(N2)产生的等离子体处理有机膜层的表面。另外，也可以在上述气体中加入氩气(Ar)或氦气(He)等对上述气体进行稀释。需要说明的是，若等离子体能稳定放电，则稀释气体氩气(Ar)或氦气(He)是非必需的。
例如，采用一氧化二氮(N2O)、氧气(O2)或氮气(N2)产生的等离子体处理有机膜层的表面以去除有机物残渣时，该预设的等离子体处理时的功率可以大于或等于2kw，同时小于或等于25kw。
例如，示例性的，该预设的等离子体处理所述有机膜层的表面时的功率大于或等于8kw，同时小于或等于15kw。例如：9kw、10kw、12kw、14kw等。在保证能得到等离子体的基础上，尽量减低等离子体处理时的功率可以节约成本。如果采用加热的方式得到等离子体进行轰击处理时，减低等离子体处理时的功率也就减低了等离子体处理的温度，从而降低了金属电极(例如：栅极、源极或漏极)的受热程度，也减少了金属电极的鼓包问题。除此之外，等离子体处理时的功率过大，也会导致等离子体与有机膜层反应，从而造成有机膜层不均匀，进而影响产品的性能。
例如，采用一氧化二氮(N2O)、氧气(O2)或氮气(N2)产生的等离子体处理有机膜层的表面以去除有机物残渣时，该等离子体处理所述有机膜层的表面的时间大于或等于5秒，同时小于或等于120秒。
例如，示例性的，该等离子体处理的时间大于或等于10秒，同时小于或等于60秒。例如，15秒、25秒、30秒、35秒、40秒、45秒等，等离子体处理时的功率越大，对应的等离子体处理的时间越短。
例如，该有机膜层的材料包括丙烯酸树脂、聚硅烷、聚酰亚胺、聚偏氟乙烯、聚丙烯、聚四氟乙烯中的一种或多种。
例如，采用一氧化二氮、氧气或氮气产生的等离子体处理该有机膜层的表面生成的产物包括碳氧化物、氮氧化物和硫化物等气体产物。该气体产物通过等离子体设备的真空泵以抽真空的方式排出。
实施例二
例如，在对有机膜层进行表面处理以去除有机物残渣时，也可以不用等离子体进行处理。本实施例提供一种薄膜晶体管阵列基板的制备方法，直接在温度为大于或等于170℃、同时小于或等于500℃，功率为大于或等于1kw、同时小于或等于50kw的条件下处理有机膜层的表面以去除有机物残渣。
例如，也可以在上述温度、功率条件下处理有机膜层的表面以去除有机物残渣的过程中施加高电压，使有机膜层上的有机物残渣更容易分解形成小分子产物，从而以抽真空的方式将小分子产物排出。
实施例三
例如，处理有机膜层的表面以去除有机物残渣的方法，还包括：在形成有机膜层之后，在有机膜层之上形成电极层，在电极层之上形成钝化层，其中，在有机膜层之上形成电极层之前或之后，对有机膜层进行表面处理以去除有机物残渣。
例如，该电极层可以为像素电极层。
例如，在该钝化层之上还可以形成公共电极。
例如，示例性地，在形成有机膜层之后对有机膜层进行表面处理以去除有机物残渣，在去除有机物残渣的有机膜层之上形成电极层，在电极层上形成钝化层。采用该方法可以先去除有机膜层上的有机物残渣，从而消除了由于有机膜层引入的有机物残渣导致的有机膜层上的其他膜层(例如：像素电极层、钝化层、公共电极等)不易结合的问题，也消除了产品易鼓包的问题。例如，如果不去除有机物残渣，则可能造成有机膜层上的电极层和钝化层脱落，从而严重影响产品良率，同时有机物残渣和漏气也会造成封框胶和薄膜晶体管阵列基板之间的粘结力减弱的问题，水汽容易从粘结力薄弱的位置进入基板内部，从而造成产品的PCT检测无法通过的问题。
例如，示例性地，在形成有机膜层之后，在有机膜层上形成电极层，然后对有机膜层的未被电极层覆盖的区域进行表面处理以去除有机物残渣，在去除有机物残渣的有机膜层和电极层上形成钝化层。采用该方法可以同时去除有机膜层的未被电极层覆盖的区域处的有机物残渣和在形成电极层的过程中残留的光刻胶有机物残渣，从而改善了薄膜晶体管阵列基板的表面环境，消除了有机物残渣带来的封框胶和薄膜晶体管阵列基板之间的粘结力减弱的问题，使后续形成的膜层(例如：钝化层、公共电极等)与有机膜层、电极层(例如：像素电极)更好地接触，使产品的PCT检测通过，从而显著提升产品的良率和信赖性。例如，采用等离子体处理方法去除有机物残渣时，在形成钝化层时需要用到等离子体处理设备，采用等离子体来沉积钝化层，这样在沉积钝化层之前进行去除有机物残渣的处理可以简化操作过程。
实施例四
例如，该薄膜晶体管阵列基板中的薄膜晶体管可以是底栅型、顶栅型或双栅型结构的薄膜晶体管。
例如，图2为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的又一流程图，以底栅型的薄膜晶体管阵列基板的制备方法为例，该方法包括以下步骤：
S201：在衬底基板上依次形成栅极、栅绝缘层、有源层、源漏金属层；
S202：在衬底基板上形成有机膜层；
S203：对有机膜层进行表面处理以去除有机物残渣；
S204：在进行过表面处理的有机膜层上形成第一电极；
S205：在第一电极上依次形成钝化层、第二电极。
形成有机膜层用以覆盖已经形成在衬底基板上的栅极、栅绝缘层、有源层、源漏金属层等构造，或者也可以先形成绝缘层来覆盖已经形成在衬底基板上的栅极、栅绝缘层、有源层、源漏金属层等构造，然后再形成有机膜层。该有机膜层可以起到平坦化层的作用。
在本实施例的示例中，第一电极为像素电极，其例如与薄膜晶体管的漏极电连接，第二电极为公共电极；或者，第一电极为公共电极，第二电极为像素电极，其例如与薄膜晶体管的漏极电连接。
在本实施例的另一个示例中，第一电极同时包括像素电极和公共电极，二者彼此交错设置，此时则在钝化层上可无需再形成第二电极。
实施例五
例如，图3为本发明一实施例提供的一种薄膜晶体管阵列基板的制备方法的再一流程图，以底栅型的薄膜晶体管阵列基板的制备方法为例，该方法还可以包括以下步骤：
S301：在衬底基板上依次形成栅极、栅绝缘层、有源层、源漏金属层；
S302：在衬底基板上形成有机膜层；
S303：在有机膜层上形成第一电极；
S304：对有机膜层进行表面处理以去除有机物残渣；
S305：在第一电极上依次形成钝化层、第二电极。
同样，形成有机膜层用以覆盖已经形成在衬底基板上的栅极、栅绝缘层、有源层、源漏金属层等构造，或者也可以先形成绝缘层来覆盖已经形成在衬底基板上的栅极、栅绝缘层、有源层、源漏金属层等构造，然后再形成有机膜层，该有机膜层可以起到平坦化层的作用。
在本实施例的一个示例中，第一电极为像素电极，其例如与薄膜晶体管的漏极电连接，第二电极为公共电极；或者，第一电极为公共电极，第二电极为像素电极，其例如与薄膜晶体管的漏极电连接。
在本实施例的另一个示例中，第一电极同时包括像素电极和公共电极，二者彼此交错设置，此时则在钝化层上可无需再形成第二电极。
例如，对于顶栅型的薄膜晶体管阵列基板的制备方法，其与底栅型的薄膜晶体管阵列基板的制备方法的不同之处仅在于，在衬底基板上依次形成有源层、源漏金属层、栅绝缘层、栅极，其他步骤与底栅型的薄膜晶体管阵列基板的制备方法一样，在此不再赘述。
例如，对于双栅型的薄膜晶体管阵列基板的制备方法，其与底栅型的薄膜晶体管阵列基板的制备方法的不同之处在于，在源漏电极层之上形成了又一栅极，相比于传统的单一栅极的薄膜晶体管具有更好的导通电流的能力，且可以有效地降低电场拥挤的效应，对于元件漏电流的现象有很大的改善。
例如，形成栅极的材料可以为铝(Al)、铜(Cu)、钼(Mo)、铬(Cr)等金属，或铝铜合金(AlCu)、铜钼合金(CuMo)、钼铝合金(MoAl)、铝铬合金(AlCr)、铜铬合金(CuCr)、钼铬合金(MoCr)、铜钼铝合金(CuMoAl)等。
例如，栅绝缘层的材料可以是氧化硅(SiOx)，氮氧化硅(SiNOx)，氮化硅(SiNx)等。
例如，该薄膜晶体管的有源层为氧化物半导体层、非晶硅半导体层、多晶硅半导体层或有机物半导体层。
例如，在有源层和源漏电极层之间还可以形成刻蚀阻挡层，该刻蚀阻挡层的材料可以是氧化硅(SiOx)，氮氧化硅(SiNOx)，氮化硅(SiNx)等。
例如，绝缘层的材料可以是氧化硅(SiOx)，氮氧化硅(SiNOx)，氮化硅(SiNx)等。
例如，像素电极的材料可以是透明导电层，例如，ITO(氧化铟锡)、IZO(氧化铟锌)、IGZO(氧化铟镓锌)、导电树脂、石墨烯薄膜、碳纳米管薄膜中的任意一种。
例如，钝化层的材料可以为氧化硅(SiOx)，氮氧化硅(SiNOx)，氮化硅(SiNx)等。
例如，公共电极的材料可以为透明导电层，例如，ITO(氧化铟锡)、IZO(氧化铟锌)、IGZO(氧化铟镓锌)、导电树脂、石墨烯薄膜、碳纳米管薄膜中的任意一种。
实施例六
本实施例提供一种薄膜晶体管阵列基板，例如，图4为本发明一实施例提供的一种底栅型薄膜晶体管阵列基板的结构示意图。该薄膜晶体管阵列基板400包括：设置在衬底基板401上的栅极402、栅绝缘层403、有源层404、漏极405、源极406、绝缘层407、有机膜层408；设置在有机膜层408上的第一电极409和设置在第一电极409上的钝化层410；其中，在形成钝化层410之前对有机膜层408进行过去除有机物残渣的表面处理。
例如，该绝缘层407为无机绝缘层，例如该绝缘层407的材料为氧化硅、氧氮化硅或氮化硅等。
例如，有机膜层408覆盖形成在衬底基板401上的栅极402、栅绝缘层403、有源层404、漏极405、源极406、绝缘层407等结构。在形成有机膜层408之后对有机膜层408进行表面处理以去除有机物残渣，在去除有机物残渣的有机膜层408之上形成第一电极409，在第一电极409上形成钝化层410。例如，在图4中，第一电极409为像素电极。
例如，在形成有机膜层408之后，在有机膜层408上形成第一电极409，然后对有机膜层408的未被第一电极409覆盖的区域进行表面处理以去除有机物残渣，在去除有机物残渣的有机膜层408和第一电极409上形成钝化层410。这样可以同时去除有机膜层408的未被电极层覆盖的区域处的有机物残渣和在形成第一电极409的过程中残留的光刻胶有机物残渣。第一电极409通过有机膜层408和绝缘层407中的过孔412与漏极405电连接。
例如，根据需要，该薄膜晶体管阵列基板400还可以包括：设置在钝化层410之上的第二电极411，例如，在图4中，该第二电极411为公共电极，由此以实现ADS(高级超维场转换)型阵列基板。
实施例七
虽然在实施例六中，像素电极形成在钝化层之下，而公共电极形成在钝化层之上，然而也可以将公共电极形成在钝化层之下，而像素电极形成在钝化层之上，也即二者的位置关系可变换。例如，图5为本发明一实施例提供的底栅型薄膜晶体管阵列基板的又一结构示意图。该薄膜晶体管阵列基板400包括：设置在衬底基板401上的栅极402、栅绝缘层403、有源层404、漏极405、源极406、绝缘层407、有机膜层408；设置在有机膜层408上的第一电极409和设置在第一电极409上的钝化层410；其中，在形成钝化层410之前对有机膜层408进行过去除有机物残渣的表面处理。例如，在图5中，第一电极409为公共电极。
例如，该薄膜晶体管阵列基板400还包括：设置在钝化层410之上的第二电极411，例如，在图5中，该第二电极411为像素电极。第二电极411通过有机膜层408、绝缘层407和钝化层410中的过孔412与漏极405电连接。
在本实施例的另一个示例中，像素电极和公共电极可以共同形成在有机膜层上并被钝化层覆盖。例如，图6为本发明一实施例提供的底栅型薄膜晶体管阵列基板的再一结构示意图，该薄膜晶体管阵列基板400包括：设置在衬底基板401上的栅极402、栅绝缘层403、有源层404、漏极405、源极406、绝缘层407、有机膜层408；设置在有机膜层408上的第一电极409和设置在第一电极409上的钝化层410；其中，在形成钝化层410之前对有机膜层408进行过去除有机物残渣的表面处理。例如，在图6中，第一电极409同时包括像素电极和公共电极，二者彼此交错设置，此时则在钝化层上可无需再形成第二电极。即像素电极和公共电极共同形成在有机膜层上并被钝化层覆盖，由此以实现IPS(面内切换)型阵列基板。
例如，该薄膜晶体管阵列基板中的薄膜晶体管也可以为顶栅型结构。例如，图7为本发明一实施例提供的一种顶栅型薄膜晶体管阵列基板的结构示意图。该薄膜晶体管阵列基板400包括：设置在衬底基板401上的有源层404、漏极405、源极406、栅绝缘层403、栅极402、绝缘层407、有机膜层408；设置在有机膜层408上的第一电极409和设置在第一电极409上的钝化层410；其中，在形成钝化层410之前对有机膜层408进行过去除有机物残渣的表面处理。例如，在图7中，第一电极409为像素电极，第一电极409通过穿过有机膜层408、绝缘层407和栅绝缘层403中的过孔412与漏极405电连接。例如，该薄膜晶体管阵列基板400还包括：设置在钝化层410之上的第二电极411，例如，在图7中，该第二电极411为公共电极，由此以实现ADS(高级超维场转换)型阵列基板。
例如，与底栅型薄膜晶体管阵列基板类似，第一电极可以为公共电极，第二电极为像素电极，其例如与薄膜晶体管的漏极电连接。在此不再赘述。
例如，与底栅型薄膜晶体管阵列基板类似，第一电极可以同时包括像素电极和公共电极，二者彼此交错设置，此时则在钝化层上可无需再形成第二电极。在此不再赘述。
例如，对于双栅型薄膜晶体管阵列基板，其与底栅型的薄膜晶体管阵列基板的不同之处在于，在源漏电极层上设置有又一栅极，其他的构造与底栅型的薄膜晶体管阵列基板类似，在此不再赘述。
实施例八
本发明至少一个实施例还提供一种显示装置，包括本发明实施例二中的薄膜晶体管阵列基板。该显示装置可以为：液晶面板、电子纸、OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
有以下几点需要说明：
(1)本发明实施例附图只涉及到与本发明实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本发明的实施例的附图中，层或区域的厚度被放大或缩小，即这些附图并非按照实际的比例绘制。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
(3)在不冲突的情况下，本发明的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (19)

1.一种薄膜晶体管阵列基板的制备方法，包括：
在衬底基板上形成有机膜层；
对所述有机膜层进行表面处理以去除有机物残渣；
在对所述有机膜层进行表面处理后的所述衬底基板上形成钝化层。
2.根据权利要求1所述的方法，其中，使用等离子体处理所述有机膜层的表面，生成相应的产物，并去除所述产物。
3.根据权利要求2所述的方法，其中，使用一氧化二氮、氧气或氮气产生的等离子体处理所述有机膜层的表面。
4.根据权利要求2所述的方法，其中，所述等离子体处理所述有机膜层的表面时的功率为2kw-25kw。
5.根据权利要求4所述的方法，其中，所述等离子体处理所述有机膜层的表面时的功率为8kw-15kw。
6.根据权利要求3所述的方法，其中，所述等离子体处理所述有机膜层的表面的时间为5-120秒。
7.根据权利要求6所述的方法，其中，所述等离子体处理所述有机膜层的表面的时间为10-60秒。
8.根据权利要求3所述的方法，其中，使用一氧化二氮、氧气或氮气产生的等离子体处理所述有机膜层的表面生成的产物包括碳氧化物、氮氧化物，并用抽真空的方式去除所述产物。
9.根据权利要求1所述的方法，其中，在温度为170℃-500℃、功率为1kw-50kw的条件下处理所述有机膜层的表面以去除有机物残渣。
10.根据权利要求1-9中任一项所述的方法，其中，所述有机膜层的材料包括丙烯酸树脂、聚硅烷、聚酰亚胺、聚偏氟乙烯、聚丙烯或聚四氟乙烯。
11.根据权利要求2或9所述的方法，还包括：在形成所述有机膜层之后，在所述有机膜层之上形成电极层，在所述电极层之上形成所述钝化层，其中，在所述有机膜层之上形成所述电极层之前或之后，对所述有机膜层进行表面处理以去除有机物残渣。
12.根据权利要求11所述的方法，其中，所述电极层为像素电极。
13.根据权利要求12所述的方法，其中，在所述钝化层之上形成公共电极。
14.根据权利要求11所述的方法，其中，所述薄膜晶体管阵列基板中的薄膜晶体管可以是底栅型、顶栅型或双栅型结构的薄膜晶体管。
15.根据权利要求14所述的方法，其中，所述薄膜晶体管的有源层为氧化物半导体层、非晶硅半导体层、多晶硅半导体层或有机物半导体层。
16.一种薄膜晶体管阵列基板，包括：
设置在衬底基板上的栅极、栅绝缘层、有源层、源极、漏极、有机膜层；
设置在所述有机膜层上的第一电极和在所述第一电极上的钝化层；
其中，在形成所述钝化层之前对所述有机膜层进行过去除有机物残渣的表面处理。
17.根据权利要求16的薄膜晶体管阵列基板，还包括设置在所述钝化层之上的第二电极。
18.根据权利要求17的薄膜晶体管阵列基板，其中，所述第一电极为像素电极，所述第二电极为公共电极；或者，所述第一电极为公共电极，所述第二电极为像素电极。
19.一种显示装置，包括权利要求16-18中任一项所述的薄膜晶体管阵列基板。
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