CN104282648B - 半导体装置及其制法 - Google Patents

半导体装置及其制法 Download PDF

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CN104282648B
CN104282648B CN201310317211.3A CN201310317211A CN104282648B CN 104282648 B CN104282648 B CN 104282648B CN 201310317211 A CN201310317211 A CN 201310317211A CN 104282648 B CN104282648 B CN 104282648B
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metal gasket
semiconductor device
perforate
substrate
conductive component
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CN104282648A (zh
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林长甫
姚进财
庄旻锦
黄富堂
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Siliconware Precision Industries Co Ltd
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Abstract

一种半导体装置及其制法，该半导体装置包括：基板，其具有基板本体与形成于该基板本体上的至少一金属垫，该金属垫具有第一表面与形成于该第一表面的至少一开孔；半导体组件，其具有至少一焊垫；导电组件，其形成于该金属垫与该焊垫之间及该金属垫的开孔内；以及胶体，其形成于该基板与该半导体组件之间，以包覆该导电组件。藉此，本发明能强化该导电组件与该金属垫间的接合力，以提升该半导体装置的良率。

Description

半导体装置及其制法
技术领域
本发明关于一种半导体装置及其制法，特别是指一种可提升良率的半导体装置及其制法。
背景技术
随着半导体技术的日新月异、电子产品朝向轻薄化、以及半导体装置追求高良率的趋势下，半导体装置的尺寸与体积也随之不断缩小，但良率则需随之不断提高，以使该半导体装置达到轻薄短小及高良率的目的。
图1A为绘示现有技术的半导体装置的剖视示意图，图1B为依据图1A的线段AA绘示现有技术的半导体装置的俯视示意图。如图所示，半导体装置1包括基板11、芯片12、凸块13、焊料14以及胶体15。
该基板11具有基板本体111与依序形成于基板本体111上的铜垫112及拒焊层113。该芯片12具有形成于其表面120上的焊垫121与介电层122、形成于该介电层122的开口125上的凸块底下金属层123、以及形成于该介电层122上的保护层124。
该凸块13形成于该凸块底下金属层123上，该焊料14形成于该凸块13与该拒焊层113的开口114的铜垫112间。该胶体15形成于该基板11与该芯片12之间，用以包覆该基板11、芯片12、凸块13及焊料14。
上述半导体装置1的缺点，在于该铜垫112与该焊料14间的接合处16的接合力不佳，使得该铜垫112与该焊料14之间容易产生分离(delam)的情形，导致该半导体装置1的良率下降。
因此，如何克服上述现有技术的问题，实已成目前亟欲解决的课题。
发明内容
鉴于上述现有技术的种种缺失，本发明的主要目的为提供一种半导体装置及其制法，能强化该导电组件与该金属垫间的接合力，以提升该半导体装置的良率。
本发明的半导体装置，包括：基板，其具有基板本体与形成于该基板本体上的至少一金属垫，该金属垫具有第一表面与形成于该第一表面的至少一开孔；半导体组件，其具有至少一焊垫；导电组件，其形成于该金属垫与该焊垫之间及该金属垫的开孔内；以及胶体，其形成于该基板与该半导体组件之间，以包覆该导电组件。
本发明也提供一种半导体装置的制法，其包括：提供基板与半导体组件，该基板具有基板本体与形成于该基板本体上的至少一金属垫，且该金属垫具有第一表面与形成于该第一表面的至少一开孔，该半导体组件并具有至少一焊垫；形成导电组件于该金属垫与该焊垫之间及该金属垫的开孔内；以及填充胶体于该基板与该半导体组件之间，以包覆该导电组件。
该基板可具有形成于该基板本体及金属垫上的拒焊层，且该拒焊层具有开口以外露出该金属垫的开孔。
该金属垫可具有相对于该第一表面的第二表面，该开孔贯穿该金属垫的第一表面与第二表面以外露出该基板本体，使该导电组件形成于该开孔的侧壁及所外露的基板本体上。该金属垫可为铜垫。
该半导体组件与该基板分别具有至少二焊垫及一金属垫，且该金属垫具有对应该二焊垫的开孔，该二焊垫藉由该导电组件共同连接至该金属垫的开孔。或者，该半导体组件与该基板分别具有二焊垫及二金属垫，且该金属垫具有对应该二焊垫的开孔，该二焊垫藉由该导电组件分别连接至该二金属垫的开孔。
该开孔的形状可为矩形、圆形、Θ字形或Y字形。
该导电组件可具有导电体与焊料，该导电体形成于该焊垫上，该焊料形成于该导电体与该金属垫之间及该金属垫的开孔内。该导电体可为凸块或铜柱。
由上可知，本发明的半导体装置及其制法，主要在半导体组件上形成至少一焊垫，并在基板的金属垫中形成至少一开孔以外露出其侧壁及基板本体，且藉由导电组件连接该焊垫与该金属垫，使部分该导电组件形成于该开孔内以接触该侧壁及该基板本体。
藉此，本发明能增加该导电组件在该金属垫及该基板本体上的接触面积，以强化该导电组件与该金属垫间的接合力而避免产生分离的情形，同时降低该半导体装置的高度及体积，并减少该胶体的使用量，进而提升该半导体装置的良率，以使该半导体装置具备高良率、轻薄化及成本下降的效益。
附图说明
图1A为绘示现有技术的半导体装置的剖视示意图；
图1B为依据图1A的线段AA绘示现有技术的半导体装置的俯视示意图；
图2A至图2C为绘示本发明的半导体装置及其制法的第一实施例的剖视示意图，其中，图2A'为图2A的俯视示意图；
图3A至图3C为绘示本发明的半导体装置及其制法的第二实施例的剖视示意图，其中，图3A'为图3A的俯视示意图；以及
图4A与图4B为绘示本发明的基板中金属垫的不同开口形状的俯视示意图。
符号说明
1、2、2' 半导体装置
11、21 基板
111、211 基板本体
112 铜垫
113、213 拒焊层
114、125、216、225 开口
12 芯片
120、220 表面
121、221 焊垫
122、222 介电层
123、223 凸块底下金属层
124、224 保护层
13 凸块
14、232 焊料
15、24 胶体
16 接合处
212 金属垫
212a 第一表面
212b 第二表面
214 开孔
215 侧壁
217 底部
22 半导体组件
23 导电组件
231 导电体。
具体实施方式
以下藉由特定的具体实施例说明本发明的实施方式，本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其它优点及功效。
须知，本说明书所附图式所绘示的结构、比例、大小等，均仅用以配合说明书所揭示的内容，以供本领域技术人员的了解与阅读，并非用以限定本发明可实施的限定条件，故不具技术上的实质意义，任何结构的修饰、比例关系的改变或大小的调整，在不影响本发明所能产生的功效及所能达成的目的下，均应仍落在本发明所揭示的技术内容得能涵盖的范围内。
同时，本说明书中所引用的如「上」、「一」、「第一」、「第二」及「表面」等用语，也仅为便于叙述的明了，而非用以限定本发明可实施的范围，其相对关系的改变或调整，在无实质变更技术内容下，当也视为本发明可实施的范畴。
图2A至图2C为绘示本发明的半导体装置及其制法的第一实施例的剖视示意图，其中，图2A'为图2A的俯视示意图。
如图2A与图2A'所示，先提供一基板21，其具有基板本体211与形成于该基板本体211上的至少一金属垫212，该金属垫212具有相对的第一表面212a与第二表面212b、以及形成于该第一表面212a的至少一开孔214。
该金属垫212具有开孔214，开孔214的形状可为双矩形。但在其它实施例中，该开孔214的形状可为单矩形、圆形、Θ字形、Y字形或各种不同的形状。该金属垫212可为铜垫。
该基板21可具有形成于该基板本体211及金属垫212上的拒焊层213，且该拒焊层213具有开口216以外露出该金属垫212的开孔214。
该开孔214可贯穿该金属垫212的第一表面212a与第二表面212b，以外露出该基板本体211及该金属垫212的侧壁215。但在其它实施例中，该开孔214也可不贯穿该金属垫212的第二表面212b而未外露出该基板本体211。
如图2B所示，提供一半导体组件22，其一表面220上形成有至少一焊垫221。该半导体组件22可为半导体芯片或半导体封装件。
接着，形成导电组件23于该半导体组件22的焊垫221上，并将该导电组件23对应至该金属垫212的开孔214。
该半导体组件22的表面220上也可形成有介电层222、凸块底下金属层223及保护层224。该介电层222形成于该表面220及该焊垫221上，并具有开口225以外露出部分该焊垫221，该凸块底下金属层223形成于该介电层222的开口225所外露的焊垫221上，该保护层224形成于该介电层222上。
如图2C所示，将该导电组件23接置于该拒焊层213所外露的第一表面212a上及该金属垫212的开孔214处，再通过回焊(reflow)制程，使该导电组件23流入该金属垫212的开孔214内。藉此，该导电组件23可形成于该焊垫221(或该凸块底下金属层223)与该金属垫212的第一表面212a之间、该开孔214内及其侧壁215上、该开孔214所外露的基板本体211上。
最后，填充胶体24于该基板21的拒焊层213与该半导体组件22的保护层224之间，以包覆该导电组件23。
上述的半导体组件22与基板21可分别具有二焊垫221及一金属垫212，该二焊垫221藉由二导电组件23共同连接该金属垫212。但在其它实施例中，该半导体组件22与该基板21可分别具有二焊垫221及二金属垫212，该二焊垫221藉由二导电组件23分别连接该二金属垫212。
该导电组件23可具有导电体231与焊料232，该导电体231可形成于该焊垫221或该凸块底下金属层223上，该焊料232可形成于该导电体231与该金属垫212的第一表面212a之间、该金属垫212的开孔214内及其侧壁215上、该开孔214所外露的基板本体211上。该导电体231可为凸块或铜柱等。
本发明另提供一种半导体装置，如图2C所示。该半导体装置2包括基板21、半导体组件22、导电组件23以及胶体24。
该基板21具有基板本体211与形成于该基板本体211上的至少一金属垫212，该金属垫212具有相对的第一表面212a与第二表面212b、以及形成于该第一表面212a的至少一开孔214。该开孔214可贯穿该金属垫212的第一表面212a与第二表面212b，以外露出该基板本体211及该金属垫212的侧壁215。该金属垫212可为铜垫。
该基板21可具有拒焊层213，且该拒焊层213具有开口216以外露出该金属垫212的开孔214。该开孔214的形状可为单矩形、双矩形、圆形、Θ字形、Y字形或各种不同的形状。
该半导体组件22的表面220上形成有至少一焊垫221，该表面220上也可形成有介电层222、凸块底下金属层223及保护层224。该介电层222形成于该表面220及该焊垫221上，并具有开口225以外露出部分该焊垫221，该凸块底下金属层223形成于该介电层222的开口225所外露的焊垫221上，该保护层224形成于该介电层222上。该半导体组件22可为半导体芯片或半导体封装件。
该半导体组件22与该基板21可分别具有二焊垫221及一金属垫212，该二焊垫221藉由二导电组件23共同连接该金属垫212。但在其它实施例中，该半导体组件22与该基板21可分别具有二焊垫221及二金属垫212，该二焊垫221藉由二导电组件23分别连接该二金属垫212。
该导电组件23可形成于该焊垫221(或该凸块底下金属层223)与该金属垫212的第一表面212a之间、该开孔214内及其侧壁215上、该开孔214所外露的基板本体211上。
该导电组件23可具有导电体231与焊料232，该导电体231形成于该焊垫221或该凸块底下金属层223上，该焊料232形成于该导电体231与该金属垫212之间及该金属垫212的开孔214内。该导电体231可为凸块或铜柱等。
该胶体24形成于该基板21与该半导体组件22之间，用以包覆该基板21、半导体组件22及导电组件23。
图3A至图3C为绘示本发明的半导体装置及其制法的第二实施例的剖视示意图，其中，图3A'为图3A的俯视示意图。图3A至图3C与上述图2A至图2C的半导体装置及其制法大致相同，其主要差异如下：
在图3A与图3A'中，该基板21具有二金属垫212，该开孔214的形状为圆形。同时，该开孔214并不贯穿该金属垫212的第二表面212b，故未外露出该基板本体211而是外露出该开孔214的底部217。
在图3B中，该半导体组件22具有二焊垫221，该二焊垫221上分别形成有二导电组件23。
在图3C中，该二焊垫221藉由该二导电组件23分别连接该二金属垫212。
本发明另提供一种半导体装置，如图3C所示。图3C的半导体装置与上述图2C的半导体装置大致相同，其主要差异如下：
在图3C中，半导体装置2'的基板21具有二金属垫212，该开孔214并不贯穿该金属垫212的第二表面212b，故未外露出该基板本体211而是外露出该开孔214的底部217。该半导体组件22具有二焊垫221，且该二焊垫221藉由该二导电组件23分别连接该二金属垫212。
图4A与图4B为绘示本发明的基板中金属垫的不同开口形状的俯视示意图。
在图4A中，开口216的形状类似Θ字形。而在图4B中，该开口216的形状则类似Y字形或人字形。但在其它实施例中，该开口216也可为各种不同的形状。
由上可知，本发明的半导体装置及其制法，主要在半导体组件上形成至少一焊垫，并在基板的金属垫中形成至少一开孔以外露出其侧壁及基板本体，且藉由导电组件连接该焊垫与该金属垫，使部分该导电组件形成于该开孔内以接触该侧壁及该基板本体。
藉此，本发明能增加该导电组件在该金属垫及该基板本体上的接触面积，以强化该导电组件与该金属垫间的接合力而避免产生分离的情形，同时降低该半导体装置的高度及体积，并减少该胶体的使用量，进而提升该半导体装置的良率，以使该半导体装置具备高良率、轻薄化及成本下降的效益。
上述实施例仅用以例示性说明本发明的原理及其功效，而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下，对上述实施例进行修改。因此本发明的权利保护范围，应如权利要求书所列。

Claims (16)

1.一种半导体装置，其包括：
基板，其具有基板本体与形成于该基板本体上的至少一金属垫，单一的该金属垫具有第一表面与形成于该第一表面的二开孔；
半导体组件，其具有二焊垫；
二导电组件，其形成于单一的该金属垫的该二开孔与该二焊垫之间，且单一的该金属垫通过该二开孔共同连接该二导电组件；以及
胶体，其形成于该基板与该半导体组件之间以包覆该二导电组件。
2.根据权利要求1所述的半导体装置，其特征在于，该基板还具有形成于该基板本体及金属垫上的拒焊层，且该拒焊层具有开口以外露出该金属垫的开孔。
3.根据权利要求1所述的半导体装置，其特征在于，该金属垫还具有相对于该第一表面的第二表面，该开孔贯穿该金属垫的第一表面与第二表面以外露出该基板本体，使该导电组件形成于该开孔的侧壁及所外露的基板本体上。
4.根据权利要求1所述的半导体装置，其特征在于，该金属垫为铜垫。
5.根据权利要求1所述的半导体装置，其特征在于，该金属垫的该二开孔分别对应该二焊垫，该二焊垫通过该二导电组件共同连接至该金属垫。
6.根据权利要求1所述的半导体装置，其特征在于，该开孔的形状为矩形、圆形、Θ字形或Y字形。
7.根据权利要求1所述的半导体装置，其特征在于，该导电组件具有导电体与焊料，该导电体形成于该焊垫上，该焊料形成于该导电体与该金属垫之间及该金属垫的开孔内。
8.根据权利要求7所述的半导体装置，其特征在于，该导电体为凸块或铜柱。
9.一种半导体装置的制法，其包括：
提供基板与半导体组件，该基板具有基板本体与形成于该基板本体上的至少一金属垫，且单一的该金属垫具有第一表面与形成于该第一表面的二开孔，该半导体组件并具有二焊垫；
形成二导电组件于单一的该金属垫的该二开孔与该二焊垫之间，且单一的该金属垫通过该二开孔共同连接该二导电组件；以及
填充胶体于该基板与该半导体组件之间以包覆该二导电组件。
10.根据权利要求9所述的半导体装置的制法，其特征在于，该基板还具有形成于该基板本体及金属垫上的拒焊层，且该拒焊层具有开口以外露出该金属垫的开孔。
11.根据权利要求9所述的半导体装置的制法，其特征在于，该金属垫还具有相对于该第一表面的第二表面，该开孔贯穿该金属垫的第一表面与第二表面以外露出该基板本体，使该导电组件形成于该开孔的侧壁及所外露的基板本体上。
12.根据权利要求9所述的半导体装置的制法，其特征在于，该金属垫为铜垫。
13.根据权利要求9所述的半导体装置的制法，其特征在于，该金属垫的该二开孔分别对应该二焊垫，该二焊垫通过该二导电组件共同连接至该金属垫。
14.根据权利要求9所述的半导体装置的制法，其特征在于，该开孔的形状为矩形、圆形、Θ字形或Y字形。
15.根据权利要求9所述的半导体装置的制法，其特征在于，该导电组件具有导电体与焊料，该导电体形成于该焊垫上，该焊料形成于该导电体与该金属垫之间及该金属垫的开孔内。
16.根据权利要求15所述的半导体装置的制法，其特征在于，该导电体为凸块或铜柱。
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