CN104009002A - Processing method of stacked wafer - Google Patents

Processing method of stacked wafer Download PDF

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Publication number
CN104009002A
CN104009002A CN201410058232.2A CN201410058232A CN104009002A CN 104009002 A CN104009002 A CN 104009002A CN 201410058232 A CN201410058232 A CN 201410058232A CN 104009002 A CN104009002 A CN 104009002A
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Prior art keywords
wafer
bonding sheet
chip
stacked wafer
remaining area
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CN201410058232.2A
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Chinese (zh)
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CN104009002B (en
Inventor
荒井一尚
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Disco Corp
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Disco Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/38Removing material by boring or cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Optics & Photonics (AREA)
  • Dicing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The invention provides a processing method of a stacked wafer; in the stacked wafer with a chip stacked on the wafer, when the chip is bonded on a side of a bonding sheet, the wafer can still be cut into chips; the method is characterized in that a fixing step before a cutting step is arranged as below: in an area corresponding to a periphery remained area, a fixing agent is arranged between the bonding sheet and a surface of the wafer, so the periphery remained area of the wafer can be fixed on the bonding sheet.

Description

The processing method of stacked wafer
Technical field
The present invention relates to the processing method of the stacked wafer that is equipped with multiple chips on wafer.
Background technology
In the past, as multiple semiconductor device are integrated into one of method in encapsulation, three-dimensional installation was known.It is by multiple semiconductor device chips stacked and method of installing on three-dimensional that this three-dimensional is installed, and carries out existing in one of stacked technology CoW(Chip on waferr: the chip on wafer in three-dimensional) mode is (for example,, with reference to patent documentation 1.)。
In such three-dimensional is installed, form the stacked wafer that is laminated with chip on wafer, by this stacked wafer is divided into each chip, form the stacked die of the state that is laminated with chip on chip.
As the method for cutting apart stacked wafer, as disclosed in patent documentation 2, the known method that has the topping machanism by thering is bite to cut.
In addition, as other the method for cutting apart stacked wafer, as disclosed in patent documentation 3, known have at illuminating laser beam after forming upgrading layer, wafer is applied to the method that external force is cut apart.For example, as the method that applies external force and cut apart, the dividing method of the disclosed use extension fixture of known patent document 4.
[patent documentation 1] TOHKEMY 2012-209522 communique
[patent documentation 2] TOHKEMY 2007-214201 communique
No. 3408805th, [patent documentation 3] Japan Patent
[patent documentation 4] TOHKEMY 2010-034250 communique
As a mode of stacked wafer, the upper stacked die of the known intermediary layer in wafer-like (intermediary layer wafer) and the stacked wafer that obtains.For the stacked wafer of such mode, in order to be implemented in the characteristic check of the projection forming on intermediary layer, need to be divided into after stacked die, be made as the state that becomes mode supporting chip side on bonding sheet of upside with divided intermediary layer side.
In order to realize this state, consider, under the chip side of stacked wafer being sticked on bonding sheet and make state that the intermediary layer of wafer-like exposes from upside, stacked wafer to be cut apart.
But, on the periphery remaining area of the intermediary layer of wafer-like, do not arrange chip, cannot intermediary layer be sticked on bonding sheet by chip.
Therefore, as disclosed in patent documentation 4, use extension fixture is expanded bonding sheet and the intermediary layer of wafer-like is applied in the dividing method of external force, because periphery remaining area is not fixed on bonding sheet by pasting, therefore cannot apply external force to the boundary member arranging between region and the periphery remaining area of chip, be created in the problem that cannot cut apart on this boundary member.
Not only there is this problem for the stacked wafer of intermediary layer that uses wafer-like, for stacked chip on the device wafer that is formed with device and there is too this problem in the stacked wafer that obtains.
Summary of the invention
The present invention is just in view of above problem points completes, its object is to provide a kind of processing method of stacked wafer, for the chip side of the stacked wafer that is laminated with chip on wafer is sticked under the state on bonding sheet, also wafer can be divided into each chip.
According to the invention of the 1st aspect, a kind of processing method of stacked wafer is provided, this stacked wafer has wafer and chip, this chip is layered in respectively the surperficial multiple preset lines of cutting apart by intersecting of wafer and divides on the each region forming, this stacked wafer has and is laminated with the chip area of multiple chips and the periphery remaining area around chip area, between chip area and periphery remaining area, be formed with jump, the processing method of this stacked wafer is characterised in that and comprises: bonding sheet is pasted step, pastes bonding sheet in the chip side of stacked wafer; Cut apart starting point and form step, before or after implementing bonding sheet stickup step, on wafer, form the starting point of cutting apart of cutting apart preset lines along stacked wafer; And segmentation step, implementing bonding sheet stickup step and cutting apart after starting point formation step, make bonding sheet expansion and stacked wafer is applied to external force, cut apart wafer from cutting apart starting point, at least implementing to there is fixing step before segmentation step, in this fixing step, on the region corresponding with periphery remaining area, between bonding sheet and the surface of wafer, arrange fixative, the periphery remaining area of wafer is fixed on bonding sheet.
According to the invention of the 2nd aspect, the processing method of the stacked wafer described in the 1st aspect is provided, it is characterized in that, bonding sheet is pressure-sensitive sheet, and fixative is made up of ultraviolet hardening resin, in fixing step, on the region corresponding with periphery remaining area, between bonding sheet and the surface of wafer, be a wire and arranged after fixative,, thus the periphery remaining area of wafer is fixed on bonding sheet fixative irradiation ultraviolet radiation across bonding sheet.
According to the present invention, the processing method of stacked wafer is provided, on wafer, be laminated with in the stacked wafer of chip, chip side is being sticked under the state on bonding sheet, also wafer can be divided into each chip.
Particularly, at least, before making bonding sheet expansion, implement following fixing step: in the region corresponding with periphery remaining area, between bonding sheet and the surface of wafer, arrange fixative, the periphery remaining area of wafer is fixed on bonding sheet.
Thus, the position of the periphery remaining area of wafer also can be fixed on bonding sheet by fixative, external force is passed to periphery remaining area 16 and is working tension radially, can make wafer disrumpent feelings in the cutting apart in starting point of boundary member being formed between chip area and periphery remaining area.
Brief description of the drawings
Fig. 1 is the stereogram that the structure of stacked wafer is shown.
Fig. 2 is the stereogram that bonding sheet stickup step is shown.
Fig. 3 is the end view that bonding sheet stickup step is shown.
Fig. 4 is the sectional view that is illustrated in the stacked wafer of pasting on bonding sheet.
Fig. 5 illustrates the end view of cutting apart starting point formation step.
Fig. 6 is the fixing sectional view that the periphery remaining area based on fixative is shown.
(A) of Fig. 7 is the stereogram of the configuration of the gluey fixative of explanation, (B) is the stereogram that the configuration of the fixative hardening is described.
Fig. 8 is the sectional view of cutting apart front state illustrating in segmentation step.
Fig. 9 is the sectional view that the state after cutting apart in segmentation step is shown.
Figure 10 illustrates to use the sectional view of ultraviolet hardening resin as the example of fixative.
Label declaration
1: stacked wafer
11a: surface
12: chip
13: cut apart preset lines
14: chip area
16: periphery remaining area
17: upgrading layer
18: bonding sheet
19: boundary member
40: fixative
Embodiment
Below, the execution mode that present invention will be described in detail with reference to the accompanying.Fig. 1 is the stereogram illustrating as the stacked wafer 1 of an example of processing object of the present invention.
Stacked wafer 1 is configured to, and to be configured to the mode of the multiple chips 12,12 of surperficial 11a top rail extended spread of intermediary layer 11 of the discoid wafer of thin plate, is disposed in the position of regulation.
In region between adjacent chip 12,12, regulation is cut apart preset lines 13,13, predeterminedly cuts apart preset lines 13,13 and cuts apart along this.
On the surperficial 11a of intermediary layer 11, the region that arranges chip 12 is made as to chip area 14, the position of the periphery of chip area 14 is made as periphery remaining area 16.
Chip area 14 is configured to the thickness that exceeds chip 12 than periphery remaining area 16, therefore, forms jump 15 at chip area 14 and the boundary member of periphery remaining area 16.Due to the existence of this jump 15, in the case of the chip area of stacked wafer 1 14 being sticked on to bonding sheet 18(Fig. 2), periphery remaining area 16 floats from bonding sheet 18.
Therefore, even in the situation that expansion bonding sheet 18 is cut apart, also can not apply external force to the periphery remaining area 16 floating from bonding sheet 18, thereby cannot carry out cutting apart between chip area 14 and periphery remaining area 16.
Therefore, in the present embodiment, carry out cutting apart of stacked wafer 1 by following method.First, as shown in Figures 2 and 3, implemented to paste in chip 12 sides of stacked wafer 1 the bonding sheet stickup step of bonding sheet 18.
As shown in Figures 2 and 3, in stacked wafer 1, using the back side 11b of intermediary layer 11 as upside, make chip 12(chip area 14) relative with the adhesive layer 18a of bonding sheet 18, chip 12 is sticked on adhesive layer 18a.
Here base material 18b(Fig. 3 of bonding sheet 18) for example can be by PO(polyolefin), PVC(polyvinyl chloride), PE(PETG) etc. formation.In addition, adhesive layer 18a(sticks with paste layer) can be formed by the resin of rubber series or acrylic acid series.
In addition, the ring-shaped frame 20 having around the big or small peristome 20a of stacked wafer 1 is sticked on bonding sheet 18.
Then, as shown in Figure 4, suitably cut off bonding sheet 18, so that it takes in the periphery of ring-shaped frame 20, thus, form, across bonding sheet 18, stacked wafer 1 is fixed on to the wafer cell 22 on ring-shaped frame 20.
Then, as shown in Figure 5, before or after implementing bonding sheet stickup step, implement to cut apart starting point and form step, cut apart in starting point formation step at this, in intermediary layer 11, form the starting point of cutting apart of cutting apart preset lines 13 along stacked wafer 1.
In the present embodiment, as shown in Figure 5, having implemented, after bonding sheet stickup step, to form upgrading layer by Ear Mucosa Treated by He Ne Laser Irradiation unit 30 in intermediary layer 11, form and cut apart starting point thus.
In the example of Fig. 5, keep ring-shaped frame 20 by fixture 32, in maintenance platform 34, across the stacked wafer 1 of bonding sheet 18 attracting holding.
Then, will keep platform 34 to process feeding in arrow X1 direction, and from Ear Mucosa Treated by He Ne Laser Irradiation unit 30 to intermediary layer 11 illuminating laser beams, thus, as shown in Figure 6, along cutting apart preset lines 13 at the interior formation upgrading of intermediary layer 11 layer 17.
In addition, except as in the present embodiment, form and cut apart starting point (upgrading layer 17) in addition by laser beam irradiation, also can form laser processing groove by Laser ablation, or the topping machanism of the bite by having rotation forms cutting slot, cuts apart starting point thereby form.
In addition, can be also, before implementing bonding sheet stickup step, implement in advance to cut apart starting point and form step, be pre-formed upgrading layer 17, then, as shown in Figure 3, the stacked wafer 1 that has formed upgrading layer be sticked on bonding sheet 18.
Then, except each step described above, also implement following fixing step: in the region corresponding with periphery remaining area 16, between bonding sheet 18 and the surperficial 11a of intermediary layer 11, arrange fixative 40(Fig. 4), the periphery remaining area 16 of intermediary layer 11 is fixed on bonding sheet 18.
Before or after implementing to implement this fixing step before segmentation step described later, being predefined in any one step in above steps, implement.
Shown in Fig. 6, arrange fixative 40 at the surperficial 11a of intermediary layer 11, by fixative 40, the periphery remaining area 16 of intermediary layer 11 pasted to the state of bonding sheet 18.
This fixative 40 for example can use gluey bonding agent, considers to outpour fixative 40 in the mode of the periphery around intermediary layer 11 (along limit), provides fixative 40 thus to the gap S between periphery remaining area 16 and the bonding sheet 18 of intermediary layer 11.
In addition, for example, as shown in Figure 1, can under the state that the surperficial 11a of intermediary layer 11 is exposed, carry out arranging of this fixative 40 upward, that is, can before bonding sheet is pasted step, implement.Thus, paste step with bonding sheet and side by side implement fixing step.
Or, as shown in Figure 4, the surperficial 11a of intermediary layer 11 can sticked under the state on bonding sheet 18 and carrying out, that is, can after pasting step, implement bonding sheet.Or, as shown in Figure 5, can carry out having formed by laser beam irradiation etc. after cutting apart starting point, that is, can implement cutting apart after starting point forms step.
And, about arranging of fixative 40, except the apparatus for coating by for being coated with fixative 40 automatically provides, also can be undertaken by operator manual working.In addition, except provide continuously fixative 40 as shown in Fig. 7 (A), around all side (along limit) of intermediary layer 11 in addition, also can as shown in (B) of Fig. 7, provide intermittently fixative 41, fixative 41 is configured to a wire.
Fixative 40 does not need to rest on the gap S(Fig. 6 between intermediary layer 11 and bonding sheet 18) in, also can, around outer peripheral edges or the back side 11b to intermediary layer 11, cover back side 11b with fixative 40 thus.
Then, as shown in Figure 8 and Figure 9, the segmentation step being implemented as follows: bonding sheet 18 expanded and stacked wafer 1 is applied to external force, cutting apart intermediary layer 11 from cutting apart starting point (upgrading layer 17).
Use in the present embodiment segmenting device 50, this segmenting device 50 has the maintenance platform 51 that remains on the stacked wafer 1 of pasting on bonding sheet 18 and the framework holding member 56 that keeps ring-shaped frame 20.
Framework holding member 56 drops to the expanded position shown in Fig. 9 by the driving of cylinder 55 from the holding position shown in Fig. 8, make to keep platform 51 and framework holding member 56 to relatively move in vertical direction.
Now, the ring-shaped frame 20 keeping on the mounting surface 56a of framework holding member 56 declines, and the bonding sheet 18 of installing on ring-shaped frame 20 and the upper ora terminalis butt that keeps platform 51 are mainly expanded on radial direction.
Consequently, external force is passed to the intermediary layer 11 sticking on bonding sheet 18, and be working tension radially, when being, pulling force centering interlayer 11 does radially the used time, due to along cutting apart preset lines 13(with reference to Fig. 1) upgrading layer 17 strength decreased that form, therefore, this upgrading layer 17 becomes cuts apart basic point, intermediary layer 11 by disrumpent feelings, is divided into each chip 1A, 1A along upgrading layer 17.
And, in the time of this segmentation step, because the position of the periphery remaining area 16 of intermediary layer 11 is also fixed on bonding sheet 18 by fixative 40, therefore, external force is also delivered to periphery remaining area 16, pulling force is radially and acts on, and in the upgrading layer 17 forming, makes intermediary layer 11 disrumpent feelings on the boundary member 19 between chip area 14 and periphery remaining area 16.
As described above, can implement the present invention.
, a kind of processing method of stacked wafer 1 is provided, this stacked wafer 1 has chip 12 and the intermediary layer 11 as wafer, this chip 12 is layered in respectively the surperficial multiple preset lines 13 of cutting apart by intersecting of intermediary layer 11 and divides on the each region forming, this stacked wafer 1 has and is laminated with the chip area 14 of multiple chips 12 and the periphery remaining area 16 around chip area 14, between chip area 14 and periphery remaining area 16, be formed with jump 15, the processing method of this stacked wafer 1 comprises: bonding sheet is pasted step, chip 12 sides at stacked wafer 1 are pasted bonding sheet 18, cut apart starting point and form step, before or after implementing bonding sheet stickup step, on intermediary layer 11, form the starting point of cutting apart of cutting apart preset lines 13 along stacked wafer 1, and segmentation step, implementing bonding sheet stickup step and cutting apart after starting point formation step, bonding sheet 18 is expanded and stacked wafer 1 is applied to external force, cut apart intermediary layer 11 from cutting apart starting point, at least implementing to there is following fixing step before segmentation step: on the region corresponding with periphery remaining area 16, between bonding sheet 18 and the surperficial 11a of intermediary layer 11, arrange fixative 40, the periphery remaining area 16 of intermediary layer 11 is fixed on bonding sheet 18.
According to this processing method, because the position of the periphery remaining area 16 of the intermediary layer 11 as wafer is also fixed on bonding sheet 18 by fixative 40, therefore, external force is also delivered to periphery remaining area 16, pulling force is radially and acts on, in the upgrading layer 17 forming on can the boundary member 19 between chip area 14 and periphery remaining area 16, make intermediary layer 11 disrumpent feelings.
In addition, in the above embodiment, illustrate and used the example of intermediary layer 11 as the stacked wafer 1 of wafer, still, also can apply the present invention for the stacked wafer of stacked chip on the device wafer that is formed with device.
In addition, also can be, execution mode shown in Fig. 7 (B), bonding sheet 18 is pressure-sensitive sheets of pasting by crimping, fixative 41 is made up of ultraviolet hardening resin, in fixing step, on the region corresponding with periphery remaining area 16, between bonding sheet 18 and the surperficial 11a of intermediary layer 11, fixative 41 is arranged to after a wire, as shown in figure 10, by across bonding sheet 18 to fixative 41 irradiation ultraviolet radiations 42, the periphery remaining area 16 of intermediary layer 11 is fixed on bonding sheet 18.
This execution mode is to be particularly suitable for using the execution mode of ultraviolet hardening resin as the situation of the fixative 41 of the type of hardening.This is because if be not arranged to dotted line shape, configure intermittently if not spaced apart, due to fixative sclerosis, the expansion of the bonding sheet 18 can hinder segmentation step time.
In the execution mode shown in Figure 10, by the rear side from bonding sheet 18, fixative 41 is irradiated to the ultraviolet ray 42 from ultraviolet lamp 44, fixative 41 is hardened.
Because this fixative 41 is configured to a wire in the periphery remaining area 16 of intermediary layer 11, so, between the fixative 41 scattering, form space part 43(Fig. 7 (B)), therefore can in this space part 43, allow the expansion of bonding sheet 18, the Zone Full of centering interlayer 11 transmits external force, makes radial pulling force effect.

Claims (2)

1. the processing method of a stacked wafer, this stacked wafer has wafer and chip, this chip is layered in respectively the surperficial multiple preset lines of cutting apart by intersecting of this wafer and divides on the each region forming, this stacked wafer has and is laminated with the chip area of multiple these chips and the periphery remaining area around this chip area, between this chip area and this periphery remaining area, be formed with jump
The processing method of this stacked wafer is characterised in that and comprises:
Bonding sheet is pasted step, pastes bonding sheet in this chip side of stacked wafer;
Cut apart starting point and form step, paste before or after step implementing bonding sheet, on this wafer, form the starting point of cutting apart of cutting apart preset lines along this of this stacked wafer; And
Segmentation step, pastes step and this and cuts apart starting point and form after step having implemented this bonding sheet, makes this bonding sheet expansion and this stacked wafer is applied to external force, and from this is cut apart, light and cut apart this wafer,
At least implementing to comprise fixing step before this segmentation step, in this fixing step, on the region corresponding with this periphery remaining area, between this bonding sheet and the surface of this wafer, arrange fixative, this periphery remaining area of this wafer is fixed on this bonding sheet.
2. the processing method of stacked wafer according to claim 1, is characterized in that,
Described bonding sheet is pressure-sensitive sheet,
Described fixative is made up of ultraviolet hardening resin,
In described fixing step, on the region corresponding with this periphery remaining area, between this bonding sheet and the surface of this wafer, being a wire has arranged after this fixative,, thus this periphery remaining area of this wafer is fixed on this bonding sheet this fixative irradiation ultraviolet radiation across this bonding sheet.
CN201410058232.2A 2013-02-25 2014-02-20 The processing method of stacked wafers Active CN104009002B (en)

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JP2013034791A JP6021687B2 (en) 2013-02-25 2013-02-25 Laminated wafer processing method
JP2013-034791 2013-02-25

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6190671B2 (en) * 2013-09-05 2017-08-30 古河電気工業株式会社 Dicing adhesive tape and method for manufacturing semiconductor device
JP2016127099A (en) * 2014-12-26 2016-07-11 株式会社ディスコ Extension method
JP7286245B2 (en) * 2019-06-07 2023-06-05 株式会社ディスコ Wafer processing method
JP7286247B2 (en) * 2019-06-07 2023-06-05 株式会社ディスコ Wafer processing method

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1677623A (en) * 2004-04-01 2005-10-05 株式会社迪思科 Wafer processing method
CN1787195A (en) * 2004-12-06 2006-06-14 松下电器产业株式会社 Photocurable-resin application method and bonding method
CN1816899A (en) * 2003-07-08 2006-08-09 琳得科株式会社 Hardenable pressure sensitive adhesive sheet for dicing/die-bonding and method for manufacturing semiconductor device
CN101002315A (en) * 2004-08-02 2007-07-18 松下电器产业株式会社 Manufacturing method for semiconductor devices, and formation apparatus for semiconductor wafer dicing masks
CN101379606A (en) * 2007-01-31 2009-03-04 信越工程株式会社 Apparatus for bonding chuck
CN101447411A (en) * 2007-11-27 2009-06-03 株式会社迪思科 Method for disconnecting adhesive bonding film with backmounted wafer and adhesive bonding film
CN102575139A (en) * 2009-10-19 2012-07-11 东丽株式会社 Photosensitive adhesive composition, photosensitive adhesive sheet, and semiconductor devices using same
CN102629594A (en) * 2011-02-04 2012-08-08 株式会社东芝 Semiconductor device and method for manufacturing the same
JP2013021110A (en) * 2011-07-11 2013-01-31 Disco Abrasive Syst Ltd Method for processing disk-like workpiece

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101215728B1 (en) * 2003-06-06 2012-12-26 히다치 가세고교 가부시끼가이샤 Semiconductor device producing method
JP2008130706A (en) * 2006-11-20 2008-06-05 Sony Corp Method of manufacturing semiconductor device
TWI377614B (en) * 2008-04-07 2012-11-21 Powertech Technology Inc Method for forming adhesive dies singulated from a wafer
JP2010219086A (en) * 2009-03-13 2010-09-30 Furukawa Electric Co Ltd:The Wafer processing film and method for manufacturing semiconductor device using wafer processing film
JP2011187479A (en) * 2010-03-04 2011-09-22 Disco Corp Wafer processing method
JP2011222588A (en) * 2010-04-05 2011-11-04 Shin Etsu Polymer Co Ltd Method for handling semiconductor wafer
JP2011258625A (en) * 2010-06-07 2011-12-22 Shin Etsu Polymer Co Ltd Method for handling semiconductor wafer
JP5633214B2 (en) * 2010-07-05 2014-12-03 住友ベークライト株式会社 Manufacturing method of semiconductor device, semiconductor device using the same, manufacturing method of electric and electronic components, and electric and electronic components using the same
JP5748198B2 (en) * 2010-12-20 2015-07-15 株式会社ディスコ Manufacturing method of laminated device and laminated device
JP5943544B2 (en) * 2010-12-20 2016-07-05 株式会社ディスコ Manufacturing method of laminated device and laminated device

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1816899A (en) * 2003-07-08 2006-08-09 琳得科株式会社 Hardenable pressure sensitive adhesive sheet for dicing/die-bonding and method for manufacturing semiconductor device
CN1677623A (en) * 2004-04-01 2005-10-05 株式会社迪思科 Wafer processing method
CN101002315A (en) * 2004-08-02 2007-07-18 松下电器产业株式会社 Manufacturing method for semiconductor devices, and formation apparatus for semiconductor wafer dicing masks
CN1787195A (en) * 2004-12-06 2006-06-14 松下电器产业株式会社 Photocurable-resin application method and bonding method
CN101379606A (en) * 2007-01-31 2009-03-04 信越工程株式会社 Apparatus for bonding chuck
CN101447411A (en) * 2007-11-27 2009-06-03 株式会社迪思科 Method for disconnecting adhesive bonding film with backmounted wafer and adhesive bonding film
CN102575139A (en) * 2009-10-19 2012-07-11 东丽株式会社 Photosensitive adhesive composition, photosensitive adhesive sheet, and semiconductor devices using same
CN102629594A (en) * 2011-02-04 2012-08-08 株式会社东芝 Semiconductor device and method for manufacturing the same
JP2013021110A (en) * 2011-07-11 2013-01-31 Disco Abrasive Syst Ltd Method for processing disk-like workpiece

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TWI614798B (en) 2018-02-11
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CN104009002B (en) 2018-07-31
JP2014165325A (en) 2014-09-08

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