CN104009002B - The processing method of stacked wafers - Google Patents
The processing method of stacked wafers Download PDFInfo
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- CN104009002B CN104009002B CN201410058232.2A CN201410058232A CN104009002B CN 104009002 B CN104009002 B CN 104009002B CN 201410058232 A CN201410058232 A CN 201410058232A CN 104009002 B CN104009002 B CN 104009002B
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- 235000012431 wafers Nutrition 0.000 title claims abstract description 59
- 238000003672 processing method Methods 0.000 title claims abstract description 15
- 230000011218 segmentation Effects 0.000 claims abstract description 53
- 239000000834 fixative Substances 0.000 claims abstract description 40
- 238000004026 adhesive bonding Methods 0.000 claims description 17
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 58
- 230000004048 modification Effects 0.000 description 12
- 238000012986 modification Methods 0.000 description 12
- 238000000034 method Methods 0.000 description 11
- 239000003795 chemical substances by application Substances 0.000 description 4
- 238000009434 installation Methods 0.000 description 4
- 230000014759 maintenance of location Effects 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 2
- 229920000915 polyvinyl chloride Polymers 0.000 description 2
- 239000004800 polyvinyl chloride Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- LLLVZDVNHNWSDS-UHFFFAOYSA-N 4-methylidene-3,5-dioxabicyclo[5.2.2]undeca-1(9),7,10-triene-2,6-dione Chemical compound C1(C2=CC=C(C(=O)OC(=C)O1)C=C2)=O LLLVZDVNHNWSDS-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N Acrylic acid Chemical class OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000007767 bonding agent Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- ZZUFCTLCJUWOSV-UHFFFAOYSA-N furosemide Chemical compound C1=C(Cl)C(S(=O)(=O)N)=CC(C(O)=O)=C1NCC1=CC=CO1 ZZUFCTLCJUWOSV-UHFFFAOYSA-N 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/38—Removing material by boring or cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Mechanical Engineering (AREA)
- Optics & Photonics (AREA)
- Dicing (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The processing method that the present invention provides stacked wafers, in the state of being pasted onto chip side on bonding sheet in the stacked wafers of chip for being laminated on chip, can also divide the wafer into each chip.The processing method of the stacked wafers is characterized in that thering is following fixing step at least before implementing segmentation step：On region corresponding with periphery remaining area, fixative is arranged between bonding sheet and the surface of chip, the periphery remaining area of chip is fixed on bonding sheet.
Description
Technical field
The present invention relates to the processing methods for the stacked wafers that multiple chips are equipped on chip.
Background technology
In the past, it was integrated into one of the method in an encapsulation as by multiple semiconductor devices, three-dimensional installation is known.
Three-dimensional installation is the method that multiple semiconductor device chips are laminated and are installed on three-dimensional, is carried out in three-dimensional
There are CoW (Chip on wafer in one of technology of stacking：Chip on chip) mode is (for example, referring to patent document 1.).
In such three-dimensional installation, the stacked wafers that chip is laminated on chip are formd, by the way that the stacking is brilliant
Piece is divided into each chip, forms the stacked die for the state that chip is laminated on chip.
As the method for segmentation stacked wafers, as disclosed in Patent Document 2, it is known to by with bite
The method that cutting apparatus is cut.
In addition, other methods as segmentation stacked wafers, as disclosed in Patent Document 3, it is known to shine
It penetrates laser beam and forms after modification layer the method that external force is applied to chip to be split.It is split as external force is applied
Method, such as the dividing method using extension fixture disclosed in known patent document 4.
【Patent document 1】Japanese Unexamined Patent Publication 2012-209522 bulletins
【Patent document 2】Japanese Unexamined Patent Publication 2007-214201 bulletins
【Patent document 3】Japanese Patent No. 3408805
【Patent document 4】Japanese Unexamined Patent Publication 2010-034250 bulletins
A mode as stacked wafers, it is known that the stacked die on the intermediary layer (intermediary's layer wafer) of wafer-like and obtain
The stacked wafers arrived.For the stacked wafers of such mode, in order to implement the characteristic check of the convex block formed on the interposer,
It needs after being divided into stacked die, is set as supporting chip on bonding sheet in such a way that divided intermediary layer side becomes upside
The state of side.
In order to realize that the chip side of stacked wafers is being pasted onto on bonding sheet and is making the intermediary of wafer-like by the state, consideration
In the state that layer exposes from upside, stacked wafers are split.
But chip is not arranged on the periphery remaining area of the intermediary layer of wafer-like, intermediary layer can not be made by chip
It is pasted onto on bonding sheet.
Therefore, as it is disclosed Patent Document 4, using extension fixture expand bonding sheet and to the intermediary layer of wafer-like apply
It, can not be to core be arranged since periphery remaining area is not fixed on by stickup on bonding sheet in the dividing method of external force
Boundary part between the region and periphery remaining area of piece applies external force, what generation can not be split on the boundary part
Problem.
Not only for using the stacked wafers of the intermediary layer of wafer-like to there are problems that this, in the device for being formed with device
Stacked wafers obtained from chip have been laminated on chip and similarly there are problems that this.
Invention content
The present invention exactly puts and completes in view of the above problems, and its purpose is to provide a kind of processing sides of stacked wafers
Method in the state of for being pasted onto the chip side for being laminated with the stacked wafers of chip on chip on bonding sheet, can also incite somebody to action
Chip is divided into each chip.
According to the invention of the 1st aspect, a kind of processing method of stacked wafers is provided, which has chip and core
Piece, the chip are layered in respectively on each region made of being divided by multiple segmentation preset lines for intersecting of the surface of chip, the layer
Folded chip has the chip area for being laminated with multiple chips and the periphery remaining area around chip area, in chip area and outside
Be formed with scale between all remaining areas, the processing method of the stacked wafers be characterized in that include：Bonding sheet gluing steps,
The chip side of stacked wafers pastes bonding sheet；Divide starting point forming step, before or after implementing bonding sheet gluing steps,
The segmentation starting point of the segmentation preset lines along stacked wafers is formed on chip；And segmentation step, it is pasted implementing bonding sheet
After step and segmentation starting point forming step, so that bonding sheet is expanded and external force applied to stacked wafers, divides chip from segmentation starting point,
There is fixing step at least before implementing segmentation step, in the fixing step, in region corresponding with periphery remaining area
On, fixative is arranged between bonding sheet and the surface of chip, is fixed the periphery remaining area of chip by means of the fixative
On bonding sheet, external force is also delivered to the periphery remaining area and radially working tension as a result,.
According to the invention of the 2nd aspect, the processing method for providing the stacked wafers described in the 1st aspect, which is characterized in that bonding
Piece is pressure-sensitive piece, and fixative is made of ultraviolet hardening resin, in fixing step, in region corresponding with periphery remaining area
On, after fixative linearly has been arranged in point between bonding sheet and the surface of chip, fixative is irradiated across bonding sheet purple
Thus the periphery remaining area of chip is fixed on bonding sheet by outside line.
According to the present invention, the processing method for providing stacked wafers is laminated on chip in the stacked wafers of chip, is being incited somebody to action
In the state that chip side is pasted onto on bonding sheet, each chip can be also divided the wafer into.
Specifically, at least implementing fixing step below before so that bonding sheet is expanded：With periphery remaining area pair
In the region answered, fixative is arranged between bonding sheet and the surface of chip, the periphery remaining area of chip is fixed on bonding
On piece.
The position of the periphery remaining area of chip can be also fixed on by fixative on bonding sheet as a result, and external force is passed
It is delivered to periphery remaining area 16 and radially working tension, can be formed between chip area and periphery remaining area
Boundary part segmentation starting point on so that chip is broken.
Description of the drawings
Fig. 1 is the stereogram for the structure for showing stacked wafers.
Fig. 2 is the stereogram for showing bonding sheet gluing steps.
Fig. 3 is the side view for showing bonding sheet gluing steps.
Fig. 4 is the sectional view for the stacked wafers for showing to paste on bonding sheet.
Fig. 5 is the side view for showing segmentation starting point forming step.
Fig. 6 is the fixed sectional view for showing the periphery remaining area based on fixative.
(A) of Fig. 7 is the stereogram for the configuration for illustrating gelatinous fixative, and (B) is the fixative for illustrating to be hardened
The stereogram of configuration.
Fig. 8 is the sectional view of the state before the segmentation shown in segmentation step.
Fig. 9 is the sectional view of the state after the segmentation shown in segmentation step.
Figure 10 is the sectional view for showing the example for using ultraviolet hardening resin as fixative.
Label declaration
1：Stacked wafers
11a：Surface
12：Chip
13：Divide preset lines
14：Chip area
16：Periphery remaining area
17：Modify layer
18：Bonding sheet
19：Boundary part
40：Fixative
Specific implementation mode
Hereinafter, the embodiment that present invention will be described in detail with reference to the accompanying.Fig. 1 is the processing object for being shown as the present invention
The stereogram of the stacked wafers 1 of an example.
Stacked wafers 1 are configured to, on the surface 11a of intermediary layer 11 for being configured to the discoid chip of thin plate transverse and longitudinal arrange
The mode of multiple chips 12,12 is arranged, is arranged in defined position.
Regulation segmentation preset lines 13,13, make a reservation for along the segmentation preset lines in region between adjacent chip 12,12
13, it 13 is split.
On the surface 11a of intermediary layer 11, the region that chip 12 is arranged is set as chip area 14, chip area 14 it is outer
The position in week is set as periphery remaining area 16.
Chip area 14 is configured to be higher by the thickness of chip 12 than periphery remaining area 16, therefore, chip area 14 with
The boundary part of periphery remaining area 16 forms scale 15.Due to the presence of the scale 15, by the chip area of stacked wafers 1
In the case that 14 are pasted onto bonding sheet 18 (Fig. 2), periphery remaining area 16 floats from bonding sheet 18.
It therefore, will not be outer to what is floated from bonding sheet 18 even if in expansion bonding sheet 18 come in the case of being split
All remaining areas 16 apply external force, to carry out the segmentation between chip area 14 and periphery remaining area 16.
Therefore, in the present embodiment, the segmentation of stacked wafers 1 is carried out by the following method.First, such as Fig. 2 and Fig. 3 institutes
Show, implements and paste the bonding sheet gluing steps of bonding sheet 18 in 12 side of chip of stacked wafers 1.
As shown in Figures 2 and 3, in stacked wafers 1, using the back side 11b of intermediary layer 11 as upside, make 12 (core of chip
Panel region 14) it is opposite with the adhesive layer 18a of bonding sheet 18, chip 12 is pasted onto on adhesive layer 18a.
Here, the base material 18b (Fig. 3) of bonding sheet 18 for example can be by PO (polyolefin), PVC (polyvinyl chloride), (poly- couple of PE
Ethylene terephthalate) etc. compositions.In addition, adhesive layer 18a (paste layer) can be made of the resin of rubber series or acrylic acid series.
In addition, the ring-shaped frame 20 of the opening portion 20a with the size around stacked wafers 1 is pasted onto bonding sheet 18
On.
Then, as shown in figure 4, appropriate cut-out bonding sheet 18, so that it takes in the periphery of ring-shaped frame 20, structure as a result,
At the wafer cell 22 being fixed on stacked wafers 1 across bonding sheet 18 on ring-shaped frame 20.
Then, as shown in figure 5, before or after implementing bonding sheet gluing steps, implement segmentation starting point forming step,
In the segmentation starting point forming step, the segmentation starting point of the segmentation preset lines 13 along stacked wafers 1 is formed in intermediary layer 11.
In the present embodiment, as shown in figure 5, after implementing bonding sheet gluing steps, pass through laser beam irradiation unit 30
Modification layer is formed in intermediary layer 11, and segmentation starting point is consequently formed.
In the example of Fig. 5, ring-shaped frame 20 is kept by fixture 32, in holding station 34, attracts across bonding sheet 18 and protects
Hold stacked wafers 1.
Then, holding station 34 is processed to feeding on the directions arrow X1, and from laser beam irradiation unit 30 to intermediary layer 11
Laser beam is irradiated, as a result, as shown in fig. 6, forming modification layer 17 in intermediary layer 11 along segmentation preset lines 13.
In addition, in addition to as in the present embodiment, irradiate to be formed other than segmentation starting point (modification layer 17) by laser beam,
Laser processing groove can be formed by Laser ablation, or cutting is formed by the cutting apparatus of the bite with rotation
Slot, to constitute segmentation starting point.
In addition it is also possible to be before implementing bonding sheet gluing steps, to implement segmentation starting point forming step in advance, in advance
Modification layer 17 is formed, then, as shown in figure 3, the stacked wafers 1 for foring modification layer are pasted onto on bonding sheet 18.
Then, other than each step described above, also implement fixing step below：With periphery remaining area 16
In corresponding region, fixative 40 (Fig. 4) is arranged between bonding sheet 18 and the surface 11a of intermediary layer 11, by intermediary layer 11
Periphery remaining area 16 is fixed on bonding sheet 18.
Implement the fixing step before implementing aftermentioned segmentation step, is predefined in any one in above steps
Implement before or after a step.
Shown in Fig. 6 the surface 11a in intermediary layer 11 fixative 40 is arranged, by fixative 40 by the periphery of intermediary layer 11
Remaining area 16 pastes the state of bonding sheet 18.
The fixative 40 can for example use gelatinous bonding agent, consider with around the periphery of intermediary layer 11 (along side)
Mode outpours fixative 40, thus provides fixation to the gap S between the periphery remaining area 16 of intermediary layer 11 and bonding sheet 18
Agent 40.
In addition, for example, consolidating as shown in Figure 1, this can be carried out in the state of so that the surface 11a of intermediary layer 11 is exposed upward
Determine the arranging of agent 40, that is, can be implemented before bonding sheet gluing steps.As a result, simultaneously with bonding sheet gluing steps
Implement fixing step.
Alternatively, as shown in figure 4, can be carried out in the state that the surface 11a of intermediary layer 11 is pasted onto on bonding sheet 18,
That is, can be implemented after bonding sheet gluing steps.Alternatively, as shown in figure 5, the formation such as can irradiate by laser beam
It is carried out after segmentation starting point, that is, can be implemented after dividing starting point forming step.
Moreover, the arranging about fixative 40, is automatically provided except through the apparatus for coating for being coated with fixative 40
In addition, it can also be carried out by operator manual working.In addition, continuously providing fixative in addition to (A) of such as Fig. 7 is shown
40, other than the periphery (along side) of intermediary layer 11, fixative 41 can also be intermittently provided as shown in (B) of Fig. 7, will be consolidated
Determine agent 41 and is configured to a threadiness.
Fixative 40 need not rest in the gap S (Fig. 6) between intermediary layer 11 and bonding sheet 18, can also be in
Thus the outer peripheral edge of interlayer 11 or back side 11b use fixative 40 to cover back side 11b.
Then, as shown in Figure 8 and Figure 9, implement following segmentation step：Bonding sheet 18 is set to expand and be applied to stacked wafers 1
Add external force, from segmentation starting point (modification layer 17) segmentation intermediary layer 11.
Segmenting device 50 is used in the present embodiment, which, which has, is maintained at the layer pasted on bonding sheet 18
The holding station 51 of folded chip 1 and the frame retention feature 56 for keeping ring-shaped frame 20.
Frame retention feature 56 drops to expansion shown in Fig. 9 by the driving of cylinder 55 from holding position shown in Fig. 8
Tension position makes holding station 51 and frame retention feature 56 relatively move in the vertical direction.
At this point, the ring-shaped frame 20 kept on the mounting surface 56a of frame retention feature 56 declines, on ring-shaped frame 20
The bonding sheet 18 of installation is abutted with the upper edge of holding station 51, is mainly expanded in the radial direction.
As a result, external force is passed to the intermediary layer 11 being pasted onto on bonding sheet 18, and radially working tension,
When pulling force centering interlayer 11 radially acts on, due to the modification layer 17 formed along segmentation preset lines 13 (referring to Fig.1)
Strength reduction, therefore, the modification layer 17 become segmentation basic point, and intermediary layer 11 is broken along modification layer 17, is divided into each
Chip 1A, 1A.
Moreover, in the segmentation step, due to intermediary layer 11 periphery remaining area 16 position also by fixative 40
It is fixed on bonding sheet 18, therefore, external force also is communicated to periphery remaining area 16, and pulling force is radially acted on,
In the modification layer 17 formed on boundary part 19 between chip area 14 and periphery remaining area 16, intermediary layer 11 is made to be broken.
As described above, the present invention can be implemented.
That is, the processing method for providing a kind of stacked wafers 1, which has chip 12 and the intermediary as chip
Layer 11, the chip 12 are layered in each area made of being divided by multiple segmentation preset lines 13 for intersecting of the surface of intermediary layer 11 respectively
On domain, which has the chip area 14 for being laminated with multiple chips 12 and the periphery remaining area around chip area 14
Domain 16, is formed with scale 15 between chip area 14 and periphery remaining area 16, and the processing method of the stacked wafers 1 includes：
Bonding sheet gluing steps paste bonding sheet 18 in 12 side of chip of stacked wafers 1；Divide starting point forming step, is implementing to bond
Before or after piece gluing steps, the segmentation starting point of the segmentation preset lines 13 along stacked wafers 1 is formed on intermediary layer 11；With
And segmentation step, implement bonding sheet gluing steps and segmentation starting point forming step after, make bonding sheet 18 expand and to stacking
Chip 1 applies external force, divides intermediary layer 11 from segmentation starting point, has following fixed step at least before implementing segmentation step
Suddenly：On region corresponding with periphery remaining area 16, fixative is arranged between bonding sheet 18 and the surface 11a of intermediary layer 11
40, the periphery remaining area 16 of intermediary layer 11 is fixed on bonding sheet 18.
According to the processing method, due to the intermediary layer 11 as chip periphery remaining area 16 position also by fixation
Agent 40 is fixed on bonding sheet 18, and therefore, external force also is communicated to periphery remaining area 16, and pulling force is radially made
With in the modification layer 17 formed on boundary part 19 that can be between chip area 14 and periphery remaining area 16, making intermediary
Layer 11 is broken.
In addition, in the above embodiment, illustrate the example for the stacked wafers 1 for using intermediary layer 11 as chip,
But it can also apply the present invention for the stacked wafers that chip has been laminated on the device wafer for be formed with device.
In addition it is also possible to be, the embodiment as shown in (B) of Fig. 7, bonding sheet 18 is glued by crimping
The pressure-sensitive piece of patch, fixative 41 is made of ultraviolet hardening resin, in fixing step, corresponding with periphery remaining area 16
On region, after fixative 41 is arranged to a threadiness between bonding sheet 18 and the surface 11a of intermediary layer 11, as shown in Figure 10,
By irradiating ultraviolet light 42 to fixative 41 across bonding sheet 18, the periphery remaining area 16 of intermediary layer 11 is fixed on bonding sheet
On 18.
The embodiment is particularly suitable for the fixative 41 using ultraviolet hardening resin as the type hardened
The embodiment of situation.This is because if not being arranged to dotted line shape, i.e., if interval does not configure intermittently, due to
Fixative hardens, the expansion of the bonding sheet 18 when can hinder segmentation step.
In embodiment shown in Fig. 10, ultraviolet light is come to the irradiation of fixative 41 by the back side from bonding sheet 18
The ultraviolet light 42 of irradiation unit 44 makes fixative 41 harden.
Since the fixative 41 is configured to a threadiness in the periphery remaining area 16 of intermediary layer 11, so, it is spreading
Fixative 41 between form space part 43 ((B) of Fig. 7), therefore the expansion of bonding sheet 18 can be allowed in the space part 43
, the whole region of centering interlayer 11 transmits external force, and radial pulling force is made to be acted on.
Claims (2)
1. the processing method of stacked wafers, which there is chip and chip, the chip to be layered in the table of the chip respectively
On each region made of being divided by multiple segmentation preset lines for intersecting of face, which, which has, is laminated with multiple chips
Chip area and periphery remaining area around the chip area, are formed between the chip area and the periphery remaining area
Scale,
The processing method of the stacked wafers is characterized in that：
Bonding sheet gluing steps paste bonding sheet in the chip side of stacked wafers；
Segmentation starting point forming step is formed on this wafer before or after implementing bonding sheet gluing steps along the stacking
The segmentation starting point of the segmentation preset lines of chip；And
Segmentation step, after implementing the bonding sheet gluing steps and the segmentation starting point forming step, make the bonding sheet expand and
External force is applied to the stacked wafers, is lighted from the segmentation and divides the chip,
At least before implementing the segmentation step include fixing step, in the fixing step, with the periphery remaining area pair
On the region answered, fixative is arranged between the bonding sheet and the surface of the chip, by means of the fixative being somebody's turn to do the chip
Periphery remaining area is fixed on the bonding sheet, and external force is also delivered to the periphery remaining area and radially makees as a result,
Use pulling force.
2. the processing method of stacked wafers according to claim 1, which is characterized in that
The bonding sheet is pressure-sensitive piece,
The fixative is made of ultraviolet hardening resin,
In the fixing step, on region corresponding with the periphery remaining area, on the surface of the bonding sheet and the chip
Between in point the fixative has linearly been arranged after, across the bonding sheet to the fixative irradiate ultraviolet light, thus by the crystalline substance
The periphery remaining area of piece is fixed on the bonding sheet.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013034791A JP6021687B2 (en) | 2013-02-25 | 2013-02-25 | Laminated wafer processing method |
| JP2013-034791 | 2013-02-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104009002A CN104009002A (en) | 2014-08-27 |
| CN104009002B true CN104009002B (en) | 2018-07-31 |
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|---|---|---|---|
| CN201410058232.2A Active CN104009002B (en) | 2013-02-25 | 2014-02-20 | The processing method of stacked wafers |
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| Country | Link |
|---|---|
| JP (1) | JP6021687B2 (en) |
| CN (1) | CN104009002B (en) |
| TW (1) | TWI614798B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP6190671B2 (en) * | 2013-09-05 | 2017-08-30 | 古河電気工業株式会社 | Dicing adhesive tape and method for manufacturing semiconductor device |
| JP2016127099A (en) * | 2014-12-26 | 2016-07-11 | 株式会社ディスコ | Extension method |
| JP7286245B2 (en) * | 2019-06-07 | 2023-06-05 | 株式会社ディスコ | Wafer processing method |
| JP7286247B2 (en) * | 2019-06-07 | 2023-06-05 | 株式会社ディスコ | Wafer processing method |
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| TW201438084A (en) | 2014-10-01 |
| CN104009002A (en) | 2014-08-27 |
| JP2014165325A (en) | 2014-09-08 |
| JP6021687B2 (en) | 2016-11-09 |
| TWI614798B (en) | 2018-02-11 |
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