CN103872211B - 发光器件封装 - Google Patents

发光器件封装 Download PDF

Info

Publication number
CN103872211B
CN103872211B CN201310688975.3A CN201310688975A CN103872211B CN 103872211 B CN103872211 B CN 103872211B CN 201310688975 A CN201310688975 A CN 201310688975A CN 103872211 B CN103872211 B CN 103872211B
Authority
CN
China
Prior art keywords
light emitting
emitting device
device package
packaging body
package according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201310688975.3A
Other languages
English (en)
Other versions
CN103872211A (zh
Inventor
金炳穆
鲁永珍
姜宝姬
小平洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Lekin Semiconductor Co Ltd
Original Assignee
LG Innotek Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Innotek Co Ltd filed Critical LG Innotek Co Ltd
Publication of CN103872211A publication Critical patent/CN103872211A/zh
Application granted granted Critical
Publication of CN103872211B publication Critical patent/CN103872211B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48235Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48455Details of wedge bonds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • H01L2224/48996Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/48997Reinforcing structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/85951Forming additional members, e.g. for reinforcing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12035Zener diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15174Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15182Fan-in arrangement of the internal vias
    • H01L2924/15183Fan-in arrangement of the internal vias in a single layer of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Wire Bonding (AREA)

Abstract

本申请公开了一种发光器件封装,其包括:封装体,包括布置在所述封装体的表面上的至少一个电极垫;发光器件,布置在所述封装体上,所述发光器件经由引线而被电连接至所述电极垫;以及通孔电极,穿过所述封装体,其中,所述引线在所述发光器件和所述电极垫的至少一个上形成针脚,所述发光器件封装还包括布置在所述针脚上的焊球,且通孔电极在垂直方向上不与针脚和焊球重叠。

Description

发光器件封装
相关申请的交叉援引
本申请要求2012年12月14日在韩国递交的韩国专利申请号10-2012-0146331的优先权,其通过援引整体合并于此,如同完全在此提出一样。
技术领域
实施例涉及一种发光器件封装。
背景技术
使用III-V或II-VI族化合物半导体材料的诸如发光二极管或激光二极管之类的发光器件基于薄膜生长技术和器件材料的发展实现具有诸如红色、绿色和紫外光之类的各种颜色的光,通过使用磷光材料或者组合两种或更多种颜色来实现白光,且与诸如荧光灯和白炽灯之类的常规光源相比,具有诸如低功耗、安全且环保等的优点。
因而,这种发光器件的应用范围已延伸到光学通信系统的传输模块,发光二极管作为构成显示设备(例如液晶显示器(LCD))背光的冷阴极荧光灯(CCFL)的代替物,以及白光发光二极管照明设备作为荧光灯或白炽灯、车辆用头灯和交通灯的代替物。
发光器件封装具有如下构造:第一电极和第二电极布置于封装体内,且发光器件布置在封装体的底部上且电连接至第一电极和第二电极。
图1是示出常规发光器件封装的剖视图。
发光器件封装100包括形成腔体结构的封装体110a、110b或110c,以及布置在腔体的底部上的发光器件140。在封装体110a、110b或110c的下部中可以布置散热部130,且散热部130和发光器件140可以经由导电粘合层而被固定。
布置于腔体内的模具部150保护发光器件140且同时包围发光器件140。模具部150可以包括磷光体160。从发光器件140发出的第一波长区域的光可以激发磷光体160,而第二波长区域的光可以从磷光体160发出。
图2详细示出图1的区域A1或A2
引线145可以接触区域A1中的发光器件140并接触区域A2中的电极垫(electrodepad)70。引线145以细长方式垂下,以形成由图2A中的S1表示的区域以及由图2B中的S2表示的区域中的针脚形状。
如图2A所示,引线145接触电极垫70以形成针脚(stitch),以及如图2B所示,引线145接触设于封装体110b中的通孔电极80以形成针脚。
尽管图2A和图2B示出图1的区域A2的实施例,但引线145可以接触设于图1的区域A1中的发光器件140上的电极垫或通孔型电极。
但是,该常规发光器件封装具有如下问题。
在如图2B所示键合的引线的情况下,通孔电极80的表面的一部分可能下陷,从而引线的针脚可能不完全键合至通孔电极。
发明内容
本申请实施例提供一种确保引线结合的稳定性和可靠性的发光器件封装。
在一个实施例中,发光器件封装包括:封装体,包括布置在所述封装体的表面上的至少一个电极垫;发光器件,布置在所述封装体上,所述发光器件经由引线而被电连接至所述电极垫;以及通孔电极,穿过所述封装体,其中,所述引线在所述发光器件和所述电极垫的至少一个上形成针脚,所述发光器件封装还包括布置在所述针脚上的焊球,且所述通孔电极在垂直方向上不与所述针脚和所述焊球重叠
所述引线的直径可以为1/40至1.5/40毫米。
所述焊球可以包括:接触针脚的主体;以及布置于所述主体上的尾部。
所述针脚的线宽可以为0.3至0.35毫米。
从所述发光器件到所述通孔电极的距离可以小于从所述发光器件到所述电极垫的距离。
所述发光器件封装还可以包括所述封装体的壁部,且所述封装体可以包括至少两个陶瓷层。
所述通孔电极可以布置在所述陶瓷层的至少一个中。
所述通孔电极可以电连接至所述电极垫,且所述发光器件可以经由所述引线连接至所述电极垫。
所述通孔电极可以与所述封装体的端部相邻。
所述通孔电极可以形成在所述封装体的边缘的至少一个部分上。
所述引线的直径与所述电极垫的最小宽度之比可以为1:2至1:3。
所述通孔电极可以包括:框架,布置在所述通孔电极的周边上;以及位于框架下方的导电层和陶瓷层。
附图说明
可以参考附图详细描述布置和实施例,在附图中类似的附图标记表示类似的元件,其中:
图1是示出常规发光器件发封装的剖视图;
图2详细示出图1的区域A1或A2
图3是示出根据实施例的发光器件封装的剖视图;
图4A示出图3的区域B1或B2
图4B详细示出图4A的区域S的实施例;以及
图4C详细示出图4A的区域S的另一实施例;
图5是示出图3所示的发光器件封装的电极结构的示图;
图6是示出根据实施例包括发光器件封装的头灯的剖视图;以及
图7是示出根据实施例包括发光器件封装的图像显示设备的剖视图。
具体实施方式
以下将参考所附附图描述实施例。
将理解的是,当一元件被提到在另一元件“上”或“下方”时,其可以直接位于该元件上/下方,也可以存在一个或更多个中间元件。当元件被提到在“上”或“下方”时,基于该元件可以包括“在元件下方”以及“在元件上”。
图3是示出根据实施例的发光器件封装的剖视图。
根据本实施例的发光器件封装200包括具有多个第一陶瓷层210a、210b、210c和210d的封装体。该封装体可以使用高温共烧陶瓷(HTCC)法或低温共烧陶瓷(LTCC)法来实现。
当封装体是多层陶瓷基板时,各个层的厚度可以相同或者不同。封装体可以由氮化物或氧化物绝缘材料形成,且其实例包括SiO2、SixOy、Si3Ny、SiOxNy、Al2O3和AlN。
第一陶瓷层210a、210b、210c和210d的宽度可以不同,且一些第一陶瓷层210a和210b可以构成发光器件封装200或腔体的底部,而其它第一陶瓷层210c和210d可以构成腔体的侧壁。
发光器件240a和240b布置在包括第一陶瓷层210a、210b、210c和210d的腔体的底部,且包括发光器件240a和240b的两个或更多个发光器件可以布置于其上。
包围发光器件240a和240b以及引线245a和245b的模具部250布置在腔体中。该模具部250可以包括硅树脂或磷光体260,且该磷光体260可以将从发光器件240a和240b发出的第一波长区域的光转换为长于第一波长区域的第二波长区域的光。例如,当第一波长区域为紫外光区域时,第二波长区域可以是可见光区域。
另外,可以通过将沉积或镀覆在模具部250上的金属共晶键合或焊接到玻璃盖或玻璃盖子,或者通过形成类似于第一陶瓷层210d和210c的阶梯结构然后将抗反射玻璃板经由粘合剂(例如UV粘合剂或热固性粘合剂)键合到阶梯状凹槽,从而执行气密封装。
发光器件包括发光二级管(LED),该发光二级管(LED)包括多个化合物半导体层,例如包含III-V族元素的多个半导体层。发光器件可以是发出诸如蓝色、绿色或红色光之类的彩色光的彩色光发光器件,或者是发出UV光的UV发光器件。
发光器件240a和240b可以是垂直发光器件或侧向发光器件,它们中的每一个均可以包括具有第一导电类型半导体层、放射层(active layer)和第二导电类型半导体层的发光结构。
第一导电类型半导体层可以由半导体化合物形成,例如III-V族或II-VI族半导体化合物。另外,第一导电类型半导体层可以掺杂有第一导电类型掺杂剂。当第一导电类型半导体层是n-型半导体层时,第一导电类型掺杂剂可以包括作为n-型掺杂剂的Si、Ge、Sn、Se或Te,但本公开文本不限于此。
第一导电类型半导体层可以单独由第一导电类型半导体层形成,或者进一步包括布置于第一导电类型半导体层下方的无掺杂半导体层,但本公开文本不限于此。
无掺杂半导体层被形成为改善第一导电类型半导体层的结晶度,并且除由于没有掺杂n-型掺杂剂而使得无掺杂半导体层的电导率低于第一导电类型半导体层的电导率以外,无掺杂半导体层可以与第一导电类型半导体层相同。
放射层可以形成于第一导电类型半导体层上。一旦如后所述经由第一导电类型半导体层注入的电子和经由第二导电类型半导体层注入的空穴复合,则放射层发出能量由放射层(发光层)材料的固有能量带确定的光。
放射层可以具有双异质结结构、单量子阱结构、多量子阱(MQW)结构、量子线结构和量子点结构中的至少一种。例如,双异质结结构可以通过注入三甲基镓气体(TMGa)、氨气(NH3)、三甲基铟(TMIn)而形成,但本公开文本不限于此。
放射层的阱层/阻挡层例如可以具有InGaN/GaN、InGaN/InGaN、GaN/AlGaN、InAlGaN/GaN、GaAs(InGaAs)/AlGaAs、GaP(InGaP)/AlGaP的至少一对结构,但本公开文本不限于此。阱层可以由间隙比阻挡层的间隙更小的材料形成。
导电包覆层(未示出)可以形成于放射层上或下方。导电包覆层可以由带隙比阻挡层的带隙更宽的半导体制成。例如,导电包覆层可以包括GaN、AlGaN、InAlGaN或超晶格结构。另外,导电包覆层可以掺杂有n-型或p-型掺杂剂。
另外,第二导电类型半导体层可以形成在放射层上。第二导电类型半导体层可以由例如掺杂有第二导电类型掺杂剂的III-V族化合物半导体之类的半导体化合物形成。第二导电类型半导体层234c例如可以是具有成分式InxAlyGa1-x-yN(0≤x≤1,0≤y≤1,0≤x+y≤1)的半导体材料。当第二导电类型半导体层是p-型半导体层时,第二导电类型掺杂剂是p-型掺杂剂,例如Mg、Zn、Ca、Sr、Ba等,但本公开文本不限于此。
这里,相反地,第一导电类型半导体层可以包括p-型半导体层,且第二导电类型半导体层可以包括n-型半导体层。此外,包括n-型或p-型半导体层的第三导电类型半导体层可以形成在第一导电类型半导体层上。因而,发光器件240a和240b可以具有n-p、p-n、n-p-n和p-n-p结结构中的至少一种。
该封装体包括由无机物质制成的第一陶瓷层210a、210b、210c和210d。由于这个原因,尽管使用包括波长大约为280nm的深UV LED或者波长为大约365到405nm的近UV LED的发光器件200,但是封装体也不会由于从发光器件200发出的UV光而变色或者变形,从而可以保持发光模块的可靠性。
在本实施例中,封装体包括具有相同厚度的四个第一陶瓷层210a、210b、210c和210d,但封装体也可以包括更多的第一陶瓷层,且各个第一陶瓷层可以具有不同厚度。
如图3所示,发光器件240a和240b布置在封装体的表面上。发光器件240a和240b布置在散热部230上。发光器件240a和240b经由导电粘合层286a和286b安装在第三陶瓷层220或散热构件230上。散热部230可以由具有超热导率的材料制成,特别是CuW、W或Cu。图3中示出一个散热部230,但也可以单独布置包括散热部230的两个或更多个散热部。
散热部230可以布置在第一陶瓷层210a和210b的至少一个中,且第三陶瓷层220和抗裂部270可以布置在散热部230以及第一陶瓷层210a和210b上。抗裂部270可以包括第二陶瓷层。包括了布置在第一陶瓷层210a和210b上的第三陶瓷层220和抗裂部270的构造可以被称为“封装体”。在这种情况下,第一陶瓷层210a和210b可以构成壁部。
另外,抗裂部270在其一部分或者其中央区域处设置有开口。第三陶瓷层220经由该开口露出,且发光器件240a和240b布置在第三陶瓷层220的露出区域的一部分中,因而使得发光器件240a和240b能经由第三陶瓷层220热接触散热部230。
第一陶瓷层210c和210d构成腔体的侧壁,且下面将描述发光器件封装100中发光器件240a和240b的电连接。
多个第一电极图案281a至284a以及多个第二电极图案281b至284b布置在第一陶瓷层210a和210b、第三陶瓷层220和抗裂部270上,且连接电极291a至293a以及291b至293b布置在各第一电极图案281a至284a与各第二电极图案281b至284b之间。以下将详细描述这一配置。
散热部230布置在第一陶瓷层210a和210b内部,第一电极垫285a和第二电极垫285b布置在抗裂部270内,且发光器件240a和240b可以分别经由引线245a和245b键合到第一电极垫285a和第二电极垫285b。经由引线的键合表示电连接,且下文同样适用。另外,第一电极垫285a和第二电极垫285b可以分别经由连接电极294a和294b电连接到第一电极图案284a和第二电极图案284b。
连接电极291a至294a以及291b和294b通过在第一陶瓷层210a和210b、第三陶瓷层220和抗裂部270中形成通孔并用导电材料填充该通孔而形成,也被称为“通孔电极”,且通孔电极分别形成在陶瓷层中,即,分别形成在第一陶瓷层210a和210b、第三陶瓷层220和抗裂部270中。
如图3所示,散热层230和电极图案281a和281b可以在第一陶瓷层210a下方露出,且可以直接电接触电路基板,并且散热层230可以用作电极图案。
另外,从发光器件到通孔电极的距离小于从发光器件到电极垫的距离。
图4A示出图3的区域B1或B2,图4B详细示出图4A的区域S的实施例,且图4C详细示出图4A的区域S的另一实施例。
以下,将参考图4A至图4C详细描述发光器件封装的引线的键合结构。
如图4A所示,引线245a键合到电极垫285a,引线245a在电极垫285a上形成针脚(stitch),且在针脚上布置焊球255(bonding ball)以形成BBOS(针脚上球焊)结构。焊球255可以包括接触针脚的主体255a和接触主体255a的上表面且尺寸小于主体255a的尾部255b。
这种结构可被应用到引线245a接触电极垫285a的区域B1,以及引线245a接触发光器件240a和240b的区域B2
如图4B所示,引线245a的直径r1可以为1至1.5密耳(mil)。当直径过小时,引线245可能破损或损坏,而当直径过大时,引线245可能阻挡或者吸收光。这里,1密耳对应于大约1/40毫米。引线245a中由S表示的区域可以是针脚。该针脚可以在键合引线245a期间切割引线245a时形成,且可以具有0.3至0.35毫米的线宽r2。限定针脚中的线宽r2而非直径的原因在于:当切割引线245a的端部时,针脚区域会被部分按压从而形成圆形,而非椭圆形,且线宽r2可以表示针脚的纵向直径。
在图4C所示的实施例中,引线245a直接连接到作为形成于陶瓷层、抗裂部270中的通孔的连接电极294a。如图4C所示的实施例,引线245a经由针脚和焊球255连接到通孔294a。通孔294a可以穿过抗裂部270,且包括导电层294a1和布置在导电层294a1外侧的框架294a2
由于焊球按压针脚区域中的引线,所以通过BBOS方法键合的引线可以具有硬键合结构。另外,如图4C所示,由于针脚键合到通孔然后在其上键合焊球,因而通孔的上表面具有“下陷”或“贯通(中空)”形状,从而其平坦性可能不稳定。为此,通孔可以布置在封装的四周边缘,如图5所示。通孔可以布置为使得其在垂直方向上不与针脚和焊球重叠。
图5是示出图3所示的发光器件封装的电极结构的示图。
由于四个发光器件布置在发光器件封装中,所以可以如图5所示布置四个导电粘合层286a至286d以及第一至第四电极垫285a至285d。四个导电粘合层286a至286d可以具有相同极性,且第一至第四电极垫285a至285d具有相同极性,其中第一至第四电极垫285a至285d的极性可以不同于四个导电粘合层286a至286d的极性。
如图5所示,构成腔体的侧壁的第一陶瓷层210c和210d布置在发光器件封装的周边,且构成抗裂部270的第二陶瓷层和构成腔体底部的第三陶瓷层220在发光器件封装的中央露出。如图5所示,布置在图3中最上部的第一陶瓷层210c和210d的宽度d3最大,次上部中的抗裂部270的宽度d2窄于宽度d3,且构成腔体底部的第三陶瓷层220的宽度d1最窄。
四个导电粘合层286a至286d可以相对于构成腔体底部的第三陶瓷层220的正中央(dead center)与第一至第四电极垫285a至285d对称。在两个第三电极图案151与152之间可以布置齐纳二极管。
通孔电极可以布置在电极垫的外部中。如图5所示,通孔电极与封装体的端部相邻地布置,且由虚线表示的通孔电极布置在第一至第四电极垫285a至285d的外部。两个通孔电极布置在作为构成封装体的第二陶瓷层的抗裂部270的四个边缘的每个边缘上。由于通孔电极布置在外部中,所以与常规结构相比,键合有引线的第一至第四电极垫285a至285d布置在更广阔的区域中,从而充分确保了引线键合的有效面积(active area)。
在图5中,电极垫的宽度,即,第一至第四电极垫285a至285d的宽度w可以是引线直径的2到3倍(fold)。当宽度w过小时,引线的键合可能很困难,而当宽度w过大时,可能难以适当地划分发光器件封装的内部区域。
包括根据本实施例的发光器件封装的多个发光器件封装排布在基板上,且导光板、棱镜片、扩散片等类似光学构件可以布置在发光器件封装的光通道上。发光器件封装、基板和光学构件可以用作光单元。在另一实施例中,可以实施包括实施例中提及的半导体发光器件或发光器件封装的显示设备、指示器设备和照明系统。例如,照明系统可以包括灯、街灯等。以下将描述头灯(headlamp)和背光灯单元作为布置有发光器件封装的照明系统的实施例。
图6是示出根据实施例包括发光器件封装的头灯的剖视图。
在根据本实施例的头灯400中,从布置有发光器件封装的发光器件模块401发出的光被反射器402和遮光物(shade)403反射,穿过透镜404并朝向主体的前方行进。
如上所述,在用于发光器件模块401的发光器件封装中,引线可以通过利用BBOS方法键合引线而具有硬键合结构,且通过将通孔电极布置在外部中,与常规结构相比,引线所键合的电极垫可以布置在更广阔的区域中,从而充分确保了引线键合的有效面积。
图7是示出根据实施例包括发光器件封装的图像显示设备500的剖视图。
如图7所示,根据本实施例的显示设备500包括:光源模块;反射器520,布置在底盖510上;导光板540,布置在反射器520前方,并将从光源模块发出的光朝向图像显示设备的前方引导;第一棱镜片550和第二棱镜片560,布置在导光板540的前方;面板(panel)570,布置在第二棱镜片560的前方;以及滤色镜580,布置在面板570的前方。
光源模块包括布置在电路基板530上的发光器件封装535。电路基板530可以是PCB等,且发光器件封装535已如上所述在图3中描述。
底盖510可以容置图像显示设备500的构成部件。反射器520可以如图所示被设置为单独的部件,或者可以通过在导光板540的背面上或者底盖510的正面上涂布高反射材料而得以设置。
反射器520可以使用高反射超薄材料形成。这种材料的实例包括聚对苯二甲酸乙二酯(PET)。
导光板540散射从发光器件封装模块发出的光,以在液晶显示设备的整个屏幕区域上均匀地分布光。因而,导光板530由具有高折射率和高透射比的材料制成,其实例包括聚甲基丙烯酸甲酯(PMMA)、聚碳酸酯(PC)、聚乙烯(PE)等。另外,当省略导光板540时,可以实施导气型显示设备(air guide-type display device)。
第一棱镜片550使用保护膜(support film)的表面上的光导弹性聚合物形成,且聚合物可以具有重复形成有多个三维图案的棱镜层。可以以包括重复布置的脊(ridge)和沟(valley)的条带形式设置这些图案。
第二棱镜片560中的保护膜表面上的脊和沟的方向可以垂直于第一棱镜片550中的保护膜表面上脊和沟的方向。这是为了在面板570的所有方向上均匀分布从光源模块和反射片传送来的光。
在本实施例中,第一棱镜片550和第二棱镜片560构成了光学片。该光学片可以设置为另外的诸如微透镜阵列的组合、扩散片和微透镜阵列的组合或者一个棱镜片和微透镜阵列的组合。
液晶可以布置在面板570中,且除了液晶显示器之外还可以提供其他需要光源的显示设备。
面板570具有以下结构:液晶夹设在两个玻璃体之间,且偏光板安装在玻璃体上以利用光的偏振。液晶具有流体和固体的中间特性。液晶是类似于流体的易流动的有机分子,且类似于晶体规则地布置。由于所施加的电场,而使得基于液晶的分子排布的变化来显示图像。
用于显示设备的液晶显示器可以是有源矩阵型,且使用晶体管作为开关来控制供应到每个像素的电压。
滤色镜580设置在面板570的正面上,从而在每个像素中选择性地传输从面板570投射的光之中的红色、绿色或蓝色光,并显示图像。
根据上述可显而易见得知,在根据本实施例的图像显示设备中布置的发光器件封装中,由于通过BBOS方法键合引线,所以引线键合结构是硬的,且与常规发光器件封装相比,由于通孔电极布置在外部中,键合有引线的电极垫布置在更广阔的区域中,从而充分确保了引线键合的有效面积。
尽管已参考多个示例性实施例描述了实施例,但应理解的是,本领域技术人员可以设计出多种其他改型和实施例,这些将落入本公开文本的原理的构思和范围内。更具体地,可以在本公开文本、附图和所附权利要求书的范围内对主题组合排布的部件部分和/或排布进行各种改变和改型。除了对部件部分和/或排布的改变和改型之外,替换使用对于本领域技术人员而言也将是显然的。

Claims (14)

1.一种发光器件封装,包括:
封装体,包括布置在所述封装体的表面上的至少一个电极垫;
发光器件,布置在所述封装体上;以及
通孔电极,穿过所述封装体;
其中所述发光器件经由引线电连接至所述电极垫;
其中所述引线形成位于所述发光器件、所述电极垫和所述通孔电极中的至少之一上的针脚,并且在所述针脚上布置有焊球;
其中,在所述通孔电极接触所述引线的表面上布置有凹槽。
2.根据权利要求1所述的发光器件封装,其中,所述引线的直径为1/40至1.5/40毫米。
3.根据权利要求1所述的发光器件封装,其中,所述焊球包括:
接触所述针脚的主体;以及
布置于所述主体上的尾部。
4.根据权利要求1所述的发光器件封装,其中,所述针脚的线宽为0.3至0.35毫米。
5.根据权利要求1所述的发光器件封装,其中,从所述发光器件到所述通孔电极的距离小于从所述发光器件到所述电极垫的距离。
6.根据权利要求1所述的发光器件封装,还包括所述封装体的壁部,其中,所述封装体包括至少两个陶瓷层。
7.根据权利要求6所述的发光器件封装,其中,所述通孔电极布置在每个所述陶瓷层中。
8.根据权利要求1所述的发光器件封装,其中,所述通孔电极与所述封装体的端部相邻。
9.根据权利要求1所述的发光器件封装,其中,所述通孔电极布置在所述封装体的边缘的至少一个部分上。
10.根据权利要求1所述的发光器件封装,其中,所述引线的直径与所述电极垫的宽度之比为1:2至1:3。
11.根据权利要求1所述的发光器件封装,其中,所述通孔电极包括:
框架,布置在所述通孔电极的周边上;以及
导电层,布置在所述框架中。
12.根据权利要求1所述的发光器件封装,还包括布置在所述封装体的下部中的散热部。
13.根据权利要求12所述的发光器件封装,其中,所述散热部由不同于所述封装体的材料制成。
14.根据权利要求12所述的发光器件封装,其中,所述散热部的上表面的宽度大于所述散热部的下表面的宽度。
CN201310688975.3A 2012-12-14 2013-12-16 发光器件封装 Active CN103872211B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020120146331A KR102007404B1 (ko) 2012-12-14 2012-12-14 발광소자 패키지
KR10-2012-0146331 2012-12-14

Publications (2)

Publication Number Publication Date
CN103872211A CN103872211A (zh) 2014-06-18
CN103872211B true CN103872211B (zh) 2018-06-12

Family

ID=49759174

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310688975.3A Active CN103872211B (zh) 2012-12-14 2013-12-16 发光器件封装

Country Status (5)

Country Link
US (1) US9437791B2 (zh)
EP (1) EP2744001A3 (zh)
JP (1) JP6457713B2 (zh)
KR (1) KR102007404B1 (zh)
CN (1) CN103872211B (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140039740A (ko) * 2012-09-25 2014-04-02 엘지이노텍 주식회사 발광소자 패키지
KR20160017849A (ko) * 2014-08-06 2016-02-17 서울바이오시스 주식회사 고출력 발광 장치 및 그 제조 방법
CN104465950A (zh) * 2014-12-02 2015-03-25 深圳市华星光电技术有限公司 一种发光二极管以及发光二极管的制造方法
JP2016138901A (ja) * 2015-01-26 2016-08-04 株式会社日立エルジーデータストレージ 光モジュール、及び走査型画像表示装置
DE102015205354A1 (de) * 2015-03-24 2016-09-29 Osram Gmbh Optoelektronische Baugruppe und Verfahren zum Herstellen einer optoelektronischen Baugruppe
CN106486590A (zh) * 2015-08-26 2017-03-08 深圳市斯迈得半导体有限公司 一种通用于应用线材焊线技术中的混合焊线装置
US20170356640A1 (en) * 2016-06-10 2017-12-14 Innotec, Corp. Illumination assembly including thermal energy management
CN106601701B (zh) * 2017-01-19 2023-03-28 贵州煜立电子科技有限公司 大功率二端表面引出脚电子元器件立体封装方法及结构
DE102017117165B4 (de) * 2017-07-28 2023-04-27 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Elektronisches Bauteil und Verfahren zur Herstellung eines elektronischen Bauteils
CN107644894B (zh) * 2017-09-18 2023-11-24 京东方科技集团股份有限公司 一种有机电致发光器件、其制备方法及显示装置
JP2020025034A (ja) * 2018-08-08 2020-02-13 ローム株式会社 Ledパッケージ、led表示装置
CN109713107A (zh) * 2018-12-13 2019-05-03 佛山市国星光电股份有限公司 支架结构、led器件和灯组阵列

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102810623A (zh) * 2011-05-30 2012-12-05 Lg伊诺特有限公司 发光器件封装和照明系统

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4417392A (en) * 1980-05-15 1983-11-29 Cts Corporation Process of making multi-layer ceramic package
JPS6457725A (en) * 1987-08-28 1989-03-06 Taiyo Yuden Kk Wire bonding method
US6071371A (en) * 1998-02-02 2000-06-06 Delco Electronics Corporation Method of simultaneously attaching surface-mount and chip-on-board dies to a circuit board
JP3490906B2 (ja) 1998-09-22 2004-01-26 日亜化学工業株式会社 半導体装置及びその製造方法
JP2000236040A (ja) * 1999-02-15 2000-08-29 Hitachi Ltd 半導体装置
JP4908669B2 (ja) * 2000-04-27 2012-04-04 ローム株式会社 チップ型発光素子
JP2006032804A (ja) 2004-07-20 2006-02-02 Koha Co Ltd 発光装置およびその製造方法
JP2006128511A (ja) 2004-10-29 2006-05-18 Ngk Spark Plug Co Ltd 発光素子用セラミック基板
JP2006303419A (ja) * 2004-12-03 2006-11-02 Ngk Spark Plug Co Ltd セラミック基板
JP2006303069A (ja) 2005-04-19 2006-11-02 Sumitomo Metal Electronics Devices Inc 発光素子搭載用パッケージ
JP2007088220A (ja) * 2005-09-22 2007-04-05 Renesas Technology Corp 半導体装置の製造方法
JP4804109B2 (ja) * 2005-10-27 2011-11-02 京セラ株式会社 発光素子用配線基板および発光装置並びに発光素子用配線基板の製造方法
SG135066A1 (en) * 2006-02-20 2007-09-28 Micron Technology Inc Semiconductor device assemblies including face-to-face semiconductor dice, systems including such assemblies, and methods for fabricating such assemblies
JP2008041811A (ja) * 2006-08-03 2008-02-21 Ngk Spark Plug Co Ltd 配線基板および多数個取り配線基板ならびにその製造方法
JP2008135526A (ja) * 2006-11-28 2008-06-12 Kyocera Corp 発光素子用連結基板および発光装置連結基板
US8021931B2 (en) * 2006-12-11 2011-09-20 Stats Chippac, Inc. Direct via wire bonding and method of assembling the same
US20080179618A1 (en) * 2007-01-26 2008-07-31 Ching-Tai Cheng Ceramic led package
US20080197461A1 (en) * 2007-02-15 2008-08-21 Taiwan Semiconductor Manufacturing Co.,Ltd. Apparatus for wire bonding and integrated circuit chip package
JP4177874B2 (ja) * 2007-03-28 2008-11-05 京セラ株式会社 発光装置
JP2008288536A (ja) * 2007-05-21 2008-11-27 Panasonic Electric Works Co Ltd 表面実装型セラミック基板
JP5224802B2 (ja) 2007-09-29 2013-07-03 京セラ株式会社 発光素子収納用パッケージ、発光装置ならびに発光素子収納用パッケージおよび発光装置の製造方法
JP2009094213A (ja) * 2007-10-05 2009-04-30 Panasonic Electric Works Co Ltd 発光装置
US20100072511A1 (en) * 2008-03-25 2010-03-25 Lin Charles W C Semiconductor chip assembly with copper/aluminum post/base heat spreader
JP2009239116A (ja) * 2008-03-27 2009-10-15 Sharp Corp 発光装置
JP2010073747A (ja) * 2008-09-16 2010-04-02 Sharp Corp ワイヤボンディング方法及び半導体装置
US8089086B2 (en) * 2009-10-19 2012-01-03 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Light source
US8354743B2 (en) * 2010-01-27 2013-01-15 Honeywell International Inc. Multi-tiered integrated circuit package
JP2011205009A (ja) * 2010-03-26 2011-10-13 Kyocera Corp 表面実装型発光素子用配線基板および発光装置
CN102479907B (zh) * 2010-11-30 2015-01-07 展晶科技(深圳)有限公司 发光二极管封装结构
KR20120069291A (ko) * 2010-12-20 2012-06-28 삼성엘이디 주식회사 발광다이오드 패키지

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102810623A (zh) * 2011-05-30 2012-12-05 Lg伊诺特有限公司 发光器件封装和照明系统

Also Published As

Publication number Publication date
KR20140077478A (ko) 2014-06-24
JP2014120778A (ja) 2014-06-30
EP2744001A3 (en) 2014-12-10
JP6457713B2 (ja) 2019-01-23
KR102007404B1 (ko) 2019-08-05
EP2744001A2 (en) 2014-06-18
US9437791B2 (en) 2016-09-06
US20140167095A1 (en) 2014-06-19
CN103872211A (zh) 2014-06-18

Similar Documents

Publication Publication Date Title
CN103872211B (zh) 发光器件封装
JP6811715B2 (ja) 発光素子パッケージ及び照明装置
KR102594189B1 (ko) 발광 소자, 이 소자를 포함하는 발광 소자 패키지 및 이 패키지를 포함하는 발광 장치
TWI550915B (zh) 發光裝置封裝件及使用其之發光系統
CN103700750B (zh) 发光器件封装
KR101925915B1 (ko) 발광소자
JP2014096591A (ja) 発光素子
CN104164234B (zh) 磷光体及包括磷光体的发光器件封装件
KR101983774B1 (ko) 발광 소자
KR102189133B1 (ko) 발광 소자 및 발광 소자 패키지
JP6251534B2 (ja) 発光素子及び発光素子パッケージ
KR20180023778A (ko) 발광 소자 패키지
KR101694175B1 (ko) 발광소자, 발광소자 패키지 및 조명시스템
KR102464028B1 (ko) 발광 소자 패키지 및 이를 포함하는 발광 장치
KR20140090801A (ko) 발광소자
KR102194805B1 (ko) 발광소자
KR20170009232A (ko) 발광 소자 패키지 및 이를 포함하는 발광 장치
KR20130054034A (ko) 발광 소자
KR102346156B1 (ko) 발광 소자 패키지
KR102023085B1 (ko) 발광소자 패키지
KR20130139017A (ko) 발광 소자
KR102080779B1 (ko) 발광 소자
KR101831283B1 (ko) 발광소자 패키지
KR102182018B1 (ko) 발광소자
KR101941034B1 (ko) 발광 소자 패키지 및 조명 장치

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20210816

Address after: 168 Changsheng North Road, Taicang City, Suzhou City, Jiangsu Province

Patentee after: Suzhou Leyu Semiconductor Co.,Ltd.

Address before: Seoul, South Kerean

Patentee before: LG INNOTEK Co.,Ltd.