CN103839909A - 用于集成电路封装的可变尺寸的焊料凸点结构 - Google Patents
用于集成电路封装的可变尺寸的焊料凸点结构 Download PDFInfo
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Abstract
公开了用于集成电路封装的可变尺寸的焊料凸点结构。本发明的一个实施例提出了包括衬底、集成电路裸片、第一多个焊料凸点结构以及第一多个可变尺寸的焊料凸点结构的集成电路封装。第一多个焊料凸点结构将集成电路裸片电耦连到衬底。第一多个可变尺寸的焊料凸点结构布置在衬底的底面上。第一多个可变尺寸的焊料凸点结构的尺寸调节为与集成电路封装的底座面实质上共面。
Description
技术领域
本发明的实施例总地涉及制造和表面安装集成电路封装。
背景技术
集成电路(IC)制造是包括诸如图案化、沉积、蚀刻以及金属化的工艺的多步骤序列。典型地,在最后的处理步骤中,产生的IC裸片(die)被分开并且封装。IC封装服务于数个目的,包括给电接口提供裸片、提供可通过其从裸片移除热量的热介质和/或在随后的使用和处置期间为裸片提供机械保护。
一种类型的IC封装技术被称为“倒装芯片(flip chip)”封装。在倒装芯片封装中,在金属化工艺完成之后,将焊料凸点结构(例如焊料球、焊盘等)沉积在裸片上,并且将裸片与晶片(例如经由切割、切削等)分开。裸片随后被倒置并且置于衬底上,使得焊料凸点与形成在衬底上的电连接对齐。经由焊料回流过程施加热量以重熔(re-melt)焊料凸点并且将裸片附接(attach)到衬底。可进一步利用非导电粘合剂对裸片/衬底组件进行底部填充来加固裸片和衬底之间的机械连接。
IC制造技术已使得能够生产具有越来越高的晶体管密度的较大尺寸的裸片。结果,IC封装技术已面临需要提供支持必要数目的电连接的封装的挑战。一般而言,随着裸片的尺寸和到裸片的电连接的数目增加,封装的尺寸增加。进一步地,随着封装尺寸增加,裸片和封装材料的热性质成为更重要的因素。
裸片和封装材料的一个相关的热性质是热膨胀系数(CTE)。在倒装芯片封装中,例如,在焊料回流过程期间,裸片在升高的温度下附接到衬底。一旦冷却,裸片的CTE和衬底的CTE之间的失配可能导致衬底翘曲(warp),这降低了IC封装的平面性并且妨碍利用IC封装形成电连接。此外,IC封装的翘曲可能影响在裸片和衬底之间设置的电连接。此外,经历显著翘曲的IC封装可能因为在规范要求之外而被丢弃。
因此,本领域存在对于补偿IC封装的IC裸片与其它部件之间的CTE失配的更有效方式的需要。
发明内容
本发明的一个实施例提出了包括衬底、集成电路裸片、第一多个焊料凸点结构以及第一多个可变尺寸的焊料凸点结构的集成电路封装。第一多个焊料凸点结构将集成电路裸片电耦连到衬底。第一多个可变尺寸的焊料凸点结构布置在衬底的底面上。第一多个可变尺寸的焊料凸点结构的尺寸被调节(sized to)为与集成电路封装的底座面实质上共面。
进一步的实施例提供用于制造集成电路封装的方法和用于表面安装集成电路封装的方法。
所公开的技术的一个优势在于,可变尺寸的焊料凸点结构和可变焊膏体积可以用来挽救原本将因为在共面性规范之外而被丢弃的IC封装。可以校正这些IC封装的共面性,并且产生的IC封装可以成功地被表面安装到电路板或其它类型的衬底,这提高了IC封装产量。
附图说明
因此,可以详细地理解本发明的上述特征,并且可以参考实施例得到对如上面所简要概括的本发明更具体的描述,其中一些实施例在附图中示出。然而,应当注意的是,附图仅示出了本发明的典型实施例,因此不应被认为是对其范围的限制,本发明可以具有其他等效的实施例。
图1A和1B示出了具有常规配置的常规集成电路封装的示意图;
图2A和2B示出了根据本发明的实施例的、具有可变尺寸的焊料凸点结构的集成电路封装;
图3A和3B示出了根据本发明的实施例的、布置在应用到电路板的可变焊膏体积上的集成电路封装;
图4是示出了根据本发明的实施例的用于制造集成电路封装的方法的流程图;以及
图5是示出了根据本发明的实施例的用于表面安装集成电路封装的方法的流程图。
具体实施方式
在下面的描述中,将阐述大量的具体细节以提供对本公开更透彻的理解。然而,本领域的技术人员应该清楚,本公开可以在没有一个或多个这些具体细节的情况下得以实施。
图1A和1B示出了具有常规配置的集成电路(IC)封装100的示意图。常规IC封装100包括裸片110、衬底120、第一多个焊料球130以及第二多个焊料球140。第一多个焊料球130将裸片110机械地和电气地耦连到衬底120并且在裸片110和衬底120之间提供电连接。第二多个焊料球140将常规IC封装100机械地和电气地耦连到电路板(未示出)并且在常规IC封装100和电路板之间提供电连接。
图1A示出了利用第一多个焊料球130将裸片110结合到衬底120之前的常规IC封装100。在常规“倒装芯片”配置中,常规IC封装100利用尺寸一致的焊料球130、140。在结合期间,将第一多个焊料球130置于裸片110和衬底120之间,并且将裸片110和衬底120加热到类似的温度。随后将裸片110放低至衬底120上,将裸片110机械地和电气地耦连到衬底120。
图1B示出了当冷却到室温(例如大约23℃)时的常规IC封装100。由于裸片110的热膨胀系数(CTE)和衬底120的CTE之间的失配,衬底120和/或裸片110在常规IC封装100被冷却时经历翘曲。因此,降低了结合到衬底120的底面的第二多个焊料球140的共面性150,如图1B所示。
共面性(coplanarity)是用来描述物体位于同一平面的程度的术语。当该术语使用在IC封装领域中时,共面性可定义为最高焊料球的高度和底座面160的高度之间的差。例如,如图1B所示,常规IC封装100的共面性150由中心的焊料球140的高度与最右边和最左边的焊料球140位于的底座面160的高度之间的差来确定。在底座面160上方焊料球的高度方面的增加表示共面性方面的降低。此外,共面性方面的降低可能妨碍一个或多个焊料球与常规IC封装100所要安装在其上的衬底和电路板形成适当的机械和/或电连接。此外,因为IC封装共面性典型地需要满足某些要求以确保与其它器件部件的适当的机械连接性和电连接性,所以共面性方面的显著降低可能降低IC封装组装产量。
图2A和2B示出了根据本发明的实施例的、具有可变尺寸的焊料凸点结构240的集成电路(IC)封装200。IC封装200包括IC裸片210、衬底220、多个焊料凸点结构230以及多个可变尺寸的焊料凸点结构240。
图2A示出了利用多个焊料凸点结构230将IC裸片210结合到衬底220之前的IC封装200。在结合期间,将第一多个焊料凸点结构230置于IC裸片210和衬底220之间,并且将IC裸片210和衬底220加热到类似的温度。随后将IC裸片210放低到衬底220上,将IC裸片210机械地和电气地耦连到衬底220。
图2B示出了当冷却到室温(例如大约23℃)时的IC封装200。由于裸片210的CTE和衬底220的CTE之间的失配,衬底220和/或IC裸片210在IC封装200被冷却时经历翘曲。然而,可以通过将多个可变尺寸的焊料凸点结构240耦连到衬底220的底面来校正该翘曲。如图2B所示,较小焊料凸点结构240可以耦连在衬底220的边缘附近,而较大焊料凸点结构240可以耦连在衬底220的中心附近。该配置可以增加所得到的IC封装200的焊料凸点结构240的共面性。
尽管图2A和2B示出在将IC裸片210结合到衬底220之前将可变尺寸的焊料凸点结构240结合到衬底220的底面,但是可变尺寸的焊料凸点结构240也可以在封装过程中的任何时候结合到衬底。例如,可变尺寸的焊料凸点结构240可以在IC裸片210已经结合到衬底220之后结合到衬底,诸如在IC裸片210和衬底220已经冷却之后。允许IC裸片210和衬底220在结合可变尺寸的焊料凸点结构240之前冷却可使得能够进行更准确的平面性校正,因为在衬底翘曲已经发生之后可以更准确地确定可变尺寸的焊料凸点结构240的尺寸和/或位置。
在其它实施例中,可变尺寸的焊料凸点结构240可以在将IC封装200表面安装在第二衬底(例如印刷电路板、中介片(interposer)等等)上时结合到衬底220。在这类实施例中,可随后对可变尺寸的焊料凸点结构240的尺寸和/或位置进行选择以确保在IC封装200和第二衬底之间形成适当的电连接和机械连接。
除将IC裸片210结合到衬底220之外,IC裸片210可经底部填充(underfill)和/或包覆成型(overmold)以增强IC裸片210和衬底220之间的机械连接。进一步地,除将IC封装200表面安装到第二衬底上之外,IC封装200可经底部填充和/或包覆成型以增强IC封装200和第二衬底之间的机械连接。
尽管未在图2A和2B中示出,也可以变化耦连在IC裸片210和衬底220之间的多个焊料凸点结构230的尺寸以确保IC裸片210和衬底220之间的适当的电和机械连接性。然而,与多个可变尺寸的焊料凸点结构240的配置相反,可以选择多个焊料凸点结构230的尺寸,使得较大焊料凸点结构布置在IC裸片210的边缘附近,而较小焊料凸点结构布置在IC裸片210的中心附近。
焊料凸点间距可定义为相邻焊料球之间的中心到中心的距离。一般而言,当将焊料凸点结构230、240结合到IC裸片210和衬底220时,任何焊料凸点尺寸和间距可以用来改进IC封装200的共面性。可变尺寸的焊料凸点结构可以包括多个尺寸(例如两个不同尺寸、三个不同尺寸或更多)。焊料凸点结构的示例包括但不限于焊料球、焊料焊盘和柱凸块(例如铜柱凸块)。IC裸片210可以是能够被封装的任何类型的电子电路。IC裸片的示例包括但不限于中央处理单元(CPU)裸片、片上系统(SoC)裸片、微控制器裸片、易失性存储器裸片(例如动态随机存取存储器(DRAM)裸片、DRAM立方体)、非易失性存储器裸片(例如闪存、磁阻RAM)等等。衬底220可以是能够用于封装集成电路的任何类型的衬底。衬底的示例包括但不限于中介片、介电承载件(carrier)(例如陶瓷、玻璃)、印刷电路板、半导体晶片等等。
图3A和3B示出了根据本发明的实施例的布置在应用到电路板350的可变焊膏体积360上的IC封装300。IC封装300包括IC裸片310、衬底320、第一多个焊料凸点结构330以及第二多个焊料凸点结构340。如上文关于图2B所讨论的,在IC封装300的冷却期间,IC裸片310的CTE和衬底320的CTE之间的失配导致IC封装300的翘曲。因此,如图3B所示,可变焊膏体积360经选择以匹配第二多个焊料凸点结构340的高度并且补偿IC封装300的共面性的损失。因此,原本将因在共面性规范之外而被丢弃的IC封装(例如IC封装300)可被挽救并且成功地被表面安装到电路板350或其他类型的衬底。
一般而言,布置在电路板350上的焊膏的体积和高度在电路板350的中部附近较高,在电路板350的边缘附近较低。尽管图3A示出在将IC封装300表面安装到电路板之前将可变焊膏体积360布置在电路板350上,但是也可以以其它方式应用可变焊膏体积360。例如,可变焊膏体积360可以直接应用到第二多个焊料凸点结构340。产生的IC封装300随后可以被表面安装在电路板350上。此外,尽管示出了柱状的可变焊膏体积360,但是也可以使用任何焊膏尺寸、焊膏形状以及焊膏间距。
在其它实施例中,图2A和2B示出的技术可以与图3A和3B示出的技术组合。例如,当将IC封装表面安装到电路板或其它类型的衬底时,可以结合可变焊膏体积使用可变尺寸的焊料凸点结构来校正IC封装共面性以及确保适当的电和机械连接性。作为示例,当在应用可变尺寸的焊料凸点结构之后IC封装的共面性仍在规范要求之外时,可以使用这类组合技术。在这类示例中,可变焊膏体积可以应用到电路板或其它类型的衬底,或应用到IC封装,以校正剩余的不足。仍在其它实施例中,可变焊膏体积(和/或可变尺寸的焊料凸点结构)可以布置在IC裸片310和衬底320之间以确保适当的电和机械连接性。
图4是根据本发明的实施例的、用于制造集成电路封装200的方法的流程图。尽管其方法步骤是结合图2A和2B示出的示例性实施例进行描述的,但是其它变化对于本领域普通技术人员而言也将是显而易见的。
在步骤410,提供了衬底220和IC裸片210。在步骤412,将第一多个焊料凸点结构230置于IC裸片210和衬底220之间。在步骤414,将第一多个焊料凸点结构230结合在IC裸片210和衬底220之间。可以通过将IC裸片210和衬底220的温度增加到大约150℃到大约300℃的焊料回流温度来实施结合,所述焊料回流温度诸如大约200℃到大约250℃。
在将IC裸片210结合到衬底220之后,产生的组装物可被冷却(例如到室温)。在冷却期间,IC裸片210的CTE和衬底220的CTE之间的失配可能使这些部件的尺寸以不同速率缩小。因此,在冷却之后,IC裸片210和衬底220中的一者或二者可能翘曲。例如,如果衬底220的CTE高于IC裸片210的CTE,那么衬底220可能在冷却期间翘曲。为了补偿IC裸片210和/或衬底220的翘曲并且确保耦连到衬底220的底面的焊料凸点结构在共面性规范内,可以采取数个步骤。第一,在步骤416,首先确定衬底220是否翘曲。确定衬底220是否翘曲可以包括例如检查衬底220和/或基于IC裸片210的CTE和衬底220的CTE计算翘曲的程度(measure)。然后,在步骤418,可以确定共面性规范。共面性规范可以包括最高焊料凸点结构的高度和底座面160的高度之间的经指定的距离。当最高焊料凸点结构的高度离底座面160的高度的距离大于该指定距离时,该焊料凸点结构可以视为在共面性规范之外。当最高焊料凸点结构的高度离底座面160的高度的距离小于该指定距离时,该焊料凸点结构可以视为在共面性规范之内。
在步骤420,选择第一多个可变尺寸的焊料凸点结构240。可以选择第一多个可变尺寸的焊料凸点结构240的尺寸,使得当第一多个可变尺寸的焊料凸点结构240结合到衬底220的底面时第一多个可变尺寸的焊料凸点结构240满足共面性规范。在步骤422,将多个可变尺寸的焊料凸点结构240置于衬底220的底面上。例如,可以放置多个可变尺寸的焊料凸点结构240使得较大可变尺寸的焊料凸点结构240在衬底220的中心附近,较小尺寸的焊料凸点结构240在衬底220的边缘附近。
可以以任何方式来选择可变尺寸的焊料凸点结构240的尺寸,以配置为校正或补偿衬底220和/或产生的IC封装200的共面性。此外,可以以任何方式来选择间距(即焊料凸点结构之间的中心到中心的距离),以配置为校正或补偿衬底220和/或产生的IC封装200的共面性。此外,可变尺寸的焊料凸点结构240的间距可以是常数,或者间距可以随衬底200位置而变化。最后,在步骤424,将多个可变尺寸的焊料凸点结构240结合到衬底220的底面。
图5是示出了根据本发明的实施例的用于表面安装集成电路封装300的方法的流程图。尽管其方法步骤是结合图3A和3B示出的示例性实施例进行描述的,但是其它变化对于本领域普通技术人员也将是显而易见的。
在步骤510,提供了衬底320和IC裸片310。在步骤512,将第一多个焊料凸点结构330置于IC裸片310和衬底320之间。在步骤514,将第一多个焊料凸点结构330结合在IC裸片310和衬底320之间。如关于图4所讨论的,在将IC裸片310结合到衬底320之后,IC裸片310和衬底320之一或二者可能经历翘曲。
IC裸片310和/或衬底320的翘曲可以以一个或多个方式得到补偿。在步骤516,将第二多个焊料凸点结构340置于衬底320的底面上。第二多个焊料凸点结构340可以具有一致的尺寸和形状,或者第二多个焊料凸点结构340可以具有不同尺寸和形状,如上文关于图2A、2B和4所描述的。在步骤518,将第二多个焊料凸点结构340结合到衬底320的底面。然后,在步骤520,确定第二多个焊料凸点结构340是否在共面性规范之外。进一步地,可以确定第二多个焊料凸点结构340超出共面性规范之外的距离。在一个示例中,如果衬底320发生翘曲并且第二多个焊料凸点结构340是尺寸一致的,那么第二多个焊料凸点结构340可能在共面性规范之外。在另一个示例中,如果第二多个焊料凸点结构340选择为多个不同尺寸和/或形状,那么第二多个焊料凸点结构340仍可能落在共面性规范之外。在这二者中的任一示例中,可以采取附加步骤来确保第二多个焊料凸点结构340能够与电路板350或他们布置在其上的其它类型的衬底形成适当的电和机械连接。
在步骤522,可以基于第二多个焊料凸点结构超出共面性规范之外的距离来选择多个焊膏体积360。可以选择多个焊膏体积360以补偿第二多个焊料凸点结构340的共面性不足。例如,可以针对比底座面高的焊料凸点结构(共面性程度低)选择较大焊膏体积,而可以针对更接近底座面(共面性程度较高)的焊料凸点结构选择较小焊膏体积。在步骤524,多个可变焊膏体积360布置在电路板350或其它类型的衬底上,如上文关于图3A和3B所描述的。最后,在步骤526,IC封装300布置在电路板350或其它类型的衬底上和/或结合到电路板350或其它类型的衬底,例如,通过将第二多个焊料凸点结构340结合到多个焊膏体积360。
总而言之,表面安装技术使用尺寸可变的焊料凸点结构(例如焊料球)来补偿IC裸片、衬底和/或其它封装材料的弯曲。当将裸片附接到IC封装和/或当将产生的IC封装附接到电路板时,可以变化焊料凸点结构的尺寸来确保适当的电连接性。此外,当将IC封装附接到电路板时,焊膏可以以变化的体积而沉积在电路板上以补偿IC封装的共面性。
所公开的技术的一个优势在于,可变尺寸的焊料凸点结构和可变焊膏体积可以用来挽救原本将因在共面性规范之外而被丢弃的IC封装。可以矫正这些IC封装的共面性,并且产生的IC封装可以成功地被表面安装到电路板或其它类型的衬底,这提高了IC封装产量。
上文已引用具体实施例描述了本发明。然而,本领域普通技术人员将理解的是,可以对其做出各种修改和改变而不脱离如随附的权利要求所阐述的本发明的较宽精神和范围。因此,前述描述和图将被视为示例性而非限制性意义。
因此,本发明的实施例的范围在下面的权利要求中进行阐述。
Claims (10)
1.一种集成电路封装,包括:
衬底;
集成电路裸片;
第一多个焊料凸点结构,其将所述集成电路裸片电耦连到所述衬底;以及
第一多个可变尺寸的焊料凸点结构,其布置在所述衬底的底面上。
2.根据权利要求1所述的集成电路封装,其中:
所述第一多个可变尺寸的焊料凸点结构包括大焊料凸点结构和小焊料凸点结构,
所述大焊料凸点结构布置在所述衬底的中心点附近,以及
所述小焊料凸点结构布置在所述衬底的一个或多个边缘附近。
3.根据权利要求1所述的集成电路封装,其中所述第一多个可变尺寸的焊料凸点结构的尺寸调节为与所述集成电路封装的底座面实质上共面。
4.根据权利要求1所述的集成电路封装,其中所述第一多个可变尺寸的焊料凸点结构包括三个或更多个焊料凸点结构尺寸。
5.根据权利要求1所述的集成电路封装,其中所述第一多个可变尺寸的焊料凸点结构包括以下各项中的至少一个:焊料球、焊料焊盘以及柱凸块。
6.根据权利要求1所述的集成电路封装,其中所述衬底利用多个可变焊膏体积来耦连到电路板。
7.根据权利要求1所述的集成电路封装,其中:
所述第一多个焊料凸点结构包括大焊料凸点结构和小焊料凸点结构,
所述大焊料凸点结构布置在所述集成电路裸片的一个或多个边缘附近,以及
所述小焊料凸点结构布置在所述集成电路裸片的中心点附近。
8.根据权利要求1所述的集成电路封装,其中所述衬底包括中介片。
9.根据权利要求1所述的集成电路封装,其中所述集成电路封装包括球形网格阵列。
10.一种制造集成电路封装的方法,包括:
提供衬底和集成电路裸片;
选择第一多个焊料凸点结构;
将所述第一多个焊料凸点结构置于所述衬底和所述集成电路裸片之间;
将所述第一多个焊料凸点结构结合在所述衬底和所述集成电路路牌之间;
选择第一多个可变尺寸的焊料凸点结构;
将所述第一多个可变尺寸的焊料凸点结构置于所述衬底的底面上;以及
将所述第一多个可变尺寸的焊料凸点结构结合到所述衬底的底面。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/683,315 US9385098B2 (en) | 2012-11-21 | 2012-11-21 | Variable-size solder bump structures for integrated circuit packaging |
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US20140138823A1 (en) | 2014-05-22 |
TW201444044A (zh) | 2014-11-16 |
DE102013019280A1 (de) | 2014-05-22 |
US9385098B2 (en) | 2016-07-05 |
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