CN103730341A - 半导体器件制造方法 - Google Patents
半导体器件制造方法 Download PDFInfo
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- CN103730341A CN103730341A CN201210382067.7A CN201210382067A CN103730341A CN 103730341 A CN103730341 A CN 103730341A CN 201210382067 A CN201210382067 A CN 201210382067A CN 103730341 A CN103730341 A CN 103730341A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000000463 material Substances 0.000 claims abstract description 134
- 238000000034 method Methods 0.000 claims abstract description 55
- 125000006850 spacer group Chemical group 0.000 claims description 27
- 238000000151 deposition Methods 0.000 claims description 22
- 239000003989 dielectric material Substances 0.000 claims description 19
- 239000000758 substrate Substances 0.000 claims description 17
- 238000005530 etching Methods 0.000 claims description 15
- 239000012212 insulator Substances 0.000 claims description 15
- 230000008021 deposition Effects 0.000 claims description 14
- 238000000059 patterning Methods 0.000 claims description 12
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 9
- 150000001875 compounds Chemical class 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 125000001475 halogen functional group Chemical group 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 230000007797 corrosion Effects 0.000 claims description 2
- 238000005260 corrosion Methods 0.000 claims description 2
- 229910000765 intermetallic Inorganic materials 0.000 claims description 2
- 229920005591 polysilicon Polymers 0.000 claims description 2
- 230000014759 maintenance of location Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910003855 HfAlO Inorganic materials 0.000 description 1
- 229910004129 HfSiO Inorganic materials 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000001010 compromised effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 150000002910 rare earth metals Chemical class 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/28132—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects conducting part of electrode is difined by a sidewall spacer or a similar technique, e.g. oxidation under mask, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/28141—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects insulating part of the electrode is defined by a sidewall spacer, e.g. dummy spacer, or a similar technique, e.g. oxidation under mask, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210382067.7A CN103730341B (zh) | 2012-10-10 | 2012-10-10 | 半导体器件制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210382067.7A CN103730341B (zh) | 2012-10-10 | 2012-10-10 | 半导体器件制造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103730341A true CN103730341A (zh) | 2014-04-16 |
CN103730341B CN103730341B (zh) | 2018-02-13 |
Family
ID=50454364
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201210382067.7A Active CN103730341B (zh) | 2012-10-10 | 2012-10-10 | 半导体器件制造方法 |
Country Status (1)
Country | Link |
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CN (1) | CN103730341B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021197025A1 (zh) * | 2020-03-30 | 2021-10-07 | 长鑫存储技术有限公司 | 半导体结构及其制备方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5874341A (en) * | 1996-10-30 | 1999-02-23 | Advanced Micro Devices, Inc. | Method of forming trench transistor with source contact in trench |
KR20010083626A (ko) * | 2000-02-17 | 2001-09-01 | 박종섭 | 트랜지스터 형성방법 |
CN1612297A (zh) * | 2003-10-27 | 2005-05-04 | 上海宏力半导体制造有限公司 | 一种形成凹槽栅极结构的方法 |
US20070045611A1 (en) * | 2005-08-30 | 2007-03-01 | International Business Machines Corporation | Mosfet with laterally graded channel region and method for manufacturing same |
CN101364537A (zh) * | 2007-08-09 | 2009-02-11 | 中芯国际集成电路制造(上海)有限公司 | 栅极及半导体器件的制造方法、用于制造栅极的结构 |
CN101527316A (zh) * | 2008-03-07 | 2009-09-09 | 索尼株式会社 | 半导体装置及其制造方法 |
US20110057245A1 (en) * | 2009-09-10 | 2011-03-10 | Renesas Electronics Corporation | Nonvolatile semiconductor memory device and a manufacturing method thereof |
-
2012
- 2012-10-10 CN CN201210382067.7A patent/CN103730341B/zh active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5874341A (en) * | 1996-10-30 | 1999-02-23 | Advanced Micro Devices, Inc. | Method of forming trench transistor with source contact in trench |
KR20010083626A (ko) * | 2000-02-17 | 2001-09-01 | 박종섭 | 트랜지스터 형성방법 |
CN1612297A (zh) * | 2003-10-27 | 2005-05-04 | 上海宏力半导体制造有限公司 | 一种形成凹槽栅极结构的方法 |
US20070045611A1 (en) * | 2005-08-30 | 2007-03-01 | International Business Machines Corporation | Mosfet with laterally graded channel region and method for manufacturing same |
CN101364537A (zh) * | 2007-08-09 | 2009-02-11 | 中芯国际集成电路制造(上海)有限公司 | 栅极及半导体器件的制造方法、用于制造栅极的结构 |
CN101527316A (zh) * | 2008-03-07 | 2009-09-09 | 索尼株式会社 | 半导体装置及其制造方法 |
US20110057245A1 (en) * | 2009-09-10 | 2011-03-10 | Renesas Electronics Corporation | Nonvolatile semiconductor memory device and a manufacturing method thereof |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021197025A1 (zh) * | 2020-03-30 | 2021-10-07 | 长鑫存储技术有限公司 | 半导体结构及其制备方法 |
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CN103730341B (zh) | 2018-02-13 |
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Effective date of registration: 20201217 Address after: 510000 601, building a, 136 Kaiyuan Avenue, Huangpu District, Guangzhou City, Guangdong Province Patentee after: AoXin integrated circuit technology (Guangdong) Co.,Ltd. Address before: 100029 No. 3 Beitucheng West Road, Chaoyang District, Beijing Patentee before: Institute of Microelectronics, Chinese Academy of Sciences |
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Effective date of registration: 20220427 Address after: 510000 room 710, Jianshe building, No. 348, Kaifa Avenue, Huangpu District, Guangzhou, Guangdong Patentee after: Ruili flat core Microelectronics (Guangzhou) Co.,Ltd. Address before: 510000 601, building a, 136 Kaiyuan Avenue, Huangpu District, Guangzhou City, Guangdong Province Patentee before: AoXin integrated circuit technology (Guangdong) Co.,Ltd. |