CN103715138A - 一种阵列基板及其制造方法、显示装置 - Google Patents

一种阵列基板及其制造方法、显示装置 Download PDF

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Publication number
CN103715138A
CN103715138A CN201310752680.8A CN201310752680A CN103715138A CN 103715138 A CN103715138 A CN 103715138A CN 201310752680 A CN201310752680 A CN 201310752680A CN 103715138 A CN103715138 A CN 103715138A
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Prior art keywords
via hole
insulating barrier
photoresist
metal level
conductive layer
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CN201310752680.8A
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CN103715138B (zh
Inventor
白金超
刘耀
李梁梁
丁向前
郭总杰
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to CN201310752680.8A priority Critical patent/CN103715138B/zh
Priority to US14/414,713 priority patent/US9461078B1/en
Priority to EP14859303.1A priority patent/EP3091568B1/en
Priority to PCT/CN2014/074889 priority patent/WO2015100870A1/zh
Publication of CN103715138A publication Critical patent/CN103715138A/zh
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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Abstract

本发明涉及显示技术领域,提供一种阵列基板及其制造方法、显示装置。该制造方法在通过过孔电性连接不相邻的两个导电层时,通过多次刻蚀工艺分别刻蚀相邻导电层之间的绝缘层,形成位置对应的绝缘层过孔,以实现不相邻的导电层之间的电性连接。同时,在每次刻蚀工艺中,还可以完成相邻导电层之间通过过孔的电性连接。即在通过过孔电性连接至少三个导电层时,每次刻蚀工艺中均仅刻蚀相邻导电层之间的绝缘层,不会存在深孔和浅孔的区别,避免了浅孔出现过刻和坡度角异常的问题,提高了产品的良率和品质。

Description

一种阵列基板及其制造方法、显示装置
技术领域
本发明涉及显示技术领域,特别是指一种阵列基板及其制造方法、显示装置。
背景技术
薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,简称TFT-LCD)是一种重要的平板显示设备。在TFT-LCD面板的阵列基板制备工艺中,过孔设计是一项很重要的内容,在阵列基板的外围电路区域,通常需要通过过孔将不同层的金属连接在一起。过孔工艺的优劣直接影响到产品的良率以及显示面板的相关性能。
结合图1所示,现有技术中ADS显示模式TFT阵列基板的制备工艺通过以下步骤形成连接不同层金属的过孔:
形成栅金属层薄膜,并对栅金属层进行构图工艺形成栅电极2,以及与第二透明导电金属层连接的第一图案100,和与源漏金属层连接的第二图案200;
形成栅绝缘层薄膜20;
形成第一透明导电金属层薄膜,并对第一透明导电金属层薄膜进行构图工艺形成像素电极6;
形成有源层薄膜,并对有源层薄膜进行构图工艺形成薄膜晶体管(ThinFilm Transistor,简称TFT)1的有源层图案5;
形成源漏金属层薄膜,并对源漏金属层薄膜进行构图工艺形成TFT1的源电极3和漏电极4,以及与第二透明导电金属层连接的第三图案300,和与栅金属层连接的第四图案201,其中,漏电极4搭接在像素电极6上,形成电连接;
形成钝化层薄膜30,并对钝化层薄膜30进行构图工艺形成第一过孔8、第二过孔11、第三过孔12和第四过孔13,且第一过孔8延伸至栅金属层,第二过孔11延伸至源漏金属层,第三过孔12延伸至栅金属层,第四过孔13延伸至源漏金属层;
形成第二透明导电金属层薄膜,并对第二透明导电金属层薄膜进行构图工艺形成狭缝公共电极7,以及通过第一过孔8与栅金属层连接的第五图案101,通过第二过孔11与源漏金属层连接的第六图案301,以及通过第三过孔12和第四过孔13连接第二图案200和第四图案201的第七图案202。
这种过孔的制备工艺技术存在以下问题:
1)过孔工艺无论深孔或浅孔都使用一次曝光、刻蚀完成,导致浅孔区域极易产生金属过刻的现象发生,同时容易出现过孔坡度角异常。
例如:形成第一过孔8和第三过孔12需要刻蚀钝化层30和栅绝缘层20,而形成第二过孔11和第四过孔13只需要刻蚀钝化层30,因此,当第二过孔11和第四过孔13刻蚀完成,露出源漏金属层时,而第一过孔8和第三过孔12只刻蚀到钝化层30,当继续刻蚀栅绝缘层20时,第二过孔11和第四过孔13区域露出的源漏金属层就会发生过刻不良。
2)采用透明导电金属线连接过孔。由于透明导电金属线电阻较大,会导致过孔连接电阻过大,造成基板面内电阻不均,会发生Greenish和H-Block等不良。
例如:栅金属层的第二图案200和源漏金属层的第四图案201用第二透明导电金属层的第七图案202连接,导致连接电阻过大。
发明内容
本发明提供一种阵列基板及其制造方法,用以解决现有技术中通过一次刻蚀工艺形成过孔连接至少三个导电层时,存在同一刻蚀工艺同时形成深孔和浅孔,造成浅孔出现过刻和坡度角异常的问题。
本发明还提供一种显示装置,用于提高显示装置的显示品质。
为解决上述技术问题,本发明的实施例提供技术方案如下:
一方面,提供一种TFT阵列基板的制备方法,包括:
在一衬底基板上形成第一金属层,对所述第一金属层进行构图工艺,形成包括第一连接图案的图形;
在第一金属层上形成第一绝缘层,对所述第一绝缘层进行构图工艺,形成多个第一过孔,所述第一过孔对应于所述第一连接图案的位置;
在第一绝缘层上形成第二金属层,对所述第二金属层进行构图工艺,形成包括第二连接图案的图形;
在第二金属层上形成第二绝缘层,对所述第二绝缘层进行构图工艺,形成多个过渡过孔和第二过孔,其中,所述过渡过孔对应于所述第一过孔的位置,所述第二过孔对应于所述第二连接图案的位置;
在第二绝缘层上形成包括第一导电层的图形。
一方面,提供一种TFT阵列基板,包括:
依次形成于一衬底基板上的第一金属层,第一绝缘层,第二金属层,第二绝缘层,第一导电层,其中,所述第一金属层包括第一连接图案,所述第一绝缘层包括第一过孔,所述第二金属层包括第二连接图案,所述第二绝缘层包括过渡过孔和第二过孔,其中,所述第一过孔对应于第一连接图案的位置,所述过渡过孔对应于第一过孔的位置,所述第一金属层通过所述第一过孔和所述过渡过孔而与所述第一导电层电性连接;所述第二过孔对应于第二连接图案的位置,所述第二金属层通过所述第二过孔而与所述第一导电层电性连接。
一方面,提供一种显示装置,包括如上所述的显示面板。
本发明的实施例具有以下有益效果:
上述技术方案中,在通过过孔电性连接不相邻两个导电层时,通过多次刻蚀工艺分别刻蚀相邻导电层之间的绝缘层,形成位置对应的绝缘层过孔,实现不相邻导电层之间的电性连接。同时,在每次刻蚀工艺中还可以完成相邻导电层之间通过过孔的电性连接。即在通过过孔电性连接至少三个导电层时,每次刻蚀工艺中均仅刻蚀相邻导电层之间的绝缘层,不会存在深孔和浅孔的区别,避免了浅孔出现过刻和坡度角异常的问题,提高了产品的良率和品质。进一步地,通过对绝缘层的构图工艺同时形成位于其上方导电层的图形,并保留没有图形区域的光刻胶,在形成导电层后,通过剥离光刻胶的方式即可形成导电层的图形,虽然增加了绝缘层的构图工艺,但省略了导电层的构图工艺,不会增加生产成本。
附图说明
图1表示现有技术中ADS模式的TFT阵列基板的结构示意图;
图2-图8表示本发明实施例中ADS模式的TFT阵列基板的制造过程示意图。
具体实施方式
为使本发明的实施例要解决的技术问题、技术方案和优点更加清楚,下面将结合附图及具体实施例进行详细描述。
实施例一
本发明实施例中提供一种TFT阵列基板的制备方法,具体为电性连接阵列基板不同导电层的绝缘层过孔的制备方法。由于现有技术中是通过一次刻蚀工艺形成连接不同导电层的绝缘层过孔,当需要连接的导电层为3个以上(包括3个)时,则连接不同导电层的绝缘层过孔就会存在深孔和浅孔,而通过一次刻蚀工艺形成深孔(连接不相邻的两个导电层,需要刻蚀三个以上导电层之间的绝缘层)和浅孔(连接相邻的两个导电层,只需刻蚀两个导电层之间的绝缘层),会造成浅孔出现过刻和坡度角异常的问题。
为解决上述技术问题,本实施例中TFT阵列基板的制备方法,包括:
在一衬底基板上形成第一金属层,对所述第一金属层进行构图工艺,形成包括第一连接图案的图形;
在第一金属层上形成第一绝缘层,对所述第一绝缘层进行构图工艺,形成多个第一过孔,所述第一过孔对应于所述第一连接图案的位置;
在第一绝缘层上形成第二金属层,对所述第二金属层进行构图工艺,形成包括第二连接图案的图形;
在第二金属层上形成第二绝缘层,对所述第二绝缘层进行构图工艺,形成多个过渡过孔和第二过孔,其中,所述过渡过孔对应于所述第一过孔的位置,所述第二过孔对应于所述第二连接图案的位置;
在第二绝缘层上形成包括第一导电层的图形。
上述技术方案中,在电性连接不相邻的第一金属层和第一导电层时,通过第一次刻蚀工艺在第一导电层上方的第一绝缘层上形成第一过孔,暴露出第一金属层的连接图案,之后在第一绝缘层上形成第二金属层的连接图案。然后再通过第二次刻蚀工艺在第二金属层上方的第二绝缘层上形成过渡过孔和第二过孔,暴露出第一金属层的连接图案和第二金属层的连接图案,从而在第二绝缘层上形成第一导电层时,第一导电层通过过渡过孔与第一金属层的连接图案连接,实现不相邻第一金属层和第一导电层的电性连接,通过第二过孔与第二金属层的连接图案连接,实现相邻第二金属层和第一导电层的电性连接。通过第一次刻蚀工艺还可以同时完成相邻第一金属层和第二金属层的电性连接。由于每次刻蚀工艺中的刻蚀深度相同,不会存在深孔和浅孔的区别,避免了浅孔出现过刻和坡度角异常的问题,提高了产品的良率和品质。
需要说明的是,本发明中所说的“相邻的导电层”和“不相邻的导电层”只是针对导电层而言,不包括导电层之间的绝缘层。即,若两个导电层之间只有绝缘层,则说这两个导电层相邻;若两个导电层之间还有其他导电层,则说这两个导电层不相邻。
对于TFT阵列基板,具体的,所述第一金属层为栅金属层,还用于形成栅电极;所述第二金属层为源漏金属层,还用于形成源电极和漏电极,所述第一导电层为第一透明导电层(如氧化铟锡、氧化铟锌)。相应的,第一绝缘层即为栅绝缘层。通过本发明的技术方案可以实现TFT阵列基板上栅金属层、源漏金属层和透明导电层之间的两两电性连接或三者之间的电性连接;
进一步地,对源漏金属(即第二金属层)进行构图工艺,还用于形成第一电性连接图案,则栅金属(即第一金属层)通过所述第一过孔、所述第一电性连接图案和所述过渡过孔而与第一透明导电层(即第一导电层)电性连接。由于连接栅金属层和透明导电层的第一电性连接图案为源漏金属,降低了过孔连接金属电阻,改善了阵列基板的显示品质,使整个阵列基板的生产良率以及最终显示面板的性能得到有效提升。
ADSDS(简称ADS)是平面电场宽视角核心技术-高级超维场转换技术(ADvanced Super Dimension Switch),其核心技术特性描述为:通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的电场形成多维电场,使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转,从而提高了液晶工作效率并增大了透光效率。高级超维场转换技术可以提高TFT-LCD产品的画面品质,具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹(push Mura)等优点。针对不同应用,ADS技术的改进技术有高透过率I-ADS技术、高开口率H-ADS和高分辨率S-ADS技术等。
对于ADS模式的TFT阵列基板,显示面板的像素电极和公共电极均形成在阵列基板上。由于增加了栅绝缘的构图工艺,势必会增加生产成本。本实施例中,为了不增加生产成本,在第一绝缘层上形成像素电极,所述像素电极由第二导电层形成,且所述第二导电层为高透光率的第二透明导电层,并通过一次构图工艺同时形成第一绝缘层的图形和第二透明导电层的图形。
具体的,通过一次构图工艺形成第一绝缘层的图形和第二透明导电层的图形的步骤包括:
在所述第一绝缘层(即栅绝缘层)上涂覆第一光刻胶,采用半色调或灰色调掩膜版对第一光刻胶进行曝光,显影,形成第一光刻胶部分保留区域、第一光刻胶完全保留区域和第一光刻胶不保留区域,其中,第一光刻胶部分保留区域至少对应像素电极所在的区域,第一光刻胶不保留区域至少对应第一过孔所在的区域,第一光刻胶完全保留区域对应其他区域;
通过刻蚀工艺去除第一光刻胶不保留区域的第一绝缘层,形成第一过孔,所述第一过孔对应于栅金属层的第一连接图案的位置;
通过灰化工艺去除第一光刻胶部分保留区域的光刻胶,形成像素电极的图案;
在第一光刻胶上形成第二透明导电层,剥离剩余的光刻胶,形成像素电极。
通过上述步骤,仅通过一次刻蚀工艺即形成栅绝缘层的图形和像素电极,省略了形成像素电极的构图工艺,不会增加生产成本。且形成的像素电极位于源电极和漏电极下方,像素电极和漏电极以搭接的方式电性连接。相应地,第一透明导电层(即第一导电层)用于形成狭缝公共电极。
进一步地,为了降低生产成本,也可以通过上述工艺方法同时形成第二绝缘层的图形和狭缝公共电极的图形,具体包括以下步骤:
在所述第二绝缘层上涂覆第二光刻胶,采用灰色调或半色调掩膜版对第二光刻胶进行曝光,显影,形成第二光刻胶部分保留区域、第二光刻胶完全保留区域和第二光刻胶不保留区域,其中,第二光刻胶不保留区域至少对应过渡过孔和第二过孔所在的区域,第二光刻胶部分保留区域至少对应狭缝公共电极所在的区域,第二光刻胶不保留区域对应其他区域;
通过刻蚀工艺去除第二光刻胶不保留区域的第二绝缘层,形成过渡过孔和第二过孔;
通过灰化工艺去除第二光刻胶部分保留区域的光刻胶,形成狭缝公共电极的图形;
在第二光刻胶上形成第一透明导电层,剥离剩余的光刻胶,形成狭缝公共电极。
通过上述步骤,仅通过一次刻蚀工艺即形成第二绝缘层的图形和狭缝公共电极,省略了形成狭缝公共电极的构图工艺,降低了生产成本。
结合图2-5所示,作为一个具体的实施例,ADS模式的TFT阵列基板的制备方法具体包括:
步骤a,在衬底基板10上形成栅金属层,通过第一次构图工艺形成栅金属层的图形,具体的,首先在栅金属层上涂覆光刻胶,采用普通掩膜版对光刻胶进行曝光,显影,形成光刻胶保留区域和光刻胶不保留区域,其中,光刻胶保留区域至少对应栅电极2、第一连接图案100和第三连接图案200所在的区域,光刻胶不保留区域对应其他区域,然后通过刻蚀工艺去除光刻胶不保留区域的栅金属层,剥离剩余的光刻胶,形成栅电极2、第一连接图案100和第三连接图案200,如图2所示。
其中,第一连接图案100和第一透明导电层电性连接,第三连接图案200和源漏金属层电性连接。
步骤b,在栅金属层上形成栅绝缘层20,通过第二次构图工艺形成栅绝缘层的图形,具体的,首先在栅绝缘层20上涂覆第一光刻胶40,采用半色调或灰色调掩膜版对第一光刻胶40进行曝光,显影,形成第一光刻胶部分保留区域、第一光刻胶完全保留区域和第一光刻胶不保留区域,其中,第一光刻胶部分保留区域至少对应像素电极所在的区域,第一光刻胶不保留区域至少对应第一过孔所在的区域,第一光刻胶完全保留区域对应其他区域,如图2所示,然后通过刻蚀工艺去除第一光刻胶不保留区域的栅绝缘层20,形成第一过孔21和22,露出第一连接图案100和第三连接图案200,如图3所示,最后通过灰化工艺去除第一光刻胶部分保留区域的光刻胶,形成像素电极的图案,如图4所示;
步骤c,在第一光刻胶上形成第二透明导电层,剥离剩余的光刻胶,形成像素电极6,第二透明导电层还形成于第一过孔21在第一连接图案100的位置处,如图5所示;
步骤d,在像素电极6上形成有源层,通过第三次构图工艺形成TFT的有源层图案5,如图5所示;
步骤e,在有源层上形成源漏金属层,通过第四次构图工艺形成源漏金属层的图形,具体的,首先在源漏金属层上涂覆光刻胶,采用普通掩膜版对光刻胶进行曝光,显影,形成光刻胶保留区域和光刻胶不保留区域,其中,光刻胶不保留区域至少对应源电极3、漏电极4、第一电性连接图案102、第二连接图案300和第四连接图案201所在的区域,光刻胶保留区域对应其他区域,然后通过刻蚀工艺去除光刻胶保留区域的源漏金属层,形成源电极3、漏电极4、第一电性连接图案102、第二连接图案300和第四连接图案201,第四连接图案201通过第一过孔12与第三连接图案200连接,实现栅金属层和源漏金属层的电性连接,结合图5和图6所示;
步骤f,在源漏金属层上形成第二绝缘层30,通过第五次构图工艺形成第二绝缘的图形和第二透明导电层的图形,具体的,首先在第二绝缘层30上涂覆第二光刻胶40,采用调掩膜版对第二光刻胶40进行曝光,显影,形成第二光刻胶部分保留区域、第二光刻胶完全保留区域和第二光刻胶不保留区域,其中,第二光刻胶不保留区域至少对应过渡过孔和第二过孔所在的区域,第二光刻胶部分保留区域至少对应狭缝公共电极所在的区域,第二光刻胶完全保留区域对应其他区域,然后通过刻蚀工艺去除第二光刻胶不保留区域的第二绝缘层,形成过渡过孔8和第二过孔11,分别露出第一电性连接图案102和第二连接图案300,之后通过灰化工艺去除第二光刻胶部分保留区域的光刻胶,形成狭缝公共电极的图案,如图7所示。
步骤g,在第二光刻胶上形成第一透明导电层,剥离剩余的第二光刻胶,形成狭缝公共电极7、第五连接图案101和第六连接图案301。其中,第五连接图案101依次通过第二过孔7、第一电性连接图案102与第一连接图案100连接,实现透明导电层和栅金属层的连接。第六连接图案301通过第二过孔11与第二连接图案300连接,实现透明导电层和源漏金属层的连接。
步骤a-g通过五次构图工艺即完成ADS模式显示装置的制备,并实现透明导电层、源漏金属层和栅金属层之间的两两电性连接,同时还避免了浅孔出现过刻和坡度角异常的问题。由于栅金属层、源漏金属层和透明导电层之间通过源漏金属层电性连接,替代了现有技术中的透明导电层,减小了过孔金属连接电阻,改善了显示面板的显示品质,使显示面板的生产良率以及性能得到了有效提升。
本领域的技术人员很容易推出,本发明的技术方案还可以用于实现4个以上导电层之间的两两电性连接,并同时避免浅孔出现过刻和坡度角异常的问题,具体的实现方式与上述相同,在此不再赘述。
本发明的技术方案,在通过过孔电性连接不相邻的两个导电层时,通过多次刻蚀工艺分别刻蚀相邻导电层之间的绝缘层,形成位置对应的绝缘层过孔,以实现不相邻的导电层之间的电性连接。同时,在每次刻蚀工艺中,还可以完成相邻导电层之间通过过孔的电性连接。即在通过过孔电性连接至少三个导电层时,每次刻蚀工艺中均仅刻蚀相邻导电层之间的绝缘层,不会存在深孔和浅孔的区别,避免了浅孔出现过刻和坡度角异常的问题,提高了产品的良率和品质。进一步地,通过绝缘层的构图工艺同时形成位于其上方导电层的图形,并保留没有图形区域的光刻胶,在形成导电层后,通过剥离光刻胶的方式即可形成导电层的图案,虽然增加了绝缘层的构图工艺,但省略了其上方导电层的构图工艺,不会增加生产成本。
实施例二
基于同一发明构思,本实施例中提供一种阵列基板,包括依次形成于一衬底基板上的第一金属层,第一绝缘层,第二金属层,第二绝缘层,第一导电层,其中,所述第一金属层包括第一连接图案,所述第一绝缘层包括第一过孔,所述第二金属层包括第二连接图案,所述第二绝缘层包括过渡过孔和第二过孔,其中,所述第一过孔对应于第一连接图案的位置,所述过渡过孔对应于第一过孔的位置,所述第一金属层通过所述第一过孔和所述过渡过孔而与所述第一导电层电性连接;所述第二过孔对应于第二连接图案的位置,所述第二金属层通过所述第二过孔而与所述第一导电层电性连接。
上述技术方案中,为了电性连接不相邻的第一金属层和第一导电层,通过第一次刻蚀工艺在第一金属层上方的第一绝缘层上形成第一过孔,暴露出第一金属层的连接图案,之后在第一绝缘层上形成第二金属层的连接图案。然后再通过第二次刻蚀工艺在第二金属层上方的第二绝缘层上形成过渡过孔和第二过孔,暴露出第一金属层的连接图案和第二金属层的连接图案,从而在第二绝缘层上形成第一导电层时,第一导电层通过过渡过孔与第一金属层的连接图案连接,实现不相邻第一金属层和第一导电层的电性连接,通过第二过孔与第二金属层的连接图案连接,实现相邻第二金属层和第一导电层的电性连接。通过第一次刻蚀工艺还可以同时完成相邻第一导电层和第二导电层的电性连接。由于每次刻蚀工艺中的刻蚀深度相同,不会存在深孔和浅孔的区别,避免了浅孔出现过刻和坡度角异常的问题,提高了产品的良率和品质。
对于TFT阵列基板,具体的,所述第一导电层为栅金属层,还包括栅电极;所述第二导电层为源漏金属层,还包括源电极和漏电极,所述第三导电层为第一透明导电层(如氧化铟锡、氧化铟锌)。相应的,第一绝缘层即为栅绝缘层。通过本发明的技术方案可以实现TFT阵列基板上栅金属层、源漏金属层和透明导电层之间的两两电性连接或三者之间的电性连接。
进一步地,在所述第一过孔和所述过渡过孔之间具有第一电性连接图案,所述第一电性连接图案与源漏金属层(即第二金属层)是相同材料形成,则栅金属层(即第一金属层)通过所述第一过孔、所述第一电性连接图案和所述过渡过孔而与第一透明导电层(即第一导电层)电性连接。由于连接栅金属层和第一透明导电层的第一电性连接图案为源漏金属,降低了过孔连接金属电阻,改善了阵列基板的显示品质,使整个阵列基板的生产良率以及最终显示面板的性能得到有效提升。
对于ADS模式的TFT阵列基板,其包括像素电极和公共电极。由于增加了栅绝缘的构图工艺,势必会增加生产成本。为了不增加生产成本,本实施例中像素电极与栅绝缘层的图形为通过一次构图工艺形成,具体的,像素电极由第二导电层形成,且所述第二导电层为高透光率的第二透明导电层,其中,所述第二透明导电层还形成于所述第一过孔在所述第一连接图案的位置处。
通过一次构图工艺形成像素电极与栅绝缘层的图形的步骤具体包括:
在栅绝缘层上涂覆第一光刻胶,采用半色调或灰色调掩膜版对第一光刻胶进行曝光,显影,形成第一光刻胶部分保留区域、第一光刻胶完全保留区域和第一光刻胶不保留区域,其中,第一光刻胶部分保留区域至少对应像素电极所在的区域,第一光刻胶不保留区域至少对应第一过孔所在的区域,第一光刻胶完全保留区域对应其他区域;
通过刻蚀工艺去除第一光刻胶不保留区域的第一绝缘层,形成第一过孔;
通过灰化工艺去除第一光刻胶部分保留区域的光刻胶,形成像素电极的图案;
在第一光刻胶上形成第二透明导电层,剥离剩余的光刻胶,形成像素电极。
其中,第二透明导电层位于源漏金属层下方。
通过上述步骤形成的漏电极位于像素电极的上方,并与像素电极以搭接的方式电性连接。而第一透明导电层还包括狭缝公共电极,狭缝公共电极位于像素电极的上方。
如图8所示,本实施例中ADS模式的TFT阵列基板具体包括:
衬底基板10;
图形化的栅金属层,形成在衬底基板10上,包括栅电极2、第一连接图案100、第三连接图案200,其中,第一连接图案100和第一透明导电层电性连接,第三连接图案200和源漏金属层电性连接;
有源层图案5,形成在栅金属层上,与栅电极2的位置对应;
图形化的栅绝缘层和图形化的第二透明导电层,依次形成在栅金属层上,并为通过一次构图工艺形成,其中,栅绝缘层包括多个第一过孔,露出第一连接图案100和第三连接图案200;第二透明导电层包括像素电极6,还包括形成于所述第一过孔在所述第一连接图案的位置处的图形;
图形化的源漏金属层,形成在第二透明导电层上,源漏金属层包括源电极3、漏电极4、第一电性连接图案102、第二连接图案300和第四连接图案201,漏电极4通过搭接的方式与像素电极6电性连接,第一电性连接图案102通过第一过孔与第一连接图案100电性连接,第四连接图案201通过第一过孔与第三连接图案200电性连接,实现相邻栅金属层和源漏金属层的电性连接;
图形化的第二绝缘层,形成在源漏金属层上,第二绝缘层包括过渡过孔8和第二过孔11,露出第一电性连接图案102和第二连接图案300;
图形化的第一透明导电层,形成在第二绝缘层上,第一透明导电层包括狭缝公共电极7、第五连接图案101和第六连接图案301,第五连接图案101依次通过第二过孔8、第一电性连接图案102与第一连接图案100电性连接,实现不相邻栅金属层和第一透明导电层的电性连接,第六连接图案301通过第二过孔11与第二连接图案300电性连接,实现相邻源漏金属层和第一透明导电层的电性连接。
其中,栅电极2、栅绝缘层、有源层图案5、源电极3和漏电极4组成TFT1。
实施例三
本实施例中提供一种显示装置,其采用实施例二中的阵列面板,由于克服了通过过孔电性连接阵列基板上不相邻的导电层时,出现浅孔过刻和坡度角异常的问题,提高了显示装置的显示品质。
在本发明各方法实施例中,所述各步骤的序号并不能用于限定各步骤的先后顺序,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,对各步骤的先后变化也在本发明的保护范围之内。
以上所述是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明所述原理的前提下,还可以作出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。

Claims (9)

1.一种阵列基板的制备方法,其特征在于,包括: 
在一衬底基板上形成第一金属层,对所述第一金属层进行构图工艺,形成包括第一连接图案的图形; 
在第一金属层上形成第一绝缘层,对所述第一绝缘层进行构图工艺,形成多个第一过孔,所述第一过孔对应于所述第一连接图案的位置; 
在第一绝缘层上形成第二金属层,对所述第二金属层进行构图工艺,形成包括第二连接图案的图形; 
在第二金属层上形成第二绝缘层,对所述第二绝缘层进行构图工艺,形成多个过渡过孔和第二过孔,其中,所述过渡过孔对应于所述第一过孔的位置,所述第二过孔对应于所述第二连接图案的位置; 
在第二绝缘层上形成包括第一导电层的图形。 
2.根据权利要求1所述的制备方法,其特征在于,所述在第一金属层上形成第一绝缘层,对所述第一绝缘层进行构图工艺,形成多个第一过孔具体包括: 
在所述第一绝缘层上涂覆第一光刻胶,采用半色调或灰色调掩膜版对第一光刻胶进行曝光,显影,形成第一光刻胶不保留区域,其中,第一光刻胶不保留区域至少对应第一过孔所在的区域; 
通过刻蚀工艺去除第一光刻胶不保留区域的第一绝缘层,形成第一过孔。 
3.根据权利要求2所述的制备方法,其特征在于,所述在栅金属层上形成第一绝缘层,对所述第一绝缘层进行构图工艺,形成多个第一过孔的步骤还包括:在第一绝缘层上形成包括第二导电层的图形。 
4.根据权利要求3所述的制备方法,其特征在于,在第一绝缘层上形成包括第二导电层的图形具体包括: 
采用半色调或灰色调掩膜版对第一光刻胶进行曝光,显影,还形成第一光刻胶部分保留区域,其中,第一光刻胶部分保留区域至少对应第二导电层的图形所在的区域; 
通过灰化工艺去除第一光刻胶部分保留区域的光刻胶,在光刻胶上形成第二透明导电薄膜,剥离剩余的光刻胶,形成包括第二导电层的图形。 
5.根据权利要求1所述的制备方法,其特征在于,在第二金属层上形成第二绝缘层,对所述第二绝缘层进行构图工艺,形成多个过渡过孔和第二过孔具体包括: 
在所述第二绝缘层上涂覆第二光刻胶,采用半色调或灰色调掩膜版对光刻胶进行曝光,显影,形成第二光刻胶不保留区域,其中,第二光刻胶不保留区域至少对应第一过孔所在的区域; 
通过刻蚀工艺去除第二光刻胶不保留区域的第二绝缘层,形成所述过渡过孔和所述第二过孔,所述过渡过孔对应于所述第一过孔的位置。 
6.一种阵列基板,其特征在于,包括: 
依次形成于一衬底基板上的第一金属层,第一绝缘层,第二金属层,第二绝缘层,第一导电层,其中,所述第一金属层包括第一连接图案,所述第一绝缘层包括第一过孔,所述第二金属层包括第二连接图案,所述第二绝缘层包括过渡过孔和第二过孔,其中,所述第一过孔对应于第一连接图案的位置,所述过渡过孔对应于第一过孔的位置,所述第一金属层通过所述第一过孔和所述过渡过孔而与所述第一导电层电性连接;所述第二过孔对应于第二连接图案的位置,所述第二金属层通过所述第二过孔而与所述第一导电层电性连接。 
7.根据权利要求6所述的阵列基板,其特征在于,在所述第一绝缘层上还包括第二导电层,所述第二导电层还形成于所述第一过孔在所述第一连接图案的位置处。 
8.根据权利要求6所述的阵列基板,其特征在于,在所述第一过孔和所述过渡过孔之间具有第一电性连接图案,所述第一电性连接图案与所述第二金属层是相同材料形成,所述第一金属层通过所述第一过孔、所述第一电性连接图案和所述过渡过孔而与所述第一导电层电性连接。 
9.一种显示装置,包括权利要求6-8任一项所述的阵列基板。 
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