CN103518424B - 电子部件安装方法、电子部件搭载装置以及电子部件安装系统 - Google Patents

电子部件安装方法、电子部件搭载装置以及电子部件安装系统 Download PDF

Info

Publication number
CN103518424B
CN103518424B CN201280022190.6A CN201280022190A CN103518424B CN 103518424 B CN103518424 B CN 103518424B CN 201280022190 A CN201280022190 A CN 201280022190A CN 103518424 B CN103518424 B CN 103518424B
Authority
CN
China
Prior art keywords
mentioned
electronic unit
substrate
aforesaid substrate
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201280022190.6A
Other languages
English (en)
Other versions
CN103518424A (zh
Inventor
佐伯翼
和田义之
本村耕治
境忠彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Intellectual Property Management Co Ltd
Original Assignee
Panasonic Intellectual Property Management Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Intellectual Property Management Co Ltd filed Critical Panasonic Intellectual Property Management Co Ltd
Publication of CN103518424A publication Critical patent/CN103518424A/zh
Application granted granted Critical
Publication of CN103518424B publication Critical patent/CN103518424B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04Mounting of components, e.g. of leadless components
    • H05K13/046Surface mounting
    • H05K13/0465Surface mounting by soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1182Applying permanent coating, e.g. in-situ coating
    • H01L2224/11822Applying permanent coating, e.g. in-situ coating by dipping, e.g. in a solder bath
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205Shape
    • H01L2224/32052Shape in top view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3312Layout
    • H01L2224/3315Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/33154Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry covering only portions of the surface to be connected
    • H01L2224/33155Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7515Means for applying permanent coating, e.g. in-situ coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7515Means for applying permanent coating, e.g. in-situ coating
    • H01L2224/75161Means for screen printing, e.g. roller, squeegee, screen stencil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/756Means for supplying the connector to be connected in the bonding apparatus
    • H01L2224/75611Feeding means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/79Apparatus for Tape Automated Bonding [TAB]
    • H01L2224/7901Means for cleaning, e.g. brushes, for hydro blasting, for ultrasonic cleaning, for dry ice blasting, using gas-flow, by etching, by applying flux or plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009Pre-treatment of the bump connector or the bonding area
    • H01L2224/8101Cleaning the bump connector, e.g. oxide removal step, desmearing
    • H01L2224/81011Chemical cleaning, e.g. etching, flux
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009Pre-treatment of the bump connector or the bonding area
    • H01L2224/81024Applying flux to the bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81143Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81192Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/8121Applying energy for connecting using a reflow oven
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81499Material of the matrix
    • H01L2224/81594Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/815 - H01L2224/81591
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81598Fillers
    • H01L2224/81599Base material
    • H01L2224/816Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81986Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83104Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus by applying pressure, e.g. by injection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/9205Intermediate bonding steps, i.e. partial connection of the semiconductor or solid-state body during the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9211Parallel connecting processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10977Encapsulated connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3489Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

电子部件安装方法,包括:准备具有设置有多个凸块的主面的电子部件的工序;准备具有与多个凸块对应的多个电极的基板的工序;在多个凸块上涂覆助熔剂的工序;以多个凸块经由上述助熔剂分别降落到对应的电极上的方式,将电子部件向基板搭载的工序;在搭载了电子部件的基板的与电子部件的周边缘部对应的至少一个加强位置上,以与周边缘部接触的方式,供给热硬化性树脂的工序;以及对搭载了电子部件的基板进行加热,使凸块熔融,并且使热硬化性树脂硬化、冷却,由此将电子部件与基板接合的工序。

Description

电子部件安装方法、电子部件搭载装置以及电子部件安装 系统
技术领域
本发明涉及将具有多个凸块的电子部件搭载或者安装到基板上的方法以及装置。
背景技术
在电子设备中设置有各种电子部件,这些电子部件在与具有多个电极、导线框架的基板的规定位置接合的状态下,作为安装构造体内置于设备。随着近年来的电子设备的小型化,设备中所设置的电子部件的小型化发展,因此倒装芯片、芯片尺寸封装(CSP)等小型的电子部件被搭载到基板上的情况增多。
倒装芯片、CSP等电子部件,具有规则地排列有多个端子的主面,在各端子上形成有焊锡制的凸块。在将这种电子部件向基板安装时,使凸块与称为焊盘的基板的电极接触并加热,在使其熔融(回流焊)之后,通过冷却,进行电子部件与基板之间的相互连接。由此,电子部件的各端子与基板的电极电导通,并且电子部件通过焊锡接合部保持在基板上。
在安装构造体上,除了倒装芯片、CSP等电子部件以外,较多情况下还安装有称为芯片电阻、芯片LED、芯片电容器等的电子部件。这种电子部件为,通过丝网印刷等方法,在向基板的电极上涂覆了含有金属粒子的浆料(例如膏状焊锡)之后,搭载到涂覆了浆料的电极上。然后,通过回流焊,使金属粒子熔融,并进行冷却,由此电子部件与基板接合。含有金属粒子的浆料向基板的电极的涂覆,一般在将倒装芯片、CSP等电子部件搭载在基板上之前进行。
当对于通过上述那样的安装工序而得到的由基板和电子部件构成的安装构造体,施加基于热循环的热应力、外力时,在通过凸块而与基板接合的电子部件中,有时焊锡接合部的强度不足。因此,通过加强用树脂,将电子部件粘合在基板上,而对焊锡接合部进行加强。
作为通过加强用树脂对焊锡接合部进行加强的方法,存在使底层填料向电子部件的设置有多个凸块的主面与基板之间的间隙的整体中侵入的方法。但是,底层填料需要在通过回流焊工序进行了电子部件与基板之间的相互连接之后,向电子部件与基板之间的间隙注入。因此,另外需要用于使底层填料热硬化的加热,安装工序的工时变多。此外,由于底层填料的附着面积较大,在对安装构造体进行修理时产生不便。并且,在对具有通过底层填料加强的焊锡接合部的基板再次进行回流焊时,在底层填料的间隙中容易产生焊锡飞溅物。
因此,提出有如下方法:在将电子部件向基板搭载之前,预先仅向与电子部件的周边缘部对应的基板的位置供给加强用树脂(参照专利文献1)。在该方法中,在回流焊时,能够在焊锡接合的同时使加强用树脂硬化,并且在安装构造体的修理变得容易的方面、在再次回流焊时难以产生焊锡飞溅物的方面也较优良。
现有技术文献
专利文献
专利文献1:日本特开2003-218508号公报
发明内容
发明要解决的课题
在搭载电子部件的基板上,以与电子部件的凸块对应的方式,多个电极被规则地设置为矩阵状。在专利文献1中,在电子部件搭载到基板上之前,在最外周的电极的外侧的多个加强位置上,涂覆加强用树脂。然后,以被涂覆了助熔剂的凸块降落到电极上的方式,将电子部件搭载到基板上。此时,使加强用树脂与电子部件的周边缘部接触,由此加强用树脂在回流焊工序之前的期间,作为将电子部件固定在基板上的粘合剂起作用。此外,在回流焊后,加强用树脂成为对于焊锡接合部的加强部。
如上述那样,在将电子部件搭载到基板上之前向基板涂覆加强用树脂的情况下,加强用树脂与基板上所设置的电极接触。当产生这种接触时,加强用树脂向凸块与电极之间侵入。当在该状态下进行回流焊时,加强用树脂成为障碍,助熔剂不能够与电极充分接触。作为其结果,熔融的凸块不能够向电极充分地浸润扩展,有时会成为接合不合格(导通不合格、接合强度不足)。随着近年的电子部件的小型化,难以避免上述那样加强用树脂与基板上所设置的电极之间的接触。
用于解决课题的手段
因此,本发明的目的在于,提供能够以较少工时来避免电子部件与基板之间的接合不合格的电子部件安装方法、电子部件搭载装置以及电子部件安装系统。
本发明的一个方面涉及一种电子部件安装方法,包括:
准备具有设置有多个凸块的主面的第一电子部件的工序;
准备具有与上述多个凸块对应的多个第一电极的基板的工序;
对上述多个凸块涂覆助熔剂的工序;
以上述多个凸块经由上述助熔剂分别降落到对应的上述第一电极上的方式,将上述第一电子部件搭载到上述基板上的工序;
在搭载有上述第一电子部件的基板的与上述第一电子部件的周边缘部对应的至少一个加强位置上,以与上述周边缘部接触的方式供给热硬化性树脂的工序;以及
对搭载了上述第一电子部件的上述基板进行加热,使上述凸块熔融,并且使上述热硬化性树脂硬化、冷却,由此将上述第一电子部件与上述基板接合的工序。
本发明的其他方面涉及一种电子部件搭载装置,将具有设置有多个凸块的主面的第一电子部件,向具有与上述多个凸块对应的多个第一电极的基板搭载,在该电子部件搭载装置中,具备:
第一部件供给部,供给上述第一电子部件;
基板保持部,对上述基板进行保持并定位;
转印单元,供给助熔剂的涂膜;
能够移动的搭载头,将供给的上述第一电子部件向上述基板搭载;
能够移动的涂覆头,供给热硬化性树脂;以及
控制部,对上述搭载头和上述涂覆头的移动以及动作进行控制;
通过上述控制部的指令,上述搭载头进行如下动作:在通过上述转印单元向上述第一电子部件的上述多个凸块转印了上述助熔剂的涂膜之后,以上述多个凸块经由上述助熔剂分别降落到对应的上述第一电极上的方式,将上述第一电子部件向上述基板搭载,并且上述涂覆头进行如下动作:在搭载了上述第一电子部件的基板上的与上述第一电子部件的周边缘部对应的至少一个加强位置上,以与上述周边缘部接触的方式供给上述热硬化性树脂。
本发明的另一个其他方面涉及一种电子部件安装方法,将具有设置有多个凸块的主面的第一电子部件以及具有连接用端子的第二电子部件,向具有与上述多个凸块对应的多个第一电极以及与上述连接用端子对应的第二电极的基板上安装,在电子部件安装方法中,包括:
准备上述基板的工序;
在上述基板的上述第二电极上通过丝网印刷涂覆含有金属粒子的浆料的工序;
准备上述第一电子部件的工序;
准备上述第二电子部件的工序;
在上述多个凸块上涂覆助熔剂的工序;
以上述多个凸块经由上述助熔剂分别降落到对应的上述第一电极上的方式,将上述第一电子部件搭载到上述基板上的工序;
在搭载了上述第一电子部件的基板的与上述第一电子部件的周边缘部对应的至少一个加强位置上,以与上述周边缘部接触的方式供给热硬化性树脂的工序;
以上述连接用端子经由含有上述金属粒子的浆料降落到上述第二电极上的方式,将上述第二电子部件搭载到上述基板上的工序;以及
对搭载了上述第一电子部件以及上述第二电子部件的上述基板进行加热,使上述凸块以及上述金属粒子熔融,并且使上述热硬化性树脂硬化、冷却,由此将上述第一电子部件以及上述第二电子部件与上述基板接合的工序。
本发明的另一个其他方面为一种电子部件安装系统,将具有设置有多个凸块的主面的第一电子部件以及具有连接用端子的第二电子部件,向具有与上述多个凸块对应的多个第一电极以及与上述连接用端子对应的第二电极的基板上安装,在该电子部件安装系统中,具备:
基板供给装置,供给上述基板;
丝网印刷装置,在从上述基板供给装置搬出的上述基板的上述第二电极上通过丝网印刷涂覆含有金属粒子的浆料;
电子部件搭载装置,向从上述丝网印刷装置搬出的上述基板的上述第一电极上搭载上述第一电子部件,并且向涂覆了含有上述金属粒子的浆料的第二电极上搭载第二电子部件;以及
回流焊装置,对从上述电子部件搭载装置搬出的上述基板进行加热,使上述凸块以及金属粒子熔融,并且使上述热硬化性树脂硬化,
上述电子部件搭载装置具备:
第一部件供给部,供给上述第一电子部件;
第二部件供给部,供给上述第二电子部件;
基板保持部,对上述基板进行保持并定位;
转印单元,供给助熔剂的涂膜;
能够移动的搭载头,将上述供给的第一电子部件以及第二电子部件向上述基板上搭载;
能够移动的涂覆头,供给热硬化性树脂;以及
控制部,对上述搭载头和上述涂覆头的移动以及动作进行控制,
通过上述控制部的指令,上述搭载头进行如下动作:在通过上述转印单元向上述第一电子部件的上述多个凸块转印了上述助熔剂的涂膜之后,以上述多个凸块经由上述助熔剂分别降落到对应的上述电极上的方式,将上述第一电子部件向上述基板进行搭载,并且以上述连接用端子经由含有上述金属粒子的浆料降落到上述第二电极上的方式,将上述第二电子部件向上述基板进行搭载,并且上述涂覆头进行如下动作:向搭载了上述第一电子部件的基板的与上述第一电子部件的周边缘部对应的至少一个加强位置上,以与上述周边缘部接触的方式供给热硬化性树脂。
发明的效果
根据本发明,在将电子部件搭载到基板上之后,向与电子部件的周边缘部对应的加强位置供给热硬化性树脂,因此即使在热硬化性树脂与基板上所设置的电极或者凸块接触的情况下,也能够抑制热硬化性树脂向电极与凸块之间侵入。因此,在回流焊时,熔融的凸块将电极充分浸润,因此确保焊锡接合部的导通和足够的接合强度。
将本发明的新特征记载于后附的请求范围中,但本发明关于构成以及内容的双方,与本申请的其他目的以及特征一起,通过对附图进行比较的以下详细说明能更好地理解。
附图说明
图1A是具有多个凸块的第一电子部件的一个例子的主视图。
图1B是该电子部件的仰视图。
图1C是芯片型的第二电子部件的一个例子的立体图。
图2是表示本发明一个实施方式的将第一电子部件以及第二电子部件向基板搭载的电子部件安装方法的工序的说明图。
图3是表示本发明一个实施方式的电子部件安装系统的整体像的图。
图4是从上方观察本发明一个实施方式的电子部件搭载装置的构成图。
图5是转印单元的俯视图。
图6是转印单元的X-X线截面图。
图7是表示将第一电子部件以及第二电子部件向基板搭载的顺序的流程图。
图8是表示将第一电子部件向基板搭载的工序的说明图。
图9是本发明一个实施方式的电子部件搭载装置的控制系统图。
图10是表示将搭载了第一电子部件的基板通过回流焊工序进行加热时的焊锡接合部的状态的概念图。
图11A是在4个位置的加强位置上涂覆了加强用树脂的矩形的第一电子部件的俯视图。
图11B是该电子部件的仰视图。
图12是例示加强用树脂的涂覆图案的图。
具体实施方式
首先,对基板所搭载的电子部件的构造进行说明。
图1A是第一电子部件200的一个例子的主视图,图1B是其仰视图。第一电子部件200是通过多个凸块204与基板101的电极(焊盘)连接的球栅阵列(BGA)型的电子部件。第一电子部件200具备较薄的基板(部件内基板)201、其上表面上所安装的半导体元件202以及覆盖半导体元件202的密封树脂203。部件内基板201的下表面构成第一电子部件的主面201s,在主面201s上多个端子规则地排列为矩阵状,在各个端子上设置有凸块204。
此外,第一电子部件的构造不限定于图1A以及图1B所示的构造。例如,各种方式的倒装芯片、芯片尺寸封装(CSP)的部件等包含于第一电子部件。
图1C是将与第一电子部件200一起搭载到基板101上的第二电子部件210的一个例子的立体图。第二电子部件是具有至少一个连接用端子211的芯片型部件、例如芯片电阻、芯片LED、芯片电容器等。
接下来,对本发明的电子部件安装方法进行说明。
本发明的电子部件安装方法包括:准备具有设置有多个凸块204的主面的第一电子部件200的工序;准备具有与多个凸块204对应的多个第一电极的基板101的工序;在多个凸块204上涂覆助熔剂的工序;以多个凸块204经由助熔剂分别降落到对应的第一电极上的方式,将第一电子部件200向基板101搭载的工序;在搭载了第一电子部件200的基板101的与第一电子部件200的周边缘部对应的至少一个加强位置,以与周边缘部接触的方式,供给热硬化性树脂的工序;以及对搭载了第一电子部件200的基板101进行加热,使凸块204熔融,并且使热硬化性树脂硬化,并进行冷却,由此将第一电子部件200与基板101接合的工序。
本发明的电子部件安装方法还可以进一步包括:准备具有连接用端子211的第二电子部件210的工序;在将第一电子部件200向基板101搭载之前,在基板101上所设置的与连接用端子211对应的第二电极上,通过丝网印刷涂覆含有金属粒子的浆料的工序;以及以连接用端子211经由含有金属粒子的浆料降落到第二电极上的方式,将第二电子部件210向基板101搭载的工序。
以下,以在基板101上搭载第一电子部件200和第二电子部件210的情况为例进行说明。
如图2(a)所示那样,在基板101上设置有与第一电子部件200的凸块204连接的第一电极102a以及与第二电子部件210的端子211连接的第二电极102b。
首先,将第一电极102a用掩膜遮挡等,而在第二电极102b上,通过丝网印刷等方法,如图2(b)所示那样,涂覆含有金属粒子(例如焊锡粒子)的浆料103。
接下来,在第一电子部件200的多个凸块204上涂覆了助熔剂206之后,如图2(c)所示那样,将第一电子部件200搭载在基板上。此时,多个凸块204全部经由助熔剂206分别降落到对应的第一电极102a上。因此,除了多个凸块204以外,全部第一电极102a成为被助熔剂206充分浸润的状态。此外,在多个凸块204上涂覆助熔剂206的方法不特别限定,但优选将使用刮板而形成为平坦面的助熔剂206的涂膜向凸块204转印的方式。
然后,如图2(d)所示那样,在搭载有第一电子部件200的基板101上,在与第一电子部件200的周边缘部201x对应的至少一个加强位置104上,以与周边缘部201x接触的方式,作为加强用树脂105供给热硬化性树脂。此时,在第一电极102a上已经搭载有凸块204,因此防止加强用树脂105向第一电极102a与凸块204之间侵入。因此,维持第一电极102a与凸块204通过助熔剂206连接的状态。此外,多个加强位置104不在周边缘部201x的整体上,而例如优选与具有矩形的主面201s的第一电子部件200的4角或者其附近对应地设置多个。
然后,如图2(e)所示那样,第二电子部件210搭载在基板101上。但是,搭载第二电子部件210可以在搭载第一电子部件200之前之后的任意一方进行。
搭载了第一电子部件200以及第二电子部件210的基板101,通过回流焊装置加热。如上述那样,在涂覆热硬化性树脂105之前,预先使凸块204降落到第一电极102a上,由此能够抑制热硬化性树脂105向凸块204与第一电极102a之间侵入,因此在第一电极102a与凸块204通过助熔剂206连接的状态下凸块204被回流焊。因此,熔融的凸块向第一电极102a充分地浸润扩展,确保焊锡接合部的导通和足够的接合强度。此外,通过回流焊,浆料103中的金属粒子也熔融,并向第二电极102b浸润扩展。当回流焊工序结束时,焊锡被冷却而硬化,第一电子部件200以及第二电子部件210的各个端子与基板101的对应的电极接合。
在回流焊工序中,优选以自对准的效果不会被加强用树脂105阻碍的方式、使加强用树脂105是在通过熔融的凸块将第一电极102a充分浸润之后进行热硬化的调配。热硬化前的加强用树脂105的粘度具有随着温度上升而降低的趋势。因此,使加强用树脂105的硬化反应比凸块204的熔融延迟,容易得到基于熔融的凸块的自对准的效果。例如,通过使加强用树脂105的硬化温度比凸块204的熔融温度(熔点)高,由此能够可靠地得到自对准的效果。
图3表示用于实施本发明的电子部件安装方法的电子部件安装系统(电子部件安装线)的一个例子的整体像。
电子部件安装系统300具备:基板供给装置301,供给用于安装电子部件的基板;丝网印刷装置302,在从基板供给装置301搬出的基板的规定的电极(第二电极102b)上,通过丝网印刷涂覆含有金属粒子的浆料;电子部件搭载装置303,在从丝网印刷装置302搬出的基板的、与上述规定的电极不同的电极(第一电极102a)上,搭载第一电子部件,并且在涂覆了含有金属粒子的浆料的电极上搭载第二电子部件;以及回流焊装置304,对从电子部件搭载装置303搬出的基板进行加热,将第一电子部件以及第二电子部件与基板接合。从回流焊装置304搬出的基板、即安装构造体由基板回收装置305回收。
图4是从上方观察构成电子部件安装系统300的电子部件搭载装置303的构成图。电子部件搭载装置303具备:供给第一电子部件200的第一部件供给部307;供给第二电子部件210的第二部件供给部308;对基板101进行保持并定位的基板保持部309;供给助熔剂的涂膜的转印单元310;以及配置它们的基台303a。
电子部件搭载装置303进一步具备:能够移动的搭载头311,将所供给的第一电子部件200以及第二电子部件210向基板101搭载;能够移动的涂覆头312,作为加强用树脂105而供给热硬化性树脂;以及控制部313,对搭载头311和涂覆头312的移动以及动作进行控制。搭载头311和涂覆头312由专用的XY移动机构(未图示)支撑,通过控制部313对XY移动机构的控制,而在基台303a的上方空间进行移动。
第一部件供给部307的构造不特别限定,但例如具备托盘供给部,该托盘供给部将承载了配置为格子状的多个第一电子部件200的托盘向搭载头311的拾取位置供给。
第一电子部件200是图1A、B所示那样的、具有设置有多个凸块204的主面201s的BGA型的比较小型的电子部件。
第二部件供给部308的构造也不特别限定,但例如具备带供给部,该带供给部将以规定间隔保持多个第二电子部件210的带以规定的间距向搭载头311的拾取位置送出。第二电子部件210不特别限定,但是如图1C所示那样的、具有连接用端子的芯片部件等BGA型以外的电子部件。
对基板101进行保持并定位的基板保持部309,可以是任意的构造,但例如图4所示那样,由对保持了基板101的载体314进行搬送的基板搬送输送机315构成。基板搬送输送机315将基板101搬送到进行各电子部件的搭载的位置而进行定位,因此作为基板保持部309起作用。
搭载头311具备通过内置的升降机构来进行升降动作的吸引喷嘴。通过吸引喷嘴的升降动作和吸引,从第一部件供给部307、第二部件供给部308拾取第一电子部件200、第二电子部件210。此外,通过在基板101的规定位置的升降动作和吸引解除(真空破坏),由此电子部件被搭载到基板101上。
用于供给作为加强用树脂105的热硬化性树脂的能够移动的涂覆头312,内置有具有排出加强用树脂105的涂覆喷嘴的分配器、和使涂覆喷嘴升降的升降机构。此外,在本实施方式中构成为,涂覆头312由专用的XY移动机构支撑,在基台303a的上方空间移动。但是,也可以构成为,将涂覆头312与搭载头311一体化,并通过共用的XY移动机构在基台303a的上方空间移动。
根据来自控制部313的指令来控制搭载头311的移动以及搭载头311对电子部件的拾取、搭载等动作。同样,根据来自控制部313的指令来控制涂覆头312的移动以及从涂覆头312排出加强用树脂105等动作。控制部313包括存储对搭载头311以及涂覆头312的移动以及动作进行限制的程序的存储器313a、CPU或者MPU等中央计算装置313b、各种接口以及个人计算机等。
供给助熔剂的涂膜的转印单元310,具有能够供给适合于向第一电子部件200的凸块204进行转印的厚度的助熔剂的涂膜的机构即可,不特别限定。例如,如图5所示那样,具有设置在下方的基台320、设置在基台320的上表面上的转印台321;以及配置在转印台321上方的刮板单元323。刮板单元323具备具有与转印台的Y轴方向的宽度几乎相等的长度的第一刮板部件323a和第二刮板部件323b,它们分别隔开一定的间隔而与Y轴方向平行地配置。各刮板部件能够通过内置于刮板单元323的升降机构来升降,即能够相对于转印台321上所形成的涂膜进退。
如图6所示那样,在向第一刮板部件323a与第二刮板部件323b之间供给了助熔剂206之后,使刮板单元323向箭头方向移动,并且在规定的定时使第一刮板部件323a和第二刮板部件323b升降,由此供给助熔剂的涂膜。
接下来,沿着图7的流程图来说明第一电子部件200以及第二电子部件210向基板101搭载时的具体的流程。
控制部313为,当识别出基板101已被基板保持部309定位的情况时(SP1),开始以下那样的搭载头311的移动以及动作的控制。首先,搭载头311利用第一部件供给部307通过吸引喷嘴311a来拾取第一电子部件200(SP2),使第一电子部件200向转印单元310移动(SP3)。接下来,搭载头311使第一电子部件200的凸块204与转印单元310的转印台上所形成的涂膜接触,向凸块204转印助熔剂(SP4)。由此,如图8(a)所示那样,助熔剂206被涂覆到第一电子部件200的凸块204上。在向凸块204上转印助熔剂206时,优选以第一电子部件200降落到助熔剂的涂膜的规定的位置上的方式,进行对位的控制。考虑凸块204的大小、每一个凸块的涂覆量,来适当地调整助熔剂的涂膜的厚度。
接下来,搭载头311使第一电子部件200向基板101的第一电极102a的上方移动(SP5、图8(b)),以多个凸块204经由助熔剂206分别降落到对应的第一电极102a上的方式,将第一电子部件200向基板101搭载(SP6)。此时,如图8(c)那样,助熔剂206的一部分从凸块204向第一电极102a转印,助熔剂206填充在凸块204与第一电极102a之间。在将第一电子部件200向基板101的第一电极102a搭载时,也可以利用公知的图像识别系统,根据摄像信号来进行精密的对位。
控制部313为,在第一电子部件200被搭载到基板101上之后,开始以下那样的涂覆头312的移动以及动作的控制。首先,涂覆头312移动到第一电子部件200的上方,并进行对位(SP7)。为了进行精密的对位,对涂覆头312也可以利用图像识别系统。接下来,如图8(d)所示那样,涂覆头312向与第一电子部件200的周边缘部201x对应的基板101的加强位置104,经由涂覆喷嘴312a供给加强用树脂105(SP8)。此时,如果加强用树脂105不与第一电子部件200的周边缘部201x接触,则不能够得到足够的加强效果。此外,第一电子部件200的周边缘部201x例如是构成BGA型的电子部件的树脂基板201的周边缘部。
在基板101的与第一电子部件200的周边缘部201x对应的区域中,通常设定有多个加强位置104。在此,基板101的与第一电子部件200的周边缘部201x对应的区域是指,沿着具有多个凸块的主面201s的外形而在基板上设定的框状区域。加强位置104设定于该框状区域的规定位置。
如图8(d)所示那样,在涂覆头312具有小直径的涂覆喷嘴312a的情况下,优选从涂覆喷嘴312a按照分配方式,向加强位置104线状或者点状地供给加强用树脂105。此时,以所供给的加强用树脂105的量不会过多的方式进行加减,由此实现生产率的提高,修理也变得更容易。此外,能够抑制加强用树脂105的挤出等不良情况。
供给加强用树脂105的工序优选为,在将基板101上所搭载的第一电子部件200相对于基板101进行按压的同时来进行。例如,如图8(d)所示那样,在通过设置在涂覆头312的前端的按压端子312b对第一电子部件200进行按压的同时供给加强用树脂105。通过进行这种按压,能够抑制供给加强用树脂105时的第一电子部件200的位置偏移。按压端子312b为了不对第一电子部件200施加过度的压力,而优选由弹簧那样具有上下方向的弹性的部件构成。
优选以不仅与第一电子部件200的周边缘部201x、还与第一电极102a以及凸块204的至少一方接触的方式,向加强位置104供给加强用树脂105。由此,基板101、第一电子部件200、第一电极102a或者凸块204通过加强用树脂105而相互接合,加强的效果提高。
当要避免第一电极102a以及凸块204与加强用树脂105之间的接触时,需要极其高度地控制加强用树脂105的性状、涂覆量、供给位置等。第一电子部件200越小型,则这种控制越困难,越较大地阻碍生产率。另一方面,在本发明中,在将对凸块204涂覆了助熔剂206的第一电子部件200向基板101搭载之后供给加强用树脂105,因此不需要避免第一电极102a以及凸块204与加强用树脂105之间的接触。反而,在以与第一电极102a以及凸块204的至少一方接触的方式供给加强用树脂105的情况下,接合强度的提高、生产率的提高的优点较大。
但是,当加强用树脂105侵入第一电子部件200与基板101之间时,加强用树脂105的使用量变多,如底层填料的情况那样、修理的时间劳力也变多。此外,由于最外周的凸块由加强用树脂覆盖,因此再次回流焊时的焊锡飞溅物的产生风险提高。因此,优选使加强用树脂105仅与第一电子部件200的周边缘部201x附近、即规则地配置的第一电极102a或者凸块204中的最外周的第一电极102a或者凸块204接触。
一般的BGA型的第一电子部件的周边缘部的形状为矩形。在矩形的第一电子部件中,优选至少在与矩形的周边缘部的四角或者其附近对应的多个加强位置上,涂覆加强用树脂。通过这种配置来设定加强位置,即使使用少量的加强用树脂,也能够得到较大的加强效果。此外,由于加强的平衡良好,因此在第一电子部件受到冲击时,容易使在焊锡接合部产生的应力减少。
当加强用树脂105的涂覆结束时,接下来,搭载头311通过控制部313的控制,而利用第二部件供给部308来拾取第二电子部件210(SP9),使第二电子部件210向基板101的第二电极102b的上方移动(SP10),并以连接用端子降落到第二电极102b上的浆料103上的方式,将第二电子部件210向基板101搭载(SP11)。
此外,第二电子部件210向基板101的搭载,并不局限于上述顺序,也可以在第一电子部件200的搭载之前进行。
电子部件搭载装置303的构成不限定于图4所示的构成。例如,供给第二电子部件210的第二部件供给部308,根据需要而组装在电子部件搭载装置303中,但在本发明的电子部件搭载装置中不是必须的。即,在本发明中,也可以不进行与第二电子部件210相关的搭载头311的移动以及动作。
并且,如图9所示那样,控制部313不仅控制搭载头311以及涂覆头312,也可以控制第一部件供给部307、第二部件供给部308、基板保持部309以及转印单元310的至少一个或者全部。例如,控制部313也可以控制基于转印单元310的涂膜的形成的定时,以便在第一电子部件200到达转印单元310之前、在转印台上形成助熔剂的涂膜。
搭载了第一电子部件200以及根据需要而设置的第二电子部件210的基板101,被搬送到回流焊装置(SP12)。在回流焊装置内中,如图10(a)所示那样,第一电子部件200以及加强用树脂105按照每个基板101被加热,凸块204熔融,接着加强用树脂105硬化成为树脂加强部105a。此时,在第一电子部件200与基板101之间存在位置偏移的情况下,在加强用树脂105硬化之前,通过自对准的效果来消除位置偏移。当焊锡接合结束时,如图10(b)所示那样,凸块204的形状稍微变形,第一电子部件200与第一电极102a之间的距离缩小。在使用热硬化性助熔剂的情况下,由于要形成助熔剂的硬化物206a,因此可以省略助熔剂的清洗工序。
接下来,对加强用树脂105的涂覆图案进行具体说明。
图11A表示与矩形的第一电子部件200的周边缘部201x的四角对应而在4个位置的加强位置上涂覆了加强用树脂105时的、第一电子部件200的俯视图。图11B是相同的第一电子部件200的仰视图(具有多个凸块的主面201s)。加强用树脂105以仅接触第一电子部件200的周边缘部201x附近的凸块204的一部分、以及虽然未图示但离周边缘部201x最近的第一电极102a的一部分的方式,被涂覆在加强位置上。但是,加强用树脂105的涂覆图案不特别限定。
图12例示5个种类的加强用树脂的涂覆图案。在4点涂覆的图案(a)、8点涂覆的图案(b)、12点涂覆的图案(c)以及L型涂覆的图案(d)中,在矩形的第一电子部件的周边缘部的四角或者其附近,设定有多个加强位置。在U型涂覆的图案(e)中,也以包含四角以及其附近的方式设定有加强位置。按照涂覆图案(a)~(e)的顺序,加强效果变大,但涂覆时间变长,加强用树脂的使用量也变多。另一方面,按照涂覆图案(e)~(a)的顺序,修理性(重做性)变得良好。涂覆图案根据第一电子部件的尺寸以及生产节拍,考虑加强效果来适当地选择即可。
此外,也可以在周边缘部的大致整体涂覆加强用树脂。但是,在凸块的回流焊时,有时会从加强用树脂、助熔剂产生气体,因此优选设置用于排放气体的开口。
接下来,说明助熔剂。
助熔剂是具有如下作用的材料,即,在焊锡接合时,将第一电极的表面以及凸块的表面上存在的氧化物等除去、或使焊锡的表面张力减少。通过这些作用(以下称为活性作用),焊锡与第一电极之间的浸润性变大,能够进行可靠性较高的良好的焊锡接合。
助熔剂的组成不特别限定,但例如包括松脂那样的基剂、有机酸、氢卤酸盐等活性剂、溶剂以及触变性附加剂等。
在本发明中,假定助熔剂与作为加强用树脂的热硬化性树脂接触,而优选使用热硬化性助熔剂。在使用热硬化性助熔剂的情况下,即使在助熔剂与加强用树脂混合的情况下,也难以阻碍加强用树脂的正常的热硬化。其原因可以认为是助熔剂的有效成分向加强用树脂的移动被抑制。
热硬化性助熔剂能够通过使助熔剂含有热硬化性树脂来得到。作为助熔剂所含有的热硬化性树脂,根据耐热性优良的点等考虑,例如环氧树脂较适合。
接下来,说明加强用树脂。
加强用树脂使用热硬化性树脂。作为热硬化性树脂,能够例示环氧树脂、酚醛树脂、三聚氰酰胺甲醛树脂以及聚氨酯树脂等。热硬化性树脂也可以含有硬化剂、硬化促进剂等。作为硬化剂,优选使用酸酐、脂肪族或者芳香族胺、咪唑或者其衍生物等,作为硬化促进剂能够例示双氰胺等。
在加强用树脂中,优选含有具有将第一电极或者凸块的表面上存在的氧化物除去的作用的成分。例如,也可以使加强用树脂含有助熔剂所含有的活性剂等。由此,即使在加强用树脂与第一电极或者凸块接触的情况下,也能够更可靠地确保熔融的凸块与第一电极之间的浸润。
此外,本发明不限于将1种第一电子部件向基板搭载的情况,也能够应用于将多种第一电子部件向基板搭载的情况。在该情况下,也可以根据需要,在电子部件搭载装置上,设置对用于向搭载头安装的多个吸引喷嘴进行保持的喷嘴储料器(nozzle stocker),并能够与多个第一电子部件分别对应地交换吸引喷嘴。此外,本发明不限于将1种第二电子部件向基板搭载的情况,也能够应用于将多种第二电子部件向基板搭载的情况。
接下来,根据实施例来说明本发明,但本发明不限定于以下的实施例。
《实施例1》
首先,在FR4基板上,作为第一电极而形成了规定图案的焊盘。在转印台上使用刮板来形成助熔剂的涂膜,并将该涂膜向作为第一电子部件的倒装芯片BGA封装(1005芯片)的由Sn-Ag-Cu系的焊锡构成的凸块(熔点约220℃)上转印。然后,以凸块降落到焊盘上的方式,将电子部件向基板搭载。接下来,以包括电子部件的周边缘部的四角以及其附近的方式,在2个位置的加强位置上按照U型的涂覆图案(图12(e))涂覆加强用树脂。此时,使加强用树脂与电子部件的周边缘部接触,并且使其与基板的焊盘以及电子部件的凸块也接触了。然后,将搭载了电子部件的基板通过回流焊装置以240℃~250℃进行加热而进行了焊锡接合。
接下来,在将结束了焊锡接合的电子部件从基板剥离,而观察凸块是否充分附着在焊盘上时,凸块的残渣充分地附着在与加强用树脂接触的焊盘的全部上。
《比较例1》
在搭载电子部件之前的基板的、与电子部件的周边缘部对应的加强位置上,按照与实施例1相同的涂覆图案涂覆加强用树脂。此时,加强用树脂与基板的焊盘的边缘接触。接下来,将向凸块转印了与实施例1同样的助熔剂的涂膜的电子部件,以凸块降落到焊盘上的方式向基板搭载。此时,加强用树脂与电子部件的周边缘部接触,并且还与电子部件的凸块接触。然后,将搭载了电子部件的基板与实施例1相同地通过回流焊装置进行加热而进行了焊锡接合。
接下来,在将结束了焊锡接合的电子部件从基板剥离,而观察凸块是否充分附着在焊盘上时,在与加强用树脂接触的焊盘的一部分,凸块的残渣未充分附着,而加强用树脂向凸块与焊盘之间侵入。
根据以上的实施例1以及比较例1的结果能够理解,根据本发明,即使在加强用树脂与基板上所设置的电极或者凸块接触的情况下,也能够抑制加强用树脂向凸块与电极之间侵入。该情况表示,通过在回流焊时熔融的凸块,电极被充分浸润,因此能够确保焊锡接合部的导通。
工业上的可利用性
本发明的电子部件安装方法、电子部件搭载装置以及电子部件安装系统为,在将具有设置有多个凸块的主面的电子部件与基板接合的情况下,能够确保可靠的电导通和足够的接合强度,特别是在小型的BGA型电子部件的表面安装的领域是有用的。
涉及在当前来说优选的实施方式地说明了本发明,但不限定地解释为这种公开。通过阅读上述公开本发明,所属技术领域的本领域技术人员能够无误地明确各种的变形以及改变。由此,后附的请求的范围应解释为,在不脱离本发明的真正的精神以及范围的情况下,包括全部的变形以及改变。

Claims (10)

1.一种电子部件安装方法,包括:
准备具有设置有多个凸块的矩形的主面的第一电子部件的工序;
准备具有与上述多个凸块对应的多个第一电极的基板的工序;
对上述多个凸块涂覆助熔剂的工序;
以上述多个凸块隔着上述助熔剂分别降落到对应的上述第一电极上的方式,将上述第一电子部件搭载到上述基板上的工序;
在搭载有上述第一电子部件的基板的与上述第一电子部件的周边缘部对应的多个加强位置上,以与上述周边缘部以及位于上述周边缘部的最外周的凸块接触、并且不覆盖上述最外周的凸块的方式供给热硬化性树脂的工序;以及
对搭载了上述第一电子部件的上述基板进行加热,使上述凸块熔融,并且使上述热硬化性树脂硬化、冷却,由此将上述第一电子部件与上述基板接合的工序。
2.如权利要求1记载的电子部件安装方法,其中,
上述热硬化性树脂含有具有将上述第一电极或者上述凸块的表面上存在的氧化物除去的作用的成分。
3.如权利要求1或2记载的电子部件安装方法,其中,
上述助熔剂为热硬化性助熔剂。
4.如权利要求1或2记载的电子部件安装方法,其中,
在将上述基板上所搭载的上述电子部件相对于上述基板进行按压的同时,进行供给上述热硬化性树脂的工序。
5.如权利要求1或2记载的电子部件安装方法,其中,还包括:
准备具有连接用端子的第二电子部件的工序;
在将上述第一电子部件向上述基板搭载之前,在上述基板上所设置的与上述连接用端子对应的第二电极上,通过丝网印刷涂覆含有金属粒子的浆料的工序;以及
以上述连接用端子隔着含有上述金属粒子的浆料降落到上述第二电极上的方式,将上述第二电子部件向上述基板搭载的工序。
6.一种电子部件搭载装置,将具有设置有多个凸块的矩形的主面的第一电子部件,向具有与上述多个凸块对应的多个第一电极的基板搭载,在该电子部件搭载装置中,具备:
第一部件供给部,供给上述第一电子部件;
基板保持部,对上述基板进行保持并定位;
转印单元,供给助熔剂的涂膜;
能够移动的搭载头,将供给的上述第一电子部件向上述基板搭载;
能够移动的涂覆头,供给热硬化性树脂;以及
控制部,对上述搭载头和上述涂覆头的移动以及动作进行控制;
通过上述控制部的指令,上述搭载头进行如下动作:在通过上述转印单元向上述第一电子部件的上述多个凸块转印了上述助熔剂的涂膜之后,以上述多个凸块隔着上述助熔剂分别降落到对应的上述第一电极上的方式,将上述第一电子部件向上述基板搭载,并且上述涂覆头进行如下动作:在搭载了上述第一电子部件的基板上的与上述第一电子部件的周边缘部对应的多个加强位置上,以与上述周边缘部以及位于上述周边缘部的最外周的凸块接触、并且不覆盖上述最外周的凸块的方式供给上述热硬化性树脂。
7.如权利要求6记载的电子部件搭载装置,其中,
上述涂覆头具有按压端子,该按压端子在供给上述热硬化性树脂时,将上述基板上所搭载的上述电子部件相对于上述基板进行按压。
8.如权利要求6或7记载的电子部件搭载装置,其中,
还具备供给具有连接用端子的第二电子部件的第二部件供给部,
通过上述控制部的指令,上述搭载头进行如下动作:以降落到上述基板上所设置的与上述连接用端子对应的第二电极上的方式,将上述第二电子部件向上述基板上搭载。
9.一种电子部件安装方法,将具有设置有多个凸块的矩形的主面的第一电子部件以及具有连接用端子的第二电子部件,向具有与上述多个凸块对应的多个第一电极以及与上述连接用端子对应的第二电极的基板上安装,在电子部件安装方法中,包括:
准备上述基板的工序;
在上述基板的上述第二电极上通过丝网印刷涂覆含有金属粒子的浆料的工序;
准备上述第一电子部件的工序;
准备上述第二电子部件的工序;
在上述多个凸块上涂覆助熔剂的工序;
以上述多个凸块隔着上述助熔剂分别降落到对应的上述第一电极上的方式,将上述第一电子部件搭载到上述基板上的工序;
在搭载了上述第一电子部件的基板的与上述第一电子部件的周边缘部对应的多个加强位置上,以与上述周边缘部以及位于上述周边缘部的最外周的凸块接触、并且不覆盖上述最外周的凸块的方式供给热硬化性树脂的工序;
以上述连接用端子隔着含有上述金属粒子的浆料降落到上述第二电极上的方式,将上述第二电子部件搭载到上述基板上的工序;以及
对搭载了上述第一电子部件以及上述第二电子部件的上述基板进行加热,使上述凸块以及上述金属粒子熔融,并且使上述热硬化性树脂硬化、冷却,由此将上述第一电子部件以及上述第二电子部件与上述基板接合的工序。
10.一种电子部件安装系统,将具有设置有多个凸块的矩形的主面的第一电子部件以及具有连接用端子的第二电子部件,向具有与上述多个凸块对应的多个第一电极以及与上述连接用端子对应的第二电极的基板上安装,在该电子部件安装系统中,具备:
基板供给装置,供给上述基板;
丝网印刷装置,在从上述基板供给装置搬出的上述基板的上述第二电极上通过丝网印刷涂覆含有金属粒子的浆料;
电子部件搭载装置,向从上述丝网印刷装置搬出的上述基板的上述第一电极上搭载上述第一电子部件,并且向涂覆了含有上述金属粒子的浆料的第二电极上搭载第二电子部件,而且具有供给热硬化性树脂且能够移动的涂覆头;以及
回流焊装置,对从上述电子部件搭载装置搬出的上述基板进行加热,使上述凸块以及金属粒子熔融,并且使上述热硬化性树脂硬化,
上述电子部件搭载装置具备:
第一部件供给部,供给上述第一电子部件;
第二部件供给部,供给上述第二电子部件;
基板保持部,对上述基板进行保持并定位;
转印单元,供给助熔剂的涂膜;
能够移动的搭载头,将供给的上述第一电子部件以及上述第二电子部件向上述基板上搭载;以及
控制部,对上述搭载头和上述涂覆头的移动以及动作进行控制,
通过上述控制部的指令,上述搭载头进行如下动作:在通过上述转印单元向上述第一电子部件的上述多个凸块转印了上述助熔剂的涂膜之后,以上述多个凸块隔着上述助熔剂分别降落到对应的上述电极上的方式,将上述第一电子部件向上述基板进行搭载,并且以上述连接用端子隔着含有上述金属粒子的浆料降落到上述第二电极上的方式,将上述第二电子部件向上述基板进行搭载,并且上述涂覆头进行如下动作:向搭载了上述第一电子部件的基板的与上述第一电子部件的周边缘部对应的多个加强位置上,以与上述周边缘部以及位于上述周边缘部的最外周的凸块接触、并且不覆盖上述最外周的凸块的方式供给热硬化性树脂。
CN201280022190.6A 2011-05-26 2012-05-23 电子部件安装方法、电子部件搭载装置以及电子部件安装系统 Expired - Fee Related CN103518424B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2011-118000 2011-05-26
JP2011118000 2011-05-26
PCT/JP2012/003356 WO2012160817A1 (ja) 2011-05-26 2012-05-23 電子部品実装方法、電子部品搭載装置および電子部品実装システム

Publications (2)

Publication Number Publication Date
CN103518424A CN103518424A (zh) 2014-01-15
CN103518424B true CN103518424B (zh) 2017-05-17

Family

ID=47216908

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201280022190.6A Expired - Fee Related CN103518424B (zh) 2011-05-26 2012-05-23 电子部件安装方法、电子部件搭载装置以及电子部件安装系统

Country Status (4)

Country Link
US (1) US20140231492A1 (zh)
JP (1) JP5719999B2 (zh)
CN (1) CN103518424B (zh)
WO (1) WO2012160817A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5884088B2 (ja) * 2013-01-31 2016-03-15 パナソニックIpマネジメント株式会社 電子部品実装方法
JP5874683B2 (ja) * 2013-05-16 2016-03-02 ソニー株式会社 実装基板の製造方法、および電子機器の製造方法
JP6123076B2 (ja) * 2013-11-12 2017-05-10 パナソニックIpマネジメント株式会社 スクリーン印刷装置及び電子部品実装システム
JP2015093465A (ja) * 2013-11-14 2015-05-18 パナソニックIpマネジメント株式会社 スクリーン印刷装置及び電子部品実装システム並びにスクリーン印刷方法
JP6201149B2 (ja) * 2014-02-27 2017-09-27 パナソニックIpマネジメント株式会社 部品実装ライン及び部品実装方法
US10669070B2 (en) * 2016-08-10 2020-06-02 Time On Target Holdings, Llc Modular drinking container with surface for attaching components thereto
US10160066B2 (en) * 2016-11-01 2018-12-25 GM Global Technology Operations LLC Methods and systems for reinforced adhesive bonding using solder elements and flux
US20190275600A1 (en) * 2018-03-07 2019-09-12 Powertech Technology Inc. Flux transfer tool and flux transfer method
JP7310598B2 (ja) * 2019-12-25 2023-07-19 株式会社デンソー 電子装置
JP7283407B2 (ja) * 2020-02-04 2023-05-30 株式会社デンソー 電子装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101316482A (zh) * 2007-05-30 2008-12-03 株式会社东芝 印刷电路板,印刷电路板制造方法以及电子装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08298374A (ja) * 1995-04-27 1996-11-12 Matsushita Electric Ind Co Ltd 半田付け方法
JP3417281B2 (ja) * 1998-01-08 2003-06-16 松下電器産業株式会社 バンプ付電子部品の実装方法
JPH11274235A (ja) * 1998-03-25 1999-10-08 Toshiba Corp 半導体装置およびその製造方法
JP3693007B2 (ja) * 2001-11-20 2005-09-07 松下電器産業株式会社 電子部品実装方法
JP4357940B2 (ja) * 2003-06-09 2009-11-04 パナソニック株式会社 実装基板の製造方法
JP4560113B2 (ja) * 2008-09-30 2010-10-13 株式会社東芝 プリント回路板及びプリント回路板を備えた電子機器
US20110108997A1 (en) * 2009-04-24 2011-05-12 Panasonic Corporation Mounting method and mounting structure for semiconductor package component
US9609760B2 (en) * 2011-06-02 2017-03-28 Panasonic Intellectual Property Management Co., Ltd. Electronic component mounting method
CN103329644B (zh) * 2011-12-08 2016-02-17 松下知识产权经营株式会社 电子零件安装线及电子零件安装方法
KR20140102597A (ko) * 2011-12-22 2014-08-22 파나소닉 주식회사 전자부품 실장라인 및 전자부품 실장방법

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101316482A (zh) * 2007-05-30 2008-12-03 株式会社东芝 印刷电路板,印刷电路板制造方法以及电子装置

Also Published As

Publication number Publication date
JPWO2012160817A1 (ja) 2014-07-31
US20140231492A1 (en) 2014-08-21
CN103518424A (zh) 2014-01-15
JP5719999B2 (ja) 2015-05-20
WO2012160817A1 (ja) 2012-11-29

Similar Documents

Publication Publication Date Title
CN103518424B (zh) 电子部件安装方法、电子部件搭载装置以及电子部件安装系统
CN103548430B (zh) 电子部件安装方法、电子部件搭载装置以及电子部件安装系统
US8673685B1 (en) Electronic component mounting line and electronic component mounting method
CN102487020B (zh) 形成引线上凸块互连的半导体器件和方法
US6774497B1 (en) Flip-chip assembly with thin underfill and thick solder mask
US9125329B2 (en) Electronic component mounting line and electronic component mounting method
US20010001469A1 (en) Method and apparatus for mounting component
US9756728B2 (en) Component-mounted structure
US9439335B2 (en) Electronic component mounting line and electronic component mounting method
CN1953150B (zh) 制作上面具有多个焊接连接位置的电路化衬底的方法
US20130286594A1 (en) Circuit device and method for manufacturing same
JP6135892B2 (ja) 電子部品実装方法および電子部品実装ライン
JP5719997B2 (ja) 電子部品の実装方法及び実装システム
JP2014033084A (ja) 積層パッケージ構造体の製造方法、組み立て装置、および製造システム
JP6135891B2 (ja) 電子部品実装方法および電子部品実装ライン
US20150371930A1 (en) Integrated Circuit Packaging Method Using Pre-Applied Attachment Medium
JP5884088B2 (ja) 電子部品実装方法
JP2014033083A (ja) 積層パッケージ構造体
JP2015050355A (ja) 電子部品実装方法および電子部品実装構造体

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LT

Free format text: FORMER OWNER: MATSUSHITA ELECTRIC INDUSTRIAL CO, LTD.

Effective date: 20150906

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20150906

Address after: Osaka Japan

Applicant after: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT Co.,Ltd.

Address before: Osaka Japan

Applicant before: Matsushita Electric Industrial Co.,Ltd.

GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170517