CN103460815B - 安装结构体及其制造方法 - Google Patents

安装结构体及其制造方法 Download PDF

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Publication number
CN103460815B
CN103460815B CN201280015787.8A CN201280015787A CN103460815B CN 103460815 B CN103460815 B CN 103460815B CN 201280015787 A CN201280015787 A CN 201280015787A CN 103460815 B CN103460815 B CN 103460815B
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China
Prior art keywords
base plate
substrate
installation base
junction surface
solder
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CN103460815A (zh
Inventor
山口敦史
吉田久彦
岸新
大桥直伦
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Panasonic Intellectual Property Management Co Ltd
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Panasonic Intellectual Property Management Co Ltd
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    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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Abstract

在由焊料将半导体元件接合并安装于第1安装基板、并将该第1安装基板安装于第2基板上的结构中,若使用熔点较低的焊料来将第1安装基板与第2基板进行接合,则连接强度变低。提供一种安装结构体,利用具有217℃以上熔点的第1焊料(1)将半导体元件(4)与第1安装基板(5)进行接合,并将该第1安装基板(5)安装于第2基板(8)上,包括:多个接合部(6),该接合部(6)将第1安装基板与第2基板进行接合;以及强化构件(7),该强化构件(7)形成于各接合部的周围。接合部结构分别为包含具有比第1焊料(1)要低的熔点的第2焊料来作为焊料材料,且以非接触方式相邻的各个接合部之间具有不存在强化构件空间(16)。

Description

安装结构体及其制造方法
技术领域
本发明涉及一种电子电路基板的安装结构体及其制造方法。涉及基板上的电子元器件、半导体芯片等的安装结构。
背景技术
现在,作为用于在基板上安装电子元器件的焊料材料主要为Sn-Ag类焊料材料,尤其是使用96.5Sn-3Ag-0.5Cu(Sn96.5重量%、Ag3重量%、以及Cu0.5重量%的成分)的焊料材料(例如,参照专利文献1及专利文献2)。
图6是表示使用了现有的焊料材料的电子电路基板的接合结构的结构的剖视图。
图6中,利用焊料21来使BGA(Ball Grid Array:球栅阵列)封装、LGA(Land GridArray:触点阵列)封装等半导体元件24、电子元器件22与第1安装基板25相接合。对于BGA封装、LGA封装等半导体元件24,若接合部变得较细微,则在温度周期寿命试验、下落试验中容易产生裂纹,因此,如图6所示,采用利用密封材料23来密封并强化的密封结构。
然而,若使用96.5Sn-3Ag-0.5Cu焊料来将该密封后的第1安装基板25安装于第2基板27上,则会具有第1安装基板25的焊料21发生熔融,从而造成连接不良的问题。另外,图6中的26表示利用96.5Sn-3Ag-0.5Cu焊料来进行焊接的接合部。
因此,对于使安装于第2基板27时的接合温度降低的要求变高。
因此,为了降低将第1安装基板25安装于第2基板27上的接合温度,从而防止第1安装基板25的焊料21发生熔融,作为将第1安装基板25安装于第2基板27上的接合材料,具有比第1安装基板25所使用的焊料21的熔点要低的熔点的Sn-Bi类焊料逐渐受到关注(例如,参照专利文献3)。
现有技术文献
专利文献
专利文献1:日本专利第3027441号公报
专利文献2:美国专利第5520752号说明书
专利文献3:日本专利第4135268号公报
发明内容
发明所要解决的技术问题
然而,如上所述,在使用Sn-Bi类焊料将第1安装基板25安装于第2基板27的情况下,具有其连接强度比Sn-Ag类焊料低的问题。
例如,在与第2基板27相接合的第1安装基板25的电极面为BGA型的情况下,当用Sn-Bi类焊料进行接合时,第1安装基板25与接合部26之间利用形成于第1安装基板25上的Sn-Ag类焊球进行接合,因此连接强度较高,然而,第2基板27与接合部26之间由于利用了比Sn-Ag类焊料要硬要脆的Sn-Bi类焊料来进行接合,因此连接强度变低。
此外,例如,在与第2基板27相接合的第1安装基板25的电极面为LGA型的情况下,第1安装基板25与接合部26之间、及第2基板27与接合部26之间由于均利用Sn-Bi类焊料来进行接合,因此接合部26与第1安装基板25之间、及接合部26与第2基板27之间的连接强度均变低。
因此,存在利用Sn-Ag类焊料进行接合的实用化难以推进的现状。
本发明考虑了这些现有的问题,目的在于提供一种在由焊料将半导体元件接合并安装于第1安装基板,而该第1安装基板安装于第2基板上的结构中、下落特性及温度周期特性良好、可靠性比现有技术更高的安装结构体及其制造方法。
解决技术问题所采用的技术方案
为了解决上述课题,第一项本发明是一种安装结构体,
该安装结构体中,利用具有217℃以上熔点的第1焊料将半导体元件与第1安装基板进行接合,且该第1安装基板安装于第2基板上,包括:
多个接合部,该接合部将所述第1安装基板与所述第2基板进行接合;以及
强化构件,该强化构件形成于所述接合部的周围,
所述接合部分别包含具有比所述第1焊料的熔点要低的第2焊料来作为焊料材料,
以非接触方式相邻的各个所述接合部之间具有不存在所述强化构件的空间。
另外,关于第二项本发明,在第一项本发明所述的安装结构体中,
当设所述第1安装基板与所述第2基板之间的体积为V0,
形成于所述第1安装基板与所述第2基板之间的各个所述接合部的总体积为V1,
形成于所述第1安装基板与所述第2基板之间的各个所述强化构件的总体积为V2时,满足V0-V1-V2>0的关系。
另外,关于第三项本发明,在第一项本发明所述的安装结构体中,
所述强化构件与所述第2基板相接触,
形成于所述接合部周围的所述强化构件的、以所述第2基板面为基准的高度在基板间距离的1/5以上。
另外,关于第四项本发明,在第一项本发明所述的安装结构体中,
所述第2焊料至少含有Sn且具有200℃以下的熔点。
另外,关于第五项本发明,在第四项本发明所述的安装结构体中,
所述第2焊料的组成为包含50~70重量%的Bi及10~25重量%的In的任一种金属,而剩余部分为Sn。
另外,关于第六项本发明,在第一项本发明所述的安装结构体中,
所述强化构件含有液态双酚F型环氧树脂及咪唑类固化剂。
另外,关于第七项本发明,在第一项本发明所述的安装结构体中,
所述第1安装基板比所述第2基板要薄。
另外,关于第八项本发明,在第一项本发明所述的安装结构体中,
所述第1安装基板使在与所述第2基板相对一侧的面上利用焊球形成了凸点的BGA型。
另外,关于第九项本发明,在第一项本发明所述的安装结构体中,
所述第1安装基板使在与所述第2基板相对一侧的面上形成有平面电极焊盘的LGA型,
所述强化构件与所述第1安装基板以及所述第二基板相接触。
此外,第十项本发明是一种安装结构体的制造方法,
该安装结构体的制造方法中,利用具有217℃以上熔点的第1焊料将半导体元件与第1安装基板进行接合,并将该第1安装基板安装于第2基板上,该安装结构体的制造方法中,
将强化树脂与比所述第1焊料熔点要低的第2焊料混合后的复合材料提供给所述第2基板上的多个部位,
在提供了所述复合材料的所述第2基板上配置所述第1安装基板,
以比所述第1焊料的熔点要低、且比所述第2焊料的熔点要高的温度对所述复合材料进行加热,从而使所述第1安装基板与所述第2基板进行接合。
此外,关于第十一项本发明,在第十项本发明所述的安装结构体的制造方法中,
所述第1安装基板中使在与所述第2基板相对一侧的面上利用焊球形成了凸点的BGA型,
在将所述第一安装基板与所述第二基板接合的情况下,
将所述第1安装基板与所述第2基板进行接合的、所述凸点及由所述第2焊料所形成的接合部形成于多个部位,
通过集中于所述接合部周围的所述强化树脂来对所述接合部进行强化的强化构件与所述第2基板进行接触来形成。
此外,关于第十二项本发明,在第十项本发明所述的安装结构体的制造方法中,
所述第1安装基板中是在与所述第2基板相对一侧的面上形成有平面电极焊盘的LGA型,
在将所述第一安装基板与所述第二基板接合的情况下,
将所述第1安装基板与所述第2基板进行接合的、由所述第2焊料所形成的接合部形成于多个部位,
通过集中于所述接合部周围的所述强化树脂来对所述接合部进行强化的强化构件与所述第1安装基板及所述第2基板进行接触来形成。
发明效果
根据本发明,能提供一种在由焊料将半导体元件接合并安装于第1安装基板、且该第1安装基板安装于第2基板上的结构中、下落特性及温度周期特性良好、比现有技术可靠性高的安装结构体及其制造方法。
附图说明
图1(a)是表示本发明的实施方式1~3的安装结构体的结构的剖视图,图1(b)是表示本发明的实施方式1~3的安装结构体的接合部的主要部分示意剖视图。
图2(a)~图2(d)是本发明的实施方式1~3的安装结构体的、在接合部的周围形成有强化构件的结构例的接合部的主要部分示意剖视图。
图3(a)、图3(b)是说明本发明的实施方式1的、将电极结构为BGA型的第1安装基板安装于第2基板时的制造工序的剖视图。
图4(a)、图4(b)是说明本发明的实施方式1的、将电极结构为LGA型的第1安装基板安装于第2基板时的制造工序的剖视图。
图5(a)是比较例的安装结构体的、未在接合部的周围形成强化构件的结构的接合部的主要部分剖视图,图5(b)是比较例的安装结构体的、利用强化树脂作为底部填充物对第1安装基板与第2基板之间进行密封的接合部的主要部分剖视图。
图6是表示现有的电子电路基板的接合结构的结构的剖视图。
具体实施方式
(实施方式1)
关于本发明的实施方式1的安装结构体,利用图1(a)及图1(b)来进行说明。
图1(a)是表示本发明的实施方式1的安装结构体的结构的剖视图。图1(b)是本实施方式1的安装结构体的接合部的剖视图,是对图1(a)中虚线所包围的部分进行放大后的示意图。
如图1(a)所示,利用96.5Sn-3Ag-0.5Cu焊料1将BGA封装、LGA封装等半导体元件4、芯片元器件即电子元器件2与第1安装基板5相接合。对于BGA封装、LGA封装等半导体元件4,若接合部分变细微,则在温度周期寿命试验、下落试验中容易产生裂纹,因此,利用密封材料3来进行密封并强化。
于是,将安装有电子元器件2和被密封的半导体元件4的第1安装基板5安装于第2基板8上。第1安装基板5与第2基板8由包含具有200℃以下熔点的焊料的接合部6来进行安装,且该接合部6的周围由强化构件7来进行强化。
另外,将半导体元件4、电子元器件2与第1安装基板5相接合的焊料1是本发明的具有217℃以上熔点的第1焊料的一个示例,而接合部6中所含有的具有200℃以下熔点的焊料是本发明的第2焊料的一个示例。
图2(a)~图2(d)中,表示了本发明的、在接合部的周围形成强化构件7的结构例的接合部6的主要部分示意剖视图。与图1(a)及图1(b)相对应的结构部分使用相同的符号。
图2(a)是表示以非接触方式相邻的接合部6周围的强化构件7不相接的情况,图2(b)是表示以非接触方式相邻的接合部6周围的强化构件7相接的情况,图2(c)是表示接合部6周围的强化构件7以浸润第1安装基板5及第2基板8双方的状态而存在的情况,图2(d)是表示接合部6周围的强化构件7以浸润第1安装基板5及第2基板8双方的状态而存在,并且以非接触方式相邻的接合部6周围的强化构件7相接的情况。
在图2(a)~图2(d)的任一种情况下,第1安装基板5与第2基板8之间的、以非接触方式相邻的接合部6之间存在未形成强化构件7的空间(接合部之间空间16)。
另外,接合部6是本发明的接合部的一个示例,而强化构件7是本发明的强化构件的一个示例。此外,接合部之间空间16是本发明的、存在于强化构件之间的空间的一个示例,该强化构件形成在以非接触方式相邻的各个接合部中。
此外,本说明书中,在接合部6的周围不间断地形成强化构件7的状态称之为在本发明的接合部周围形成有强化构件的状态,如图2(a)~(d)所示,在接合部6与第1安装基板5或第2基板8相接的部分,在接合部6的周围不间断地形成强化构件7的结构均表示了在本发明的接合部周围形成有强化构件的结构。
此外,图2(a)~(d)所示的结构均是本发明的、在强化构件之间存在空间的结构的一个示例,该强化构件形成在相邻的各个接合部中。
为了解决上述问题,在第1安装基板5的电极结构为BGA型的情况下,优选如图2(a)及图2(b)所示的结构。此外,在第1安装基板5的电极结构为LGA型的情况下,通过使用图2(c)及图2(d)所示的结构,能解决上述问题。关于这些问题,利用图3及图4在后面进行进一步说明。
接着,关于本实施方式1中将第1安装基板5安装于第2基板8的方法,分为使用BGA型的第1安装基板5的情况与使用LGA型的第1安装基板5的情况来进行说明。
本实施方式1中使用混合后的复合材料13,该复合材料13中,具有表1所示的200℃以下熔点的焊料与含有环氧的强化树脂的比率为80重量%:20重量%的比。作为该强化树脂的树脂成分使用作为液态双酚F型环氧树脂的日本环氧树脂生产的“E806”及作为其咪唑类固化剂的ADEKA生产的“EHI-I”。
另外,复合材料13所含有的、表1所示的具有200℃以下熔点的焊料是本发明的第2焊料的一个示例。
首先,使用图3(a)及图3(b),对将电极结构为BGA型的第1安装基板5与第2基板8相接合时的安装方法进行说明。
图3(a)及图3(b)是表示对将电极结构为BGA型的第1安装基板5安装于第2基板8上时的制造工序进行说明的剖视图。与图1(a)及图1(b)相对应的结构部分使用相同的符号。
首先,如图3(a)所示,利用焊糊印刷机将复合材料13印刷到形成在第2基板8的多个部位的各个电极15上。
另外,将复合材料13印刷到第2基板8的多个部位的电极15上的工序是本发明的复合材料提供工序的一个示例。
接着,如图3(a)所示,确定由Sn-Ag类焊料所形成的第1安装基板5的凸点12的位置,使得其位置与第2基板8的电极15的位置相吻合,从而将第1安装基板5配置于第2基板8上。这里,作为第1安装基板5使用以0.4mm间距形成有200μm直径的凸点12的BGA型的基板。
另外,将第1安装基板5配置于第2基板8上的工序是本发明的安装基板配置工序的一个示例。
然后,以规定的温度T对复合材料13及凸点12进行加热并加压,使得凸点12与复合材料13接触,该规定的温度T比使电子元器件2及半导体元件4与第1安装基板5相接合的焊料1的熔点(217℃以上)要低,而比复合材料13所包含的焊料的熔点(200℃以下)要高。其结果是,如图3(b)所示,利用接合部6来进行焊接的同时,由从复合材料13中渗透出的、集中于接合部6的下侧周围的强化树脂形成强化构件7,利用与第2基板8相接触的强化构件7,使接合部6与第2基板8之间的接合强化。
对于该接合部6进行进一步说明。
图3(b)的接合部6的部分所示的虚线是表示凸点12的部分与复合材料13中所含有的具有200℃以下熔点的焊料之间的界面的位置。以规定的温度T进行加热时,形成凸点12的焊料由于熔点超过200℃,因此不会发生熔融,但从凸点12的焊料的界面部分起,金属成分(Sn、Ag、Cu)会渗透至复合材料13中所含有的具有200℃以下熔点的焊料部分,因此在冷却后,这些焊料之间牢固地接合。
此外,第1安装基板5与第2基板8接合后形成的强化构件7的、面向接合部之间空间16的表面17的形状为图3(b)所示的凹面状。在第1安装基板5与第2基板8之间填充强化构件7来作为底部填充物进行密封的情况下,强化构件7露出部分的表面并不形成这样的凹面状。
另外,加热复合材料13及凸点12从而将第1安装基板与第2基板进行接合的工序是本发明的基板接合工序的一个示例。
接着,使用图4(a)及图4(b),对将电极结构为LGA型的第1安装基板5与第2基板8相接合时的安装方法进行说明。
图4(a)及图4(b)表示对将电极结构为LGA型的第1安装基板5安装于第2基板8上时的制造工序进行说明的剖视图。另外,与图3(a)及图3(b)相对应的结构部分使用相同的符号。
首先,如图4(a)所示,利用焊糊印刷机将复合材料13印刷到形成在第2基板8的多个部位的各个电极15上。
接着,如图4(a)所示,确定形成于第1安装基板5上的平面电极焊盘14的位置,使得其位置与第2基板8的电极15的位置相吻合,从而将第1安装基板5配置于第2基板8上。这里,作为第1安装基板5使用以0.4mm间距配置有200μm直径的平面电极焊盘14的LGA型的基板。
然后,以规定的温度T对复合材料13进行加热,并加压使得平面电极焊盘14与复合材料13接触,该规定的温度T比使电子元器件2及半导体元件4与第1安装基板5相接合的焊料1的熔点(217℃以上)要低,而比复合材料13所包含的焊料的熔点(200℃以下)要高。其结果是,如图4(b)所示,利用接合部6来进行焊接的同时,由从复合材料13中渗透出而集中于接合部6的上侧及下侧周围的强化树脂,在第1安装基板5一侧及第2基板8一侧形成强化构件7,利用强化构件7,使接合部6与第1安装基板5的接合、以及接合部6与第2基板8之间的接合强化。
在该情况下,如图4(b)所示,强化构件7形成为与第2基板8接触,并且也与第1安装基板5接触。
此外,对于第1安装基板5与第2基板8接合后形成的强化构件7,与第1安装基板5及第2基板8任一方接触的部分的、面向接合部之间空间16的表面17的形状均为图4(b)所示的凹面状。
由此,在BGA型的第1安装基板5的情况下,利用强化构件7对接合部6与下侧的第2基板8之间的接合进行了强化,在LGA型的第1安装基板5的情况下,分别强化了接合部6与上侧的第1安装基板5之间的接合、及接合部6与下侧的第2基板8之间的接合。
另外,在利用BGA型的第1安装基板5的情况下、凸点12与具有200℃以下的熔点的焊料进行接合而形成的接合部6、及在利用LGA型的第1安装基板5的情况下、仅由具有200℃以下熔点的焊料形成的接合部6均是本发明的接合部的一个示例。
在这些安装结构体的制造工序中,即使复合材料13中的强化树脂的比率在10重量%~25重量%内改变,也能进行材料调整,但强化构件的高度10相对于接合部的高度9会发生改变。
另外,如图3(b)及图4(b)所示,接合部的高度9是指形成有接合部6的部分的第1安装基板5与第2基板8之间的距离,是本发明的基板间距离的一个示例。
此外,如图3(b)及图4(b)所示,强化构件的高度10是表示形成在接合部6表面的强化构件7的、以第1安装基板5或第2基板8的基板面为基准的高度。如图2(c)及图2(d)所示,在强化构件7以浸润第1安装基板5及第2基板8双方的状态存在的情况下,自第1安装基板5起的高度与自第2基板8起的高度分别为强化构件的高度10。
在本实施方式1中,在使用复合材料13将BGA型的第1安装基板5安装到第2基板8上的情况下,接合后的强化构件的高度10为接合部的高度9的大约1/3,其中,该复合材料13由具有200℃以下熔点的焊料与含有环氧的强化树脂以80重量%:20重量%的比率进行混合后所得。此外,在该情况下,形成于接合部6周围的强化构件7的形状为如图2所示那样以非接触方式相邻的接合部6周围的强化构件7彼此不相接的结构。
如表1所示,在使用含有熔点在200℃以下的焊料的复合材料13对第1安装基板5与第2基板8进行接合的情况下,若含有熔点在200℃以下的焊料的接合部6的周围没有强化构件7,则接合强度较弱,会造成接合不良。对于在焊接后利用涂布机来提供强化构件7的方法,难以均等地渗透强化构件7,因而难以对所有接合部6的周围进行强化,因此不良较多。此外,在利用由涂布机来提供的方法来形成强化构件7的情况下,面对空间的强化构件表面17的形状不会变成如图3(b)、图4(b)所示的凹面状。
另外,在第1安装基板5是BGA型的情况下,如图3(b)所示,与第1安装基板5进行接合的部分的接合部6是形成了凸点12的熔点较高的焊料成分,由于第1安装基板5与接合部6之间的连接状态良好,因此也可以不利用强化构件7对与第1安装基板5的接合部分进行强化。
对于使用BGA型的基板作为第1安装基板5、并改变与第2基板8进行接合的部分的接合部6所含有的焊料的组成及强化状态而制成的安装结构体,进行下落试验及温度周期寿命试验,其结果如表1所示。
[表1]
注)表1中的“Bal.”是“Balance”(剩余部分)的略称
下落试验及温度周期寿命试验中所使用的安装结构体使用了如下结构的安装结构体。
如图1(a)所示的第1安装基板5的配置那样,使用96.5Sn-3Ag-0.5Cu来进行安装,使得半导体元件4(大小10mm见方、厚度1mm)与1005芯片元器件即电子元器件2排列在0.3mm厚度的FR-4的环氧玻璃基板上。此外,关于半导体元件4,利用涂布机注入密封材料3,在150℃下在高温槽中进行30分钟的固化,从而制作出第1安装基板5。另外,此处使用的密封材料3是纳美仕(NAMICS)生产的1572。
使用如表1所示那样组成不同的多个焊料作为接合部6所含有的焊料来将该第1安装基板5与0.5mm厚度的FR-4的玻璃环氧基板即第2基板8接合,从而分别制作出安装结构体。并且,关于如此制作而成的各个安装结构体,制作出第1安装基板5与第2基板8之间的强化状态不同的安装结构体,并对这些安装结构体分别实施下落试验及温度周期寿命试验。
图5(a)表示未在接合部6周围形成强化构件7的结构的接合部6的主要部分剖视图,图5(b)表示利用强化构件7作为底部填充物对第1安装基板5与第2基板8之间进行密封的接合部6的主要部分剖视图。
表1的比较例2~17均未在第1安装基板5与第2基板8之间形成强化构件7,因此,各个接合部6中所含有的焊料的组成不同,具有如图5(a)所示的结构。
表1的比较例18~33分别是在比较例2~17的结构的安装结构体中,不使用复合材料13而是在利用焊接形成接合部6后,通过涂布机注入强化树脂,是在第1安装基板5与第2基板8之间注入强化树脂以作为底部填充物来进行密封的安装结构体,具有如图5(b)所示的结构。
表1的实施例1~16是使用复合材料13、如图2(a)所示那样在接合部6的周围形成了强化构件7的本实施方式1的结构的安装结构体,其中,该复合材料13是由分别与比较例2~17组成相同的焊料与含有环氧的强化树脂以80重量%:20重量%的比率进行混合而得。
另外,表1的比较例1中以在接合部6中包含具有200℃以下熔点的焊料代替现有的96.5Sn-3Ag-0.5Cu焊料来使用,从而将第1安装基板5安装于第2基板8上的安装结构体。
下落试验中,对于这些安装结构体,以从1.5m的高度以6个面下落为1周期进行实施,并比较它们的下落次数。
此外,对于这些安装结构体,在-40℃~85℃(各30分钟)下实施温度周期寿命试验,并比较接合部6的裂纹的产生周期数。
将下落试验中在5周期以上、而温度周期寿命试验中在500周期以上作为良好的判断基准,目标在于获得一种同时在下落试验与温度周期寿命试验中良好的安装结构体。
根据表1可判断出,通过在Sn中添加Bi及In,熔点比比较例1所示的现有的96.5Sn-3Ag-0.5Cu焊料低。此外,当在Sn中添加Bi或In时,与现有的96.5Sn-3Ag-0.5Cu焊料(比较例1)相比,不实施强化的情况下(比较例2~17)的下落特性、温度周期特性有所劣化。
由此,至此为止的Sn-Bi类的具有200℃以下熔点的焊料若不进行强化,则机械强度较低,在实用化上存在提高强度的问题。
此外,对于在焊接后,利用涂布机注入强化树脂,从而在第1安装基板5与第2基板8之间注入强化树脂的、作为底部填充物来进行密封的方法,根据比较例18~33的结果可判断出,能获得优于现有的96.5Sn-3Ag-0.5Cu焊料(比较例1)的下落性能,但若考虑温度周期,则由于强化构件7的膨胀与收缩的重复进行而产生的热应力,使得温度周期特性有所下降。因此,具有提高温度周期特性的问题。
根据表1的比较例1~16可判断出,即使在利用熔点在200℃以下的焊料来安装第1安装基板5与第2基板8的情况下,通过强化构件7可靠地强化了接合部6周围,由此提高了由第1安装基板5与第2基板8构成的安装结构体的下落特性与温度周期特性的可靠性,能获得与比较例1所示的现有的96.5Sn-3Ag-0.5Cu焊料相同以上的可靠性。
由此,关于下落特性,通过采用本实施方式1的结构(实施例1~16),能够利用对将第1安装基板5与第2基板8进行接合的接合部6周围进行强化的强化效果来减小冲击力,因此能提高包含熔点在200℃以下的焊料的接合部6的下落特性。
此外,关于表1的温度周期特性,在强化构件7仅存在于接合部6的周围的情况下(实施例1~16),与未进行强化的安装结构体(比较例2~17)相比,温度周期特性得到了提高。这是由于强化构件7的强化效果。
此外,在强化构件7仅存在于接合部6的周围的情况下(实施例1~16),与将强化构件7无间隙地渗透到第1安装基板5与第2基板8之间的底部填充物的情况(比较例18~33)相比,温度周期特性也得到了提高。这是由于,若作为底部填充物进行填充,则由于将第1安装基板5与第2基板8相接的强化构件7的热膨胀,使得第1安装基板5与第2基板8的热应变变大。与此相对,在强化构件7仅存在于接合部6的周围的情况下,由于能降低强化构件7的热膨胀量,因此能减小第1安装基板5与第2基板8的热应变,从而能抑制对接合部6的应力。因此,与将强化构件7作为底部填充物进行填充的情况相比,能提高温度周期特性。
由此,通过采用在以非接触方式相邻的接合部6上形成的强化构件7之间存在空间的结构,能提高温度周期特性。
即,在将第1安装基板5与第2基板8之间的体积设为V0,将第1安装基板5与第2基板8之间所形成的各个接合部6的总体积设为V1,将第1安装基板5与第2基板8之间所形成的各个强化构件7的总体积设为V2时,通过使安装结构体的结构满足V0-V1-V2>0的关系,从而能提高温度周期特性。
如上述说明的那样,本实施方式1的安装结构体是一种以Bi及In的至少任一种与Sn作为基本组成、并以此为特征的使用具有200℃以下熔点的焊料的接合结构体。本实施方式1的安装结构体能够包括含有具有200℃以下熔点的焊料的接合部6,并具有对这些接合部6的周围至少进行强化的结构。
此外,通过使用以例如Bi及In的至少任一种与Sn作为基本组成,并通过在以此为特征的金属粒子排列上使用复合材料的强化材料,由此能实现本实施方式1的安装结构体。本实施方式1所使用的复合材料13是能具有100℃以下的低熔点的焊料糊料,与现有的96.5Sn-3Ag-0.5Cu焊料材料不同。
在本实施方式1中,作为接合部6中所含有的具有200℃以下熔点的焊料使用的焊料的组成是包含从Bi、In中选择的至少一种金属、且其余部分是Sn的合金组成。Bi及In以合金的低熔点化为目的进行混合。下面示出具有200℃以下熔点的焊料的组成的一个示例。
若具有200℃以下熔点的焊料的组成中Bi的含有量在50~70重量%的范围内,则延展极大,能兼顾低熔点与高可靠性。具有200℃以下熔点的焊料的组成中Bi的含有量设在50~70重量%内是因为若Bi的含有量比50重量%少,则不能充分获得低熔点化的效果,而若超过70重量%,则延展较小。
具有200℃以下熔点的焊料的焊料成分中In的含有量优选为在10~25重量%的范围内,延展极大,能兼顾低熔点与高可靠性。金属成分中In的含有量设在10~25重量%内是因为若In的含有量比10重量%少,则不能充分获得低熔点化的效果,而若超过25重量%,则也延展较小。
上Bi及In的含有量在分别单独含有的情况下、以及在同时含有的情况下都呈现上述特性。
由此,本实施方式1的安装结构体中,采用如下结构:即,在采用具有接合部6、且该接合部6包含能达到比Sn-Ag类焊料要低的安装温度的焊料材料的安装结构时,如图1(a)所示,在将第1安装基板5安装于第2基板8时的所有接合部6的周围形成强化构件7,由此进行强化。由此,即使在含有低熔点焊料的接合部6中,也能获得可靠性较高的安装结构。
(实施方式2)
对于本发明的实施方式2,在图1(a)所示结构的安装结构体中,图1(b)所示的在接合部6的周围形成的强化构件的高度10不同。
对于本实施方式2,在图1(a)所示结构的安装结构体中,作为接合部6所含有的焊料,使用表1所示的实施例15的焊料组成的焊料(42Sn-58Bi),并使用改变了该焊料与含有环氧的强化树脂的混合比率的复合材料13来将BGA型的第1安装基板5安装于第2基板8上。
在10~25重量%的范围内改变该强化树脂的比率,生成复合材料13。具有200℃以下熔点的焊料与强化树脂的混合比率中,若强化树脂的比率增加,则强化构件的高度10变高、强化效果变高,但若强化树脂的比率超过25重量%,则复合材料13的粘度降低,因此复合材料13松塌扩散,无法确保所希望的形状、特性。
将改变了具有200℃以下熔点的焊料与强化树脂的混合比率的复合材料13提供给电极间距为0.85mm的接合部分,从而改变接合部6周围的强化构件的高度10。并且,对于各个强化构件的高度10不同的安装结构体,实施与实施方式1相同的下落试验及温度周期寿命试验。其结果如表2所示。
[表2]
作为强化构件7使用的强化树脂的树脂成分使用作为液态双酚F型环氧树脂的日本环氧树脂生产的“E806”及作为咪唑类固化剂的ADEKA生产的“EHI-I”。
表2中,在焊接部分周围形成的强化构件7的高度的平均值设为强化构件的高度10。
另外,对于在接合部6周围形成的强化构件7的形状,除了表2中的实施例27以外,是图2(a)或图2(b)那样的、不与第1安装基板5接触而与第2基板8接触的结构。
根据表2的实施例23~27可判断出,若该强化构件的高度10在基板间距离(接合部的高度9)的1/5以上,则下落特性在现有的96.5Sn-3Ag-0.5Cu(比较例1)相同以上。然而,根据比较例42可判断出,若强化构件的高度10不满足上述高度,则无法获得强化构件7的强化效果。用于使强化构件的高度10在基板间距离的1/5以上的复合材料13中的强化树脂的混合量在10重量%以上。
在第1安装基板5为BGA型的情况下,如图3(b)所示,接合部6与第1安装基板5之间的连接状态良好,无需进行强化,因此仅在接合部6与第2基板8接触的一侧,使得强化构件的高度10在基板间距离的1/5以上即可。
另一方面,在第1安装基板5为LGA型的情况下,如图4(b)所示,具有200℃以下熔点的焊料是也与第1安装基板5进行接合的结构,因此,接合部6与第1安装基板5接合的部分也需要进行强化。因此,在该情况下,接合部6与第1安装基板5接触的一侧、及接合部与第2基板8接触的一侧中,分别使强化构件的高度10在基板间距离的1/5以上,由此能获得良好的下落特性。
此外,在实施例23~27的任一结构中,由第1安装基板5与第2基板8夹着的、整个接合部之间空间16的体积比第1安装基板5与第2基板8之间所有的、在接合部6的周围形成的强化构件7的总体积要大。
在这种强化树脂的混合比率为10~25重量%的上述复合材料13中,与在第1安装基板5的电极的基板上的配置无关,由第1安装基板5与第2基板8夹着的、整个接合部之间空间16的体积比第1安装基板5与第2基板8之间所有的、在接合部6的周围形成的强化构件7的总体积要大是在第1安装基板5与第2基板8利用0.4mm间距以上的电极相连接的情况下。
另一方面,在第1安装基板5与第2基板8利用0.3mm间距的电极相连接的情况下,在第1安装基板5的电极配置于整个基板背面的结构的情况下,由第1安装基板5与第2基板8夹着的、整个接合部之间空间16的体积比第1安装基板5与第2基板8之间所有的、在接合部6的周围形成的强化构件7的总体积要小。
在上述0.4mm间距以上的电极的情况下,不会引起温度周期特性的下降,但在第1安装基板5的整个基板背面配置0.3mm间距电极的结构的情况下,温度周期特性会下降。
由此,通过使由第1安装基板5与第2基板8夹着的、整个接合部之间空间16的体积比第1安装基板5与第2基板8的接合部6的周围所形成的强化构件7的总体积要大,来提高温度周期特性。
另外,即使在第1安装基板5与第2基板8利用0.3mm间距的电极相连接的情况下,若第1安装基板5的电极未配置于整个基板背面,则能使由第1安装基板5与第2基板8夹着的、整个接合部之间空间16的体积比第1安装基板5与第2基板8之间所有的、在接合部6的周围形成的强化构件7的总体积要大,从而能提高温度周期特性。
(实施方式3)
对于本发明的实施方式3,在图1(a)所示结构的安装结构体中,使第1安装基板5的厚度不同。
对于本实施方式3,在图1(a)所示结构的安装结构体中,作为接合部6所含有的焊料,使用表1所示实施例15的焊料组成的焊料(42Sn-58Bi),并使用以80重量%:20重量%的比对该焊料与含有环氧的强化树脂进行混合后得到的复合材料13。
作为强化构件7使用的强化树脂的树脂成分使用作为液态双酚F型环氧树脂的日本环氧树脂生产的“E806”及作为其咪唑类固化剂的ADEKA生产的“EHI-I”。
此外,本实施方式3中,第2基板8的厚度设为0.8mm。
并且,在0.25~0.80mm的范围内改变BGA型的第1安装基板5的厚度,并且,对于对各个接合部6的周围进行强化的结构及未进行强化的结构的安装结构体,实施与实施方式1相同的下落试验及温度周期寿命试验。其结果如表3所示。
[表3]
表3所示的实施例17~22是如图1(a)所示那样的、在接合部6周围形成有强化构件7的本实施方式3的结构的安装结构体,比较例34~39是分别与实施例17~22相对应的、未进行强化的结构的安装结构体。
若对表3的温度周期寿命试验的结果进行观察,则根据比较例34~39的结果可判断出,在第1安装基板5的厚度比0.5mm要薄的基板中,发生显著的可靠性的劣化。
另一方面,根据表3的实施例17~20的结果可知,通过采用如图1(a)及图1(b)所示那样在接合部6周围形成强化构件7的结构,即使在第1安装基板5的厚度比0.5mm要薄的基板中,也能防止可靠性的劣化。
因此,可以说在含有熔点在200℃以下的焊料作为接合部6的情况下,采用如图1(a)所示那样的本实施方式3的结构在第1安装基板5的厚度比0.5mm要薄的安装结构中较为有效,尤其是在第1安装基板5的厚度在0.45mm以下的安装结构中较为有效。
如以上说明的那样,本发明的安装结构体的特征在于,将第1安装基板5与第2基板8相接合的温度比安装于第1安装基板5上的焊料1的熔点要低。此外,在第1安装基板5与第2基板8相接合的焊接部分,所有的接合部6处均存在强化构件7,并且以相邻的接合部6之间具有空间16的方式进行接合,由此,接合强度比单独使用42Sn-58Bi焊料要高,此外,与将强化构件7作为底部填充物填充到第1安装基板5与第2基板8之间的情况相比,能降低由于强化构件7的重复热负荷而导致的膨胀收缩所产生的应力。
此外,本发明的安装结构体及其制造方法中,利用焊料1将作为电子元器件的BGA封装、LGA封装等半导体元件4、芯片元器件等电子元器件2进行接合,之后,在将封装后的第1安装基板5安装于第2基板8上时,达到比第1安装基板5的96.5Sn-3Ag-0.5Cu焊料1的熔点更低的安装温度,并且用强化构件7对该接合部6周围进行强化,由此,第1安装基板5的96.5Sn-3Ag-0.5Cu焊料1不会熔化,从而不会造成连接不良。此外,通过对将第1安装基板5与第2基板8接合的、包含熔点较低的焊料的接合部6的、至少周围进行强化,能实现高可靠性的安装结构体。
此外,本发明的安装结构体及其制造方法能用于比96.5Sn-3Ag-0.5Cu无铅焊料1的熔点要低的温度下的安装中,在对容许耐热温度较低的模块基板进行安装时,将造成热损伤的可能性降低到最小限度,或实质上防止,从而能实现高品质的安装结构体。
此外,本发明的安装结构体及其制造方法能用于将模块基板安装于母基板上,因此能用于内置该模块的产品,例如BD关联设备、移动电话、移动式AV设备、笔记本PC、数码相机及存储卡等。
工业上的实用性
对于本发明所涉及的安装结构体及其制造方法,在通过焊料将半导体元件接合并安装于第1安装基板5、并将该第1安装基板5安装于第2基板8上的结构中,下落特性及温度周期特性良好,具有能够比现有技术可靠性高的效果,对于内置有将模块基板安装于母基板上的结构的模块的产品有用,例如BD关联设备、移动电话、移动式AV设备、笔记本PC、数码相机及存储卡等,并且作为其制造方法有用。
标号说明
1 焊料
2 电子元器件
3 密封材料
4 半导体元件
5 第1安装基板
6 接合部
7 强化构件
8 第2基板
9 接合部的高度
10 强化构件的高度
12 凸点
13 复合材料
14 平面电极焊盘
15 电极
16 接合部之间空间
17 强化构件表面
21 焊料
22 电子元器件
23 密封材料
24 半导体元件
25 第1安装基板
26 接合部
27 第2基板

Claims (8)

1.一种安装结构体,利用具有217℃以上熔点的第1焊料将半导体元件与第1安装基板进行接合,且该第1安装基板安装于第2基板上,其特征在于,包括:
多个接合部,该接合部将与接合有所述半导体元件的面相反的面的所述第1安装基板与所述第2基板进行接合;以及
强化构件,该强化构件形成于所述接合部的周围,
所述接合部分别包含具有比所述第1焊料要低的熔点的第2焊料来作为焊料材料,
相邻的各个所述接合部之间具有不存在所述强化构件的空间,
所述强化构件与所述第1安装基板以及所述第2基板两者相接触并从所述接合部分别向所述第1安装基板和所述第2基板变宽,且不与相邻的所述接合部周围的强化构件相接。
2.如权利要求1所述的安装结构体,其特征在于,
当设所述第1安装基板与所述第2基板之间的体积为V0,
形成于所述第1安装基板与所述第2基板之间的各个所述接合部的总体积为V1,
形成于所述第1安装基板与所述第2基板之间的各个所述强化构件的总体积为V2时,满足下式
V0-V1-V2>0
的关系。
3.如权利要求1所述的安装结构体,其特征在于,
所述强化构件与所述第2基板相接触,
形成于所述接合部周围的所述强化构件的、以所述第2基板面为基准的高度在基板间距离的1/5以上。
4.如权利要求1所述的安装结构体,其特征在于,
所述第2焊料至少含有Sn且具有200℃以下的熔点。
5.如权利要求4所述的安装结构体,其特征在于,
所述第2焊料的组成包含50~70重量%的Bi及10~25重量%的In的任一种金属,而剩余部分为Sn。
6.如权利要求1所述的安装结构体,其特征在于,
所述强化构件含有液态双酚F型环氧树脂及咪唑类固化剂。
7.如权利要求1所述的安装结构体,其特征在于,
所述第1安装基板比所述第2基板要薄。
8.一种安装结构体的制造方法,该安装结构体的制造方法中,利用具有217℃以上熔点的第1焊料将半导体元件与第1安装基板进行接合,并将该第1安装基板安装于第2基板上,其特征在于,包括:
复合材料提供工序,该复合材料提供工序将强化树脂与比所述第1焊料的熔点要低的第2焊料混合后的复合材料提供给所述第2基板上的多个部位;
安装基板配置工序,该安装基板配置工序在提供了所述复合材料的所述第2基板上配置所述第1安装基板;以及
基板接合工序,该基板接合工序以比所述第1焊料的熔点要低、且比所述第2焊料的熔点要高的温度对所述复合材料进行加热,从而使所述第1安装基板与所述第2基板进行接合,
所述基板接合工序中,
与接合有所述半导体元件的面相反的面的所述第1安装基板与所述第2基板进行接合,由所述第2焊料所形成的接合部形成于多个部位,
通过集中于所述接合部周围的所述强化树脂来对所述接合部进行强化的强化构件与所述第1安装基板及所述第2基板两者进行接触并从所述接合部分别向所述第1安装基板和所述第2基板变宽来形成,且形成为不与相邻的所述接合部周围的强化构件相接。
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3104400B1 (en) * 2014-02-04 2022-08-31 Murata Manufacturing Co., Ltd. Manufacturing method of electronic component module
WO2015151292A1 (ja) * 2014-04-04 2015-10-08 三菱電機株式会社 プリント配線板ユニット
CN107073619A (zh) * 2014-07-28 2017-08-18 通用汽车环球科技运作有限责任公司 用于增强的粘合剂结合的系统和方法
JP6455091B2 (ja) * 2014-11-12 2019-01-23 富士通株式会社 電子装置及び電子装置の製造方法
JP6124032B2 (ja) * 2015-08-04 2017-05-10 パナソニックIpマネジメント株式会社 実装構造体と実装構造体の製造方法
CN105489587A (zh) * 2015-12-02 2016-04-13 苏州旭创科技有限公司 封装结构、封装方法及光模块
CN107848081B (zh) * 2015-12-25 2021-01-08 松下知识产权经营株式会社 膏状热固化性树脂组合物、半导体部件、半导体安装品、半导体部件的制造方法、半导体安装品的制造方法
US10157860B2 (en) * 2016-12-28 2018-12-18 Intel Corporation Component stiffener architectures for microelectronic package structures
EP3939079A4 (en) * 2019-04-15 2022-10-19 Hewlett-Packard Development Company, L.P. PCBS WITH ELECTRICAL CONTACTS AND SOLDER JOINTS WITH HIGHER MELTING TEMPERATURES
US11600573B2 (en) * 2019-06-26 2023-03-07 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of chip package with conductive support elements to reduce warpage
CN110913608A (zh) * 2019-11-27 2020-03-24 惠州Tcl移动通信有限公司 线路板叠层焊接方法、装置及存储介质

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1243601A (zh) * 1997-01-17 2000-02-02 洛克泰特公司 半导体设备的安装结构和安装方法
CN1237595C (zh) * 2002-09-11 2006-01-18 富士通株式会社 具有树脂部件作为加固件的焊料球的形成
CN101965632A (zh) * 2008-10-27 2011-02-02 松下电器产业株式会社 半导体的安装结构体及其制造方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3027441B2 (ja) 1991-07-08 2000-04-04 千住金属工業株式会社 高温はんだ
JPH06268365A (ja) * 1993-03-16 1994-09-22 Hitachi Ltd 電子回路部品の実装方法
US5520752A (en) 1994-06-20 1996-05-28 The United States Of America As Represented By The Secretary Of The Army Composite solders
US6274389B1 (en) 1997-01-17 2001-08-14 Loctite (R&D) Ltd. Mounting structure and mounting process from semiconductor devices
US6207782B1 (en) 1998-05-28 2001-03-27 Cromption Corporation Hydrophilic siloxane latex emulsions
JP4135268B2 (ja) * 1998-09-04 2008-08-20 株式会社豊田中央研究所 無鉛はんだ合金
JP2001035966A (ja) * 2000-01-01 2001-02-09 Ngk Spark Plug Co Ltd 配線基板および中継基板
MY124944A (en) * 2000-02-09 2006-07-31 Hitachi Chemical Co Ltd Resin composition, adhesives prepared therewith for bonding circuit members,and circuits boards
JP4609617B2 (ja) * 2000-08-01 2011-01-12 日本電気株式会社 半導体装置の実装方法及び実装構造体
JP4236809B2 (ja) * 2000-12-05 2009-03-11 パナソニック株式会社 電子部品の実装方法ならびに実装構造
JP3770104B2 (ja) 2001-05-10 2006-04-26 三菱電機株式会社 電子装置と接合部材
JP3608536B2 (ja) * 2001-08-08 2005-01-12 松下電器産業株式会社 電子部品実装方法
JP2004274000A (ja) * 2003-03-12 2004-09-30 Matsushita Electric Ind Co Ltd 半田付け方法
JP2005064303A (ja) 2003-08-15 2005-03-10 Sony Corp 光電気複合基板装置及びその製造方法
JP2005235819A (ja) * 2004-02-17 2005-09-02 Matsushita Electric Ind Co Ltd 回路基板およびチップ部品実装方法
WO2005072033A1 (ja) 2004-01-27 2005-08-04 Matsushita Electric Industrial Co., Ltd. 回路基板およびチップ部品実装方法
US20060065962A1 (en) * 2004-09-29 2006-03-30 Intel Corporation Control circuitry in stacked silicon
JP4650220B2 (ja) 2005-11-10 2011-03-16 パナソニック株式会社 電子部品の半田付け方法および電子部品の半田付け構造
TWI419242B (zh) * 2007-02-05 2013-12-11 Chipmos Technologies Inc 具有加強物的凸塊結構及其製造方法
TWI463582B (zh) * 2007-09-25 2014-12-01 Ngk Spark Plug Co 具有焊接凸塊之配線基板的製造方法
JP2009155431A (ja) * 2007-12-26 2009-07-16 Sumitomo Bakelite Co Ltd 液状封止樹脂組成物、半導体装置および半導体装置の製造方法
JP2011018741A (ja) * 2009-07-08 2011-01-27 Sumitomo Bakelite Co Ltd 封止樹脂組成物および半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1243601A (zh) * 1997-01-17 2000-02-02 洛克泰特公司 半导体设备的安装结构和安装方法
CN1237595C (zh) * 2002-09-11 2006-01-18 富士通株式会社 具有树脂部件作为加固件的焊料球的形成
CN101965632A (zh) * 2008-10-27 2011-02-02 松下电器产业株式会社 半导体的安装结构体及其制造方法

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US20140049930A1 (en) 2014-02-20
WO2012137457A1 (ja) 2012-10-11

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