TWI508243B - 封裝結構及其製造方法 - Google Patents

封裝結構及其製造方法 Download PDF

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Publication number
TWI508243B
TWI508243B TW101146774A TW101146774A TWI508243B TW I508243 B TWI508243 B TW I508243B TW 101146774 A TW101146774 A TW 101146774A TW 101146774 A TW101146774 A TW 101146774A TW I508243 B TWI508243 B TW I508243B
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Taiwan
Prior art keywords
metal material
electrode
solder pad
package structure
conductive element
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TW101146774A
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English (en)
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TW201324709A (zh
Inventor
Da Jung Chen
Wen Hsiung Liao
Chun Fu Hu
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Cyntec Co Ltd
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Publication of TW201324709A publication Critical patent/TW201324709A/zh
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Publication of TWI508243B publication Critical patent/TWI508243B/zh

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Description

封裝結構及其製造方法
本發明係有關一種封裝結構，特別指一種封裝結構，其具有一覆蓋於焊接材料的覆蓋金屬材料。
普遍地，模組封裝(例如四方平面無引腳封裝(QFN；Quad Flat No leads)、四方平面封裝(QFP；Quad Flat Package)、雙列直插式封裝(DIP；Dual In Line Package)、球閘陣列封裝(BGA；Ball Grid Array)以及平面閘格陣列封裝(LGA；Land Grid Array))所使用的焊接材料主要包含錫(Sn)，例如SA,SAC以及Sn-Zn。然而，請參考第1A圖(錫電極2、焊接材料：錫3、焊接墊4、印刷電路板(PCB,printed circuit board)5)，在第二次迴焊製程中，模組封裝中用來連接內部元件1至印刷電路板(PCB,printed circuit board)5的焊接材料(錫)3易重熔而使得兩相鄰電極產生錫橋接，進而導致產品失效。為了進一步詳細描述錫橋接6，請參考第1B圖。在塑封壓模製程中，封膠材料8通常為環氧塑封材料(EMC,Epoxy Molding Compound)、樹脂或是其他適合的材料。然而，封膠材料8無法有效填充元件1底部的空隙，而使得元件1下方有孔洞9形成。在第二次迴焊製程中，焊接材料(錫)3會進入孔洞9而產生錫橋接6的現象。
因此，為了增加產品品質，需要一方案解決在迴焊製程中在封裝結構內部的錫橋接問題。
本發明之一目的係提供一種封裝結構，其具有一覆蓋於焊接材料的覆蓋金屬材料，在迴焊製程中可避免電極間焊接材料橋接的問題。封裝結構包含：一基板，係包含在其上的一第一焊接墊和一第二焊接墊；一導電元件，係具有一上表面、一下表面、一第一側表面和一第二側表面。該導電元件配置在該基板上，以及該導電元件包含：一第一電極，係配置在從一第一部分的該下表面，經由一部分的該第一側表面，到一第一部分的該上表面；以及一第二電極，係配置在從一第二部分的該下表面，經由一部分的該第二側表面，到一第二部分的該上表面。一焊接材料，係分別電性連接該第一焊接墊和該第二焊接墊至該第一電極和該第二電極。一覆蓋金屬材料，係覆蓋該焊接材料、該第一焊接墊、該第二焊接墊、該第一電極和該第二電極露出的複數個區域，其中該露出的複數個區域包含熔點比該覆蓋金屬材料低的金屬材料。該焊接材料為一種不同於該覆蓋金屬材料的金屬材料。
在一個實施例中，焊接材料完全覆蓋第一焊接墊、第二焊接墊、第一電極以及第二電極。在使用焊接材料將導電元件焊接 於基板後，覆蓋金屬材料(例如銅)覆蓋於焊接材料(例如錫)。接著，在第二次迴焊製程中，一合金相形成在焊接材料和覆蓋金屬材料之間的界面。合金相的熔點大於焊接材料的熔點。在第二次迴焊製程中，焊接材料不會流過覆蓋金屬材料，藉以可避免在電極間錫橋接的問題。
本發另一目的係提供一種封裝結構之製造方法，其中該封裝結構具有一覆蓋於焊接材料的覆蓋金屬材料。首先，提供一基板，該基板包含在其上的一第一焊接墊和一第二焊接墊。接著，配置一導電元件在該基板上，其中該導電元件具有一上表面、一下表面、一第一側表面和一第二側表面，其中該導電元件包含一第一電極和一第二電極，其中該第一電極配置在從一第一部分的該下表面，經由一部分的該第一側表面，到一第一部分的該上表面；該第二電極配置在從一第二部分的該下表面，經由一部分的該第二側表面，到一第二部分的該上表面。之後，使用一焊接材料，用以分別電性連接該第一焊接墊和該第二焊接墊至該第一電極和該第二電極。最後，使用一覆蓋金屬材料，用以覆蓋該焊接材料、該第一焊接墊、該第二焊接墊、該第一電極和該第二電極露出的複數個區域，其中該露出的複數個區域包含熔點比該覆蓋金屬材料低的金屬材料。該焊接材料為一種不同於該覆蓋金屬材料的金屬材料。
在一個實施例中，使用覆蓋金屬材料覆蓋焊接材料表面係藉由化學鍍(無電極電鍍)達成。在一個較佳的實施例中，覆蓋金屬材料完全覆蓋第一焊接墊、第二焊接墊、第一電極以及第二電極。第二次迴焊製程中，焊接材料和覆蓋金屬材料在其之間結合(共晶eutectic)而形成一合金相。在一個實施例中，第二次迴焊製程的操作溫度介於焊接材料的熔點和覆蓋金屬材料的熔點之間。
在參閱圖式及在接下來的段落所描述之實施方式之後，該技術領域具有通常知識者便可瞭解本發明之其它目的，以及本發明之技術手段及實施態樣。
本發明的詳細說明於隨後描述，這裡所描述的較佳實施例是作為說明和描述的用途，並非用來限定本發明之範圍。
此處說明一個典型的封裝結構。請參考第2圖，第2圖係說明具有一強化層14之半導體封裝結構50。強化層用來增強積體電路(IC)晶片和導線架之間的凸塊機械強度，以避免凸塊在高溫迴焊製程中倒塌。半導體封裝結構50包含一導線架20、一積體電路(IC)晶片10、複數個凸塊13和一強化層14。導線架20具有 複數個引腳21，且複數個接合墊11配置在積體電路(IC)晶片10的表面。凸塊13連接積體電路(IC)晶片10表面的接合墊11至導線架20的引腳21，其中凸塊13之組成成分包含錫、銅、鉛或銀。強化層14覆蓋於引腳21及凸塊13。強化層14可以由金屬製成，較佳來說，更可以是一連續之金屬層，例如銅。強化層14的熔點大於凸塊13的熔點。而強化層14可由電鍍方式形成。
為了解決錫橋接問題，本發明揭露了一種封裝結構，其具有一覆蓋於焊接材料的覆蓋金屬材料。一焊接材料連接一導電元件至一基板，以及一覆蓋金屬材料主要覆蓋於焊接材料的表面。導電元件可為金屬氧化層場效電晶體、絕緣闡雙極電晶體(IGBT)、二極體、電阻、扼流線圈(choke)或電容。導電元件的電極在此實施例可配置成：每個電極係從一部分的導電元件下表面，經由一部分的導電元件側表面，延伸至一部分的導電元件上表面，其中焊接材料係覆蓋於該部分的導電元件上表面、該部分的導電元件下表面和該部分的導電元件側表面。基板具有複數個焊接墊，較佳來說，基板為一印刷電路板(PCB,printed circuit board)。然而，基板並不侷限於印刷電路板(PCB,printed circuit board)。
第3圖說明了本發明封裝結構100之剖面示意圖。結構100包含了一印刷電路板(PCB,printed circuit board)101、複數個焊接 墊102、一導電元件103、一焊接材料104和一覆蓋金屬材料105。
印刷電路板(PCB,printed circuit board)101具有的複數個焊接墊102在其上。焊接墊102可由任何適當的金屬材料製成，例如錫、鉛、鋅、銀或其結合。導電元件103藉由迴焊製程之焊接配置在印刷電路板(PCB,printed circuit board)101上。導電元件103可為金屬氧化層場效電晶體、絕緣闡雙極電晶體(IGBT)、二極體、電阻、扼流線圈(choke)或電容。導電元件103具有至少兩個電極。
第4A圖進一步說明了導電元件103和電極115、116的透視圖。在一個實施例中，導電元件103具有至少兩個電極：一第一電極115，係包含一第一側表面111和一鄰近第一側表面111的第一區域113；一第二電極116，係包含一第二側表面112和一鄰近第二側表面112的第二區域114。
第一電極115可配置在導電元件103的一部分第一側表面111和一部分第一區域113，以及第二電極116可配置在導電元件103的一部分第二側表面112和一部分第二區域114。第4B圖進一步說明了導電元件103和電極115、116的另一個透視圖。在一個實施例中，導電元件103具有兩個電極：一第一電極115，係包含一部分的第一側表面111和一部分鄰近第一側表面111的 第一區域113；一第二電極116，係包含一部分的第二側表面112和一部分鄰近第二側表面112的第二區域114。
請再次參考第4A圖和第4B圖，一部分的第一電極115和一部分的第二電極116配置在導電元件103相對的側表面上。換句話說，第一電極配置在從一第一部分的下表面，經由一部分的第一側表面，到一第一部分的上表面；以及第二電極配置在從一第二部分的下表面，經由一部分的第二側表面，到一第二部分的上表面。在一個實施例中，電極115、116使用的材料為錫。
請返回參考第3圖，一焊接材料104電性連接電極115、116至焊接墊102。在一個較佳實施例中，焊接材料104完全覆蓋電極115、116和焊接墊102。焊接材料104覆蓋一部分的第一側表面111、第一區域113、一部分的第二側表面112以及第二區域114。換句話說，焊接材料104進一步覆蓋一部分導電元件103上表面117和一部分導電元件103下表面119。焊接材料104可為任何適當的金屬材料，例如錫、鉛、鋅、銀或其結合。較佳來說，焊接材料104為錫。
焊接材料104可以不完全覆蓋電極115、116和焊接墊102。在一個較佳實施例中，覆蓋金屬材料105可覆蓋電極115、116和焊接材料104露出的複數個區域，其中該露出的複數個區域包 含熔點比覆蓋金屬材料105低的金屬材料。覆蓋金屬材料105和被覆蓋複數個部分104、115、116中每一個在其之間的界面結合而形成一合金相。合金相為一保護層，在迴焊製程中，合金相可避免被覆蓋複數個部分104、115、116中每一個流過覆蓋金屬材料105。此合金相的熔點高於被覆蓋複數個部分104、115、116中每一個的熔點。
在一個實施例中，覆蓋金屬材料105可覆蓋在電極115、116，焊接墊102和焊接材料104露出的複數個區域，其中該露出的複數個區域包含熔點比覆蓋金屬材料105低的金屬材料。覆蓋金屬材料105和被覆蓋複數個部分102、104、115、116中每一個在其之間的界面結合而形成一合金相。合金相為一保護層，在迴焊製程中，合金相可避免被覆蓋複數個部分102、104、115、116中每一個流過覆蓋金屬材料105。此合金相的熔點高於被覆蓋複數個部分102、104、115、116中每一個的熔點。
在一個實施例中，焊接材料104由錫製成，以及覆蓋金屬材料105由銅製成。在一個實施例中，焊接材料104由錫製成；以及覆蓋金屬材料105由銅製成；第一焊接墊102、第二焊接墊102、第一電極115、和第二電極116也由錫製成。
在一個較佳實施例中，焊接材料104完全覆蓋電極115、116 和焊接墊102，以及覆蓋金屬材料105完全覆蓋焊接材料104的表面。覆蓋金屬材料105的熔點高於焊接材料104的熔點，以及焊接材料104和覆蓋金屬材料105在其之間的界面結合(共晶eutectic)而形成一合金相。在一個較佳實施例中，焊接材料104由錫製成，覆蓋金屬材料105由銅製成，以及合金相為銅合金，例如Cu3 Sn。合金相的熔點高於焊接材料104的熔點。在一個實施例中，初始合金相Cu6 Sn5 先出現；接著，在更多的銅擴散至初始合金相Cu6 Sn5 後，最後合金相Cu3 Sn出現。合金相為一保護層，在第二次迴焊製程中，合金相可避免焊接材料(錫)104流過覆蓋金屬材料(銅)105，其中第二次迴焊製程的操作溫度在焊接材料(錫)104的熔點和覆蓋金屬材料(銅)105熔點之間，以避免在電極115、116之間發生焊接材料(錫)104橋接的問題。
第5圖說明了本發明封裝結構100在封膠(molding)後之剖面示意圖。在封膠之前，一薄空隙118(見第3圖)存在於封裝結構100的內部且位於導電元件103的下方。空隙118填滿了封膠材料120，例如樹脂(resin)。封膠材料120也覆蓋導電元件103、焊接材料104和覆蓋金屬材料105。
第6圖為封裝結構100的製造流程圖。
在步驟201中，提供一基板101，基板包含在其上的一第一焊接墊102和一第二焊接墊102。較佳來說，基板101為一印刷 電路板(PCB,printed circuit board)。
在步驟202中，配置一導電元件103在基板101上，其中導電元件103包含一第一電極115和一第二電極116。第一電極115和第二電極116的配置已在第4A圖和第4B圖描述。
在步驟203中，使用一焊接材料104用以分別電性連接第一焊接墊102和第二焊接墊102至第一電極115和第二電極116。步驟203在第一次迴焊製程中執行。
在步驟204中，使用一覆蓋金屬材料105用以覆蓋焊接材料104、第一焊接墊102、第二焊接墊102、第一電極115和第二電極116露出的複數個區域，其中該露出的複數個區域包含包含熔點比覆蓋金屬材料105低的金屬材料。覆蓋金屬材料105和被覆蓋複數個部分102、104、115、116中每一個在其之間的界面結合而形成一合金相。合金相為一保護層，在迴焊製程中，合金相可避免被覆蓋複數個部分102、104、115、116中每一個流過覆蓋金屬材料105。
在一個較佳實施例中，焊接材料104完全覆蓋電極115、116和焊接墊102，以及覆蓋金屬材料105完全覆蓋焊接材料104的表面。焊接材料104和覆蓋金屬材料105在其之間的界面結合而 形成一合金相。合金相為一保護層，可避免焊接材料104流過覆蓋金屬材料105。
步驟204可由已知的技術達成，例如電鍍或化學鍍(無電極電鍍)，較佳為化學鍍(無電極鍍)。因為化學鍍所使用的溶液易流進封裝結構100內部的薄空隙118中，因此反應均勻度易於控制。在一個實施例中，在化學鍍之前，可先移除焊接材料104、第一焊接墊102、第二焊接墊102、第一電極115和第二電極116露出的複數個區域上的氧化層，如此可增進化學鍍(無電極電鍍)的效果，例如覆蓋金屬材料105和露出的複數個區域之間具有較強的附著力、避免在覆蓋金屬材料105和露出的複數個區域之間的界面產生孔洞等等。接著，利用一封膠材料120覆蓋導電元件103、焊接材料104和覆蓋金屬材料105。在第二次迴焊製程中，焊接材料104和覆蓋金屬材料105在其之間結合(共晶eutectic)而形成一合金相。在一個實施例中，第二次迴焊製程的操作溫度介於焊接材料104的熔點和覆蓋金屬材料105的熔點之間。因為覆蓋金屬材料105的熔點高於焊接材料104的熔點，因此該合金相的熔點比焊接材料104高。
在一個較佳實施例中，焊接材料104由錫製成，覆蓋金屬材料105由銅製成，以及合金相為銅合金，例如Cu3 Sn。在一個實施例中，初始合金相Cu6 Sn5 先出現；接著，在更多的銅擴散至 初始合金相Cu6 Sn5 後，最後合金相Cu3 Sn出現。合金相為一保護層，在第二次迴焊製程中，合金相可避免焊接材料(錫)104流過覆蓋金屬材料(銅)105(迴焊溫度小於300℃)。因此，可避免焊接材料(錫)104橋接的問題。
從上述實施例描述而知本發明的結構和製造方法可以提供一個方案避免錫橋接問題，而可以確保產品的品質。
雖然本發明以前述之較佳實施例揭露如上，然其並非用以限定本發明，任何熟習相像技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。
1‧‧‧內部元件
2‧‧‧錫電極
3‧‧‧焊接材料
4‧‧‧焊接墊
5‧‧‧印刷電路板
6‧‧‧錫橋接
8‧‧‧封膠材料
9‧‧‧孔洞
10‧‧‧積體電路晶片
11‧‧‧接合墊
13‧‧‧凸塊
14‧‧‧強化層
20‧‧‧導線架
21‧‧‧引腳
50‧‧‧半導體封裝結構
100‧‧‧封裝結構
101‧‧‧基板
102‧‧‧焊接墊
103‧‧‧導電元件
104‧‧‧焊接材料
105‧‧‧覆蓋金屬材料
111‧‧‧第一側表面
112‧‧‧第二側表面
113‧‧‧第一區域
114‧‧‧第二區域
115‧‧‧第一電極
116‧‧‧第二電極
117‧‧‧導電元件上表面
118‧‧‧空隙
119‧‧‧導電元件下表面
120‧‧‧封膠材料
201‧‧‧步驟
202‧‧‧步驟
203‧‧‧步驟
204‧‧‧步驟
第1A圖為描述錫橋接問題的一個說明圖示；第1B圖為描述錫橋接問題的另一個說明圖示；第2圖描述具有一強化層的半導體封裝結構；第3圖描述本發明封裝結構的剖面示意圖；第4A圖為進一步描述導電元件和電極的一個說明圖示；第4B圖為進一步描述導電元件和電極的另一個說明圖示；第5圖描述封裝結構在封膠後的剖面示意圖； 第6圖為封裝結構的製造流程圖。
100‧‧‧封裝結構
101‧‧‧基板
102‧‧‧焊接墊
103‧‧‧導電元件
104‧‧‧焊接材料
105‧‧‧覆蓋金屬材料
111‧‧‧第一側表面
112‧‧‧第二側表面
113‧‧‧第一區域
114‧‧‧第二區域
115‧‧‧第一電極
116‧‧‧第二電極
117‧‧‧導電元件上表面
118‧‧‧空隙
119‧‧‧導電元件下表面

Claims (19)

  1. 一種封裝結構，包含：一基板，係包含在其上的一第一焊接墊和一第二焊接墊；一導電元件，係配置在該基板上，其中該導電元件具有一本體，該本體包含一外表面，該外表面包含一上表面、一下表面、一第一側表面和一第二側表面，其中該導電元件包含一第一電極和一第二電極，其中該第一電極配置在該外表面的一第一部分之上且從該下表面的一第一部分，經由該第一側表面的一部份，到該上表面的一第一部份；該第二電極配置在該外表面的一第二部分之上且從該下表面的一第二部分，經由該第二側表面的一部份，到該上表面的一第二部分；一第一金屬材料，係覆蓋該第一電極以及第二電極，其中該第一金屬材料是與該第一焊接墊和該第二焊接墊接觸用以分別電性連接該第一焊接墊和該第二焊接墊至該第一電極和該第二電極；以及一第二金屬材料，係覆蓋該第一金屬材料，其中該第二金屬材料的一第一部份以及一第二部分，分別從該傳導元件的本體的下表面的一第三部份以及一第四部分延伸至該基板，其中該下表面的該第三部份以及該第四部份介於該傳導元件的本體的下表面的該第一部分以及該 第二部分之間，其中該第一金屬材料具有低於該第二金屬材料的熔點。
  2. 如申請專利範圍第1項所述之封裝結構，其中該第二金屬材料和該第一金屬材料在該第二金屬材料和該第一金屬材料之間的界面結合而形成一合金相。
  3. 如申請專利範圍第1項所述之封裝結構，其中該第一金屬材料從該上表面經由該傳導元件的本體的側表面延伸至該下表面，其中該第二金屬材料的一第三部份和一第四部份分別從該傳導元件的本體的上表面延伸至該基板。。
  4. 如申請專利範圍第1項所述之封裝結構，進一步包含：一封膠材料，係覆蓋在該導電元件、該第一金屬材料和該第二金屬材料。
  5. 如申請專利範圍第2項所述之封裝結構，其中該第一金屬材料由錫製成，以及該第二金屬材料由銅製成。
  6. 如申請專利範圍第5項所述之封裝結構，其中該第一焊接墊、該第二焊接墊、該第一電極和該第二電極由錫製成。
  7. 如申請專利範圍第6項所述之封裝結構，其中該合金相包含Cu3 Sn。
  8. 如申請專利範圍第1項所述之封裝結構，其中該基板為一印刷電路板(PCB)。
  9. 如申請專利範圍第1項所述之封裝結構，其中該導電元件包含金屬氧化層場效電晶體、絕緣闡雙極電晶體(IGBT)、二極體、電阻、扼流線圈(choke)或電容其中至少一個。
  10. 如申請專利範圍第4項所述之封裝結構，進一步包含一位於該導電元件下方的空隙，其中該空隙由該封膠材料填滿。
  11. 如申請專利範圍第8項所述之封裝結構，其中該第一金屬材料由錫製成，該第二金屬材料由銅製成，以及該合金相包含Cu3 Sn。
  12. 一種封裝結構之製造方法，該方法包含了下列步驟：a.提供一基板，該基板包含在其上的一第一焊接墊和一第二焊接墊；b.配置一導電元件在該基板上，其中該導電元件具有一本體，該本體包含一外表面，該外表面包含一上表面、一 下表面、一第一側表面和一第二側表面，其中該導電元件包含一第一電極和一第二電極，其中該第一電極配置在該外表面的一第一部分之上且從該下表面的一第一部份，經由該第一側表面的一部份，到該上表面的一第一部份；該第二電極配置在該外表面的一第二部分之上且從該下表面的一第二部分，經由該第二側表面的部分，到該上表面的一第二部分；c.覆蓋一第一金屬材料在該第一電極和第二電極之上，其中該第一金屬材料與該第一焊接墊和該第二焊接墊接觸，用以分別電性連接該第一焊接墊和該第二焊接墊至該第一電極和該第二電極；以及d.覆蓋一第二金屬材料在該第一金屬材料之上，其中該第二金屬材料的一第一部分以及一第二部分，分別從該傳導元件的本體的下表面的一第三部份以及一第四部分延伸至該基板，其中該下表面的該第三部份以及該第四部份介於該傳導元件的本體的下表面的該第一部分以及該第二部分之間，其中該第一金屬材料具有低於該第二金屬材料的熔點。
  13. 如申請專利範圍第12項所述之方法，其中該第二金屬材料和該第一金屬材料在該第二金屬材料和該第一金屬材料之間的界面結合而形成一合金相。
  14. 如申請專利範圍第12項所述之方法，其中該第二金屬材料覆蓋該第一金屬材料係藉由化學鍍完成。
  15. 如申請專利範圍第13項所述之方法，其中該合金相在一迴焊製程中形成，以及該迴焊製程的操作溫度在該第一金屬材料的熔點和該第二金屬材料的熔點之間。
  16. 如申請專利範圍第12項所述之方法，該方法進一步包含下列步驟：e.使用一封膠材料覆蓋該導電元件、該第一金屬材料和該第二金屬材料。
  17. 如申請專利範圍第16項所述之方法，其中步驟d進一步包含形成一空隙在該導電元件下方，以及步驟e進一步包含該空隙由該封膠材料填滿。
  18. 如申請專利範圍第12項所述之方法，其中該第一金屬材料由錫製成，以及該第二金屬材料由銅製成。
  19. 一種封裝結構，包含： 一基板，係包含在其上的一第一焊接墊和一第二焊接墊；一電子元件，係配置在該基板上，其中該電子元件具有一本體，該本體包含一外表面，又該外表面包含一上表面、一下表面、一第一側表面和一第二側表面，其中該電子元件包含一第一電極和一第二電極，其中該第一電極配置在該外表面的一第一部分之上且從該下表面的一第一部分，經由該第一側表面的一部份，到該上表面的一第一部份；該第二電極配置在該外表面的一第二部分之上且從該下表面的一第二部分，經由該第二側表面的一部份，到該上表面的一第二部分；一第一金屬材料，係覆蓋該第一電極以及第二電極，其中該第一金屬材料是與該第一焊接墊和該第二焊接墊接觸用以分別電性連接該第一焊接墊和該第二焊接墊至該第一電極和該第二電極；以及一第二金屬材料，係覆蓋該第一金屬材料其中該第二金屬材料的一第一部份以及一第二部分，分別從該電子元件的本體的下表面的一第三部份以及一第四部分延伸至該基板，其中該下表面的該第三部份以及該第四部份介於該電子元件的本體的下表面的該第一部分以及該第二部分之間，其中該第一金屬材料具有低於該第二金屬材料的熔點。
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