CN103456704A - 连接件位点间隔的设计方案及得到的结构 - Google Patents
连接件位点间隔的设计方案及得到的结构 Download PDFInfo
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- CN103456704A CN103456704A CN2013101991242A CN201310199124A CN103456704A CN 103456704 A CN103456704 A CN 103456704A CN 2013101991242 A CN2013101991242 A CN 2013101991242A CN 201310199124 A CN201310199124 A CN 201310199124A CN 103456704 A CN103456704 A CN 103456704A
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Abstract
提供了一种用于防止钝化层中的裂纹的系统和方法。在一实施例中,接触焊盘具有第一直径并且穿过钝化层的开口具有第二直径,其中第一直径比第二直径大第一距离,该第一距离为约10μm。在另一实施例中,形成穿过开口的凸块下金属化层,该凸块下金属化层具有第三直径,第三直径比第一直径大第二距离,该第二距离为约5μm。在又一实施例中,第一距离和第二距离之和大于约15μm。本发明公开了连接件位点间隔的设计方案及得到的结构。
Description
本申请要求于2012年5月30日提交的名称为“Design Scheme forConnector Site Spacing and Resulting Structures(连接件位点间隔的设计方案及得到的结构)”的申请号为61/653,277的美国临时申请的优先权,其全部内容结合于此作为参考。
技术领域
本发明涉及半导体器件及其制造方法,更具体而言,涉及钝化层、凸块下金属化层和在接触焊盘上形成的铜柱。
背景技术
通常,半导体管芯可以通过一种利用外部连接的封装类型与该半导体管芯外部的其他器件连接。可以通过以下方式形成外部连接:首先形成与半导体管芯上的接触焊盘电连接的凸块下金属化层,然后在凸块下金属化层上放置其他导电材料。位于凸块下金属化层和接触焊盘之间的可以是用于保护和支撑半导体管芯的结构的钝化层。一旦处于合适的位置,其他导电材料可以被放置成与外部器件物理接触,由此半导体器件可以与外部器件接合。通过这种方式,可以在半导体管芯和诸如印刷电路板或另一半导体管芯等外部器件之间建立物理接触和电接触。
然而,构成凸块下金属化层、钝化层和接触焊盘的材料是用不同的工艺形成的不同类型的材料并且在彼此的顶部上制造而且可以包括非常不同类型的材料,诸如介电材料、金属化材料、蚀刻停止材料、阻挡层材料和在半导体管芯的形成中使用的其他材料。这些不同材料中的每一种都具有彼此互不相同的独特性能,这可能导致对每一层中的材料施加显著的应力。如果不加控制,这些应力可能导致例如在接触焊盘和凸块下金属化层之间的钝化层内形成裂纹。这些裂纹可能在半导体管芯的制造工艺期间或在其预期应用期间损伤或甚至毁坏半导体管芯。
发明内容
为了解决现有技术中存在的问题,根据本发明的一方面,提供了一种半导体器件,包括:具有第一直径的接触焊盘;和与所述接触焊盘电连接的凸块下金属化层,所述凸块下金属化层具有第二直径,其中所述第二直径比所述第一直径大第一距离,所述第一距离为约5μm。
所述的半导体器件还包括至少部分地位于所述接触焊盘和所述凸块下金属化层之间的第一钝化层。
所述的半导体器件还包括穿过所述钝化层的开口,其中所述凸块下金属化层延伸穿过所述开口与所述接触焊盘接触,所述开口具有第三直径,其中所述第三直径比所述第一直径小第二距离,所述第二距离为约10μm。
在所述的半导体器件中,所述第一距离和所述第二距离之和大于约15μm。
所述的半导体器件,还包括在所述凸块下金属化层上形成的外部接触件。
在所述的半导体器件中,所述外部接触件是铜柱。
在所述的半导体器件中,所述接触焊盘是铝。
根据本发明的另一方面,提供了一种半导体器件,包括:位于衬底上的接触焊盘,所述接触焊盘具有第一尺寸;至少部分地位于所述接触焊盘上方的钝化层;穿过所述钝化层的开口,所述开口具有第二尺寸;以及延伸穿过所述开口接触所述接触焊盘的凸块下金属化层,所述凸块下金属化层具有第三尺寸,其中所述第三尺寸比所述第一尺寸大第一数值,所述第一数值大于约5μm。
在所述的半导体器件中,所述第一尺寸比所述第二尺寸大第二数值,所述第二数值大于约10μm。
在所述的半导体器件中,所述第一数值和所述第二数值之和大于约15μm。
所述的半导体器件还包括位于所述凸块下金属化层上方的外部接触件。
在所述的半导体器件中,所述外部接触件是铜柱。
在所述的半导体器件中,所述接触焊盘是铝。
根据本发明的又一方面,提供了一种制造半导体器件的方法,所述方法包括:在衬底上形成接触焊盘,所述接触焊盘具有第一直径;在所述接触焊盘上方沉积钝化层;对所述钝化层进行图案化以形成穿过所述钝化层的开口,所述开口具有小于所述第一直径的第二直径;以及形成延伸穿过所述开口的凸块下金属化层,所述凸块下金属化层具有第三直径,所述第三直径比所述第一直径大第一距离,所述第一距离大于约5μm。
在所述的方法中,所述第一直径比所述第二直径大第二距离,所述第二距离大于约10μm。
在所述的方法中,所述第一距离和所述第二距离之和大于约15μm。
在所述的方法中,形成所述凸块下金属化层还包括:覆盖沉积凸块下金属化层;在所述凸块下金属化层上形成外部接触件;以及将所述外部接触件用作掩模去除部分所述凸块下金属化层。
在所述的方法中,形成所述外部接触件还包括形成铜柱。
在所述的方法中,至少部分地利用电镀工艺实施形成所述铜柱。
在所述的方法中,形成所述接触焊盘还包括:覆盖沉积铝层;以及去除部分所述铝层以形成所述接触焊盘。
附图说明
为了更充分地理解本发明实施例及其优点,现在将结合附图所进行的以下描述作为参考,其中:
图1A-图1B示出根据实施例的接触焊盘、钝化层和穿过钝化层的开口的形成;
图2示出根据实施例的凸块下金属化层和外部接触件的形成;
图3示出根据实施例的第一覆盖层和第二覆盖层的形成;
图4示出根据实施例的凸块下金属化层的图案化;
图5示出实施例的有益效果的实验数据;
图6A-图6C示出根据实施例的更多实验数据;以及
图7示出根据实施例的回流工艺。
除非另有说明,不同附图中的相应标号和符号通常是指相应部件。绘制附图用于清楚地示出实施例的相关方面而不必成比例绘制。
具体实施方式
下面,详细讨论本发明实施例的制造和使用。然而,应该理解,本发明提供了许多可以在各种具体环境中实现的可应用的发明构思。所讨论的具体实施例仅是制造和使用所公开的主题的示例性具体方式,而不用于限制本发明实施例的范围。
结合具体环境来描述实施例,即钝化层、凸块下金属化层和在接触焊盘上形成的铜柱。然而,其他实施例也可以适用于其他类型的外部接触件。
现参照图1,示出半导体器件100的实施例的一部分。在一实施例中,半导体器件100可以包括半导体衬底101、有源器件102、金属化层103、接触焊盘105和第一钝化层107。半导体衬底101可以包括掺杂或未掺杂的块状硅或绝缘体上硅(SOI)衬底的有源层。通常,SOI衬底包括诸如硅、锗、硅锗、SOI、绝缘体上硅锗(SGOI)或这些的组合的半导体材料的层。可以使用的其他衬底包括多层衬底、梯度衬底或混合取向衬底。
有源器件102可以形成在半导体衬底101上(在图1A中表示为单个晶体管)。本领域普通技术人员将意识到,诸如电容器、电阻器、电感器等各种有源器件和无源器件可以用于生成半导体器件100的设计所期望的结构和功能要求。可以使用任何合适的方法在半导体衬底101内或在半导体衬底101的表面上形成有源器件102。
然而,本领域的普通技术人员将认识到,带有有源器件102的上述半导体衬底101不是唯一可以使用的衬底。也可以可选地利用其他衬底,诸如其中不含有有源器件的封装衬底或中介层(interposer)。这些衬底和任何其他合适的衬底都可以被可选地使用并且预期全都包含在本发明实施例的范围内。
金属化层103形成在半导体衬底101和有源器件102的上方,并被设计成与各种有源器件连接以形成功能电路。虽然金属化层103在图1中示出为单层,但是金属化层103可以由介电材料(例如低k介电材料)和导电材料(例如铜)的交替层形成并且可以通过任何合适的工艺(诸如沉积、镶嵌、双镶嵌等)形成。在一实施例中,可以具有通过至少一个层间介电层(ILD)与半导体衬底101分开的四个金属化层,但是金属化层103的精确数量取决于半导体器件100的设计。
接触焊盘105可以形成在金属化层103上方并且与金属化层103电接触。接触焊盘105可以包括铝,但是也可以可选地使用其他材料,诸如铜。接触焊盘105可以通过以下方式形成:使用诸如溅射的沉积工艺形成材料层(未示出),然后可以通过合适的工艺(诸如光刻掩蔽和蚀刻)去除部分该材料层以形成接触焊盘105。然而,可以使用任何其他合适的工艺形成接触焊盘105。形成的接触焊盘105的厚度可以介于约0.5μm和约4μm之间,诸如约1.45μm。
另外,可以以降低或消除第一钝化层107内围绕接触焊盘105的裂纹的发生的方式制造接触焊盘105。具体地说,通过制造与穿过第一钝化层107的开口109有一定关系(在下文进一步讨论)和/或与UBM层201(未在图1中示出,但在下文将参照图2-图4示出和讨论)有一定关系的接触焊盘105,可以大幅降低或甚至消除在第一钝化层107内可能形成的裂纹的数量。在一实施例中,形成的接触焊盘105的直径可以为第一距离d1,该第一距离d1在约35μm和约100μm之间,诸如约74μm。
第一钝化层107可以在半导体衬底101上在金属化层103和接触焊盘105上方形成。第一钝化层107可以由一种或多种合适的介电材料制成,诸如氧化硅、氮化硅、低k电介质(诸如碳掺杂的氧化物)、极低k电介质(诸如多孔碳掺杂的二氧化硅)、这些的组合等。第一钝化层107可以通过诸如化学汽相沉积(CVD)的工艺形成,但是可以使用任何合适的工艺,并且第一钝化层107的厚度可以介于约0.5μm和约5μm之间,诸如约
在已经形成第一钝化层107之后,可以通过去除部分第一钝化层107以暴露出下面的接触焊盘105的至少一部分来形成穿过第一钝化层107的开口109。开口109允许接触焊盘105和UBM层201(在下文将参照图2讨论)之间接触。可以使用合适的光刻掩模和蚀刻工艺形成开口109,但是可以使用任何用于暴露出部分接触焊盘105的合适的工艺。
开口也可以被制造成具有第二直径d2,为了帮助降低或消除第一钝化层107内的裂纹的发生,该第二直径d2将与接触焊盘105的第一距离d1协同起作用。在一实施例中,开口和接触焊盘105之间的第一直径差值(在图1中用第三距离d3表示)可以保持大于约10μm(每侧5μm),诸如约11μm。通过保持这一差值大于约10μm,可以更好地处理第一钝化层107内围绕接触焊盘105的应力而不会产生可能损伤半导体器件100的裂纹。
图1B的图表示出在只增加第三距离d3的情况下出现这种裂纹数量减少(图表中标记的第五距离d5未在图1A中示出,但在下文将参照图2-图4说明和讨论)。具体地说,在其中半导体器件100具有外部接触件200(未在图1A中示出,但在下文参照图2说明和讨论)的实施例中,外部接触件200具有45/0/0凸块体系(其中外部接触件200具有约45μm的铜层且不具有其他层,诸如镍层或无铅焊料覆盖层),并且所有的其他变量保持不变,第二直径d2从65μm降低至55μm,这也导致第三距离d3从9μm增加至19μm。随着第三距离d3的增加,发生的裂纹的数量从74降低至20。这样,通过控制第三距离d3,可以大幅降低第一钝化层107中的裂纹的数量,而且可以提高半导体器件100的整体效率。
图2示出通过第一钝化层107与接触焊盘105电连接的外部接触件200的形成。在一实施例中,外部接触件200可以是例如铜柱(copper pillar)或铜杆(copper post)。然而,实施例并不限于这些,而且可以可选地是焊料凸块、铜凸块或可以被制作成提供从半导体器件100至其他外部器件(未在图2中单独示出)的电连接的其他合适的外部接触件200。所有这些外部接触件预期全都包含在实施例的范围内。
在其中外部接触件200是铜柱的实施例中,可以通过首先形成凸块下金属(UBM)层201、晶种层203和具有开口的聚合物层205来形成外部接触件200。接触件207可以在聚合物层205的开口内形成。UBM层201可以形成为与接触焊盘105电接触。UBM层201可以包括单个导电材料层,诸如钛层或镍层。可选地,UBM层201可以包括多个子层(未示出)。本领域普通技术人员将意识到许多合适的材料和层的布置(诸如铬/铬铜合金/铜/金的布置、钛/钛钨/铜的布置或铜/镍/金的布置)适用于形成UBM层201。可以用于UBM层201的任何合适的材料或材料层预期全都包含在现有实施例的范围内。取决于期望的材料,可以利用诸如溅射、蒸发或PECVD工艺的工艺制造UBM层201。形成的UBM层201的厚度可以介于约0.7μm和约10μm之间,诸如约5μm。
晶种层203可以形成为与接触焊盘105的顶部上的UBM层201电接触。晶种层203是在后续的加工步骤中帮助更厚的层形成的薄导电材料层。晶种层203可以包括约厚的钛层,接着包括约厚的同层,晶种层203将被进一步用于连接至接触件207。取决于期望的材料,可以利用诸如溅射、蒸发或PECVD工艺的工艺制造晶种层203。形成的晶种层203的厚度可以介于约0.7μm和约10μm之间,诸如约5μm。
可以通过在晶种层203上涂层形成聚合物层205。聚合物层205可以包括基于苯的聚合物、基于二氧六环的聚合物、基于甲苯的聚合物、基于苯基硫醇的聚合物、基于苯酚的聚合物、基于环己烷的聚合物、基于对甲酚的聚合物、这些的组合等。形成方法包括旋转涂布或其他常用的方法。聚合物层205的厚度可以在约5μm和约30μm之间。可以利用光刻技术形成聚合物层205的开口以暴露出晶种层203的一部分,该部分将用来形成接触件207。
接触件207包括一种或多种导电材料,诸如铜、钨、其他导电金属等,并且可以例如通过电镀、无电镀等形成。在一实施例中,使用电镀工艺,其中半导体器件100淹没或浸没在电镀溶液中。半导体器件100的表面与外部DC电源的负端电连接从而使得半导体器件100充当电镀工艺中的阴极。固体导电阳极(诸如铜阳极)也浸没在溶液中并且与电源的正端连接。来自阳极的原子溶解在溶液中,阴极(例如半导体器件100)从溶液中获取溶解的原子,从而电镀半导体器件100的暴露的导电区,例如晶种层203在聚合物层205的开口内的暴露部分。
图3示出在接触件207上形成第一覆盖层301和第二覆盖层303。在一实施例中,第一覆盖层301可以形成在接触件207的上方。例如,在一实施例中,接触件207由铜形成,第一覆盖层301可以由镍形成,但是也可以使用其他材料,诸如Pt、Au、Ag、Ni、Co、V、Cr、Sn、Pd、Bi、Cd、Zn、这些的组合等。可以通过任何数量的合适技术形成第一覆盖层301,包括PVD、CVD、ECD、MBE、ALD、电镀等。
第二覆盖层303可以在第一覆盖层301上形成。第二覆盖层303可以是包含SnAu、SnPb、高Pb材料、基于Sn的焊料、无铅焊料、SnAg焊料、SnAgCu焊料的焊料材料或其他合适的导电材料。可以通过任何数量的合适技术形成第二覆盖层303,包括PVD、CVD、ECD、MBE、ALD、电镀等。
接触件207上的层(诸如第一覆盖层301和第二覆盖层303)的数量是为了说明的目的而不是限制性的。可以在接触件207上形成不同数量的层。接触件207上的各种层可以用不同的材料形成并具有各种形状。接触件207、第一覆盖层301和第二覆盖层303可以统称为金属接触件120。
图4示出聚合物层205的去除和晶种层203和UBM层201的图案化。在一实施例中,可以使用等离子体灰化工艺去除聚合物层205,通过该工艺聚合物层205的温度可以被升高直到聚合物层205经历热分解并可以被去除。然而,可以可选地利用任何其他合适的工艺,诸如湿法剥离。聚合物层205的去除可以暴露出下面的部分晶种层203。
可以通过例如湿法或干法蚀刻工艺去除晶种层203的暴露部分。例如,在干法蚀刻工艺中,将第一覆盖层301和第二覆盖层303用作掩模,可以将反应物导向晶种层203。可选地,为了去除晶种层203的暴露部分,可以通过喷雾或以其他方式使蚀刻剂与晶种层203接触。晶种层203的暴露部分被蚀刻去除之后,将暴露出UBM层201的一部分。
然后通过例如干法蚀刻工艺去除UBM层201的暴露部分。可以利用诸如CF4或CHF3的化学物质进行干法蚀刻。可以使用任何现有的蚀刻技术或将来开发的蚀刻技术。UBM层201被蚀刻去除之后,将暴露出第一钝化层107的一部分。
一旦UBM层201的暴露部分被去除了,UBM层201可以具有第四直径d4,为了帮助降低或消除可能在第一钝化层107内形成的裂纹,该第四直径d4将与接触焊盘105的第一直径d1协同使用。具体地说,为了有助于防止在第一钝化层107内形成裂纹,UBM层201和接触焊盘105之间的第二直径差值(在图4中用第五距离d5表示)可以保持一定的范围或比值。
例如,图5示出当第五距离d5为不同的数值时所导致的第一钝化层107中发生的裂纹的数量。从图中可以地清楚看到,当第五距离d5小于约8μm时,在第一钝化层107内将形成大量的裂纹。然而,当第五距离d5大于约5μm时,第一钝化层107中的裂纹的数量大幅减少,而当第五距离d5为约10μm以上时,裂纹的减少数量将趋近饱和。通过减少裂纹的数量,可以改进整个半导体器件100的可靠性,从而提高性能和收益。
在另一实施例中,为了产生甚至更好的结果,除了仅仅改变第三距离d3(如上文参照图1A-图1B描述的)或仅仅改变第五距离d5(如上文参照图4-图5描述的)之外,可以同时改变第三距离d3和第五距离d5。例如,在一实施例中,可以保持第三距离d3大于10μm同时保持第五距离d5大于约5μm。另外,可以保持第三距离d3和第五距离d5之和(d3+d5)大于约15μm。
图6A至图6B示出联合改变第三距离d3和第五距离d5的比较性结果。例如,在图6A中,对于可以包括Sn、Ag和/或Cu并且其中凸块体系为45/0/0(与上文图1B类似)并与例如牺牲层接合的实施例来说,当第三距离d3是24μm(每侧的第三距离d3是12μm)并且第五距离d5是23μm(11.5μm/侧),联合后的总和是47μm(23.5μm/侧)时,第一钝化层107中的裂纹的数量可以被降低至小于20。
图6B以图形格式示出图6A中示出的表格的结果。从图中可以看出,通过控制第五距离d5之外还控制第三距离d3,可以降低第一钝化层107内的裂纹的数量。
图6C示出单独的凸块体系的另一结果表格,在该单独的凸块体系中外部接触件200具有35/0/15+SnCu凸块体系。例如,外部接触件200可以具有约35μm的铜层,且在铜层的上方具有约15μm的SnAg层。可以在SnAg上方使用SnCu覆盖件,并且SnCu覆盖件可以包括约98.2%的Sn和约1.8%的Cu。从图中可以看出,通过保持第三距离d3大于10μm(5μm/侧)和保持第五距离d5大于5μm(2.5μm/侧),第一钝化层107内的裂纹的数量可以保持为小数量。然而,如果不使用这些比值,例如如果第三距离d3小于10μm(5μm/每侧),诸如9μm(4.5μm/每侧),在第一钝化层107内可能发生的裂纹的数量可能猛增至较大的数量。
图7示出,一旦第二覆盖层303已在第一覆盖层301上形成并且UBM层201的暴露部分被去除,可以实施回流工艺以将第二覆盖层303转化成凸块形状。在回流工艺中,第二覆盖层303的温度升高至约200℃和约260℃之间(诸如约250℃),持续约10秒和约60秒之间(诸如35秒)。该回流工艺部分地液化第二覆盖层303,然后由于第二覆盖层303的表面张力将其本身拉成期望的凸块形状。
通过在本文描述的关系内制造接触焊盘105、穿过第一钝化层107的开口和UBM层201,可以降低或消除第一钝化层107内形成的裂纹的数量。通过降低第一钝化层107内的不想要的裂纹的数量,可以在半导体器件100的进一步加工和使用过程中保持第一钝化层107提供的保护。这种保护提高制造工艺的整体效率并且为每个半导体器件带来更大的收益以及更好的改进。
在一实施例中,提供了一种半导体器件,该半导体器件包括具有第一直径的接触焊盘和与该接触焊盘电连接的凸块下金属化层。该凸块下金属化层具有第二直径,其中第二直径比第一直径大第一距离,该第一距离为约5μm。
在另一实施例中,提供了一种半导体器件,包括:位于衬底上的接触焊盘,该接触焊盘具有第一尺寸。钝化层至少部分地位于接触焊盘的上方,并且开口穿过该钝化层,该开口具有第二尺寸。凸块下金属化层延伸穿过该开口与接触焊盘接触,该凸块下金属化层具有第三尺寸,其中第三尺寸比第一尺寸大第一数值,该第一数值大于约5μm。
在又一实施例中,提供了一种制造半导体器件的方法,该方法包括在衬底上形成接触焊盘,该接触焊盘具有第一直径。在接触焊盘上方沉积钝化层,并且对钝化层进行图案化以形成穿过钝化层的开口,该开口具有小于第一直径的第二直径。形成延伸穿过开口的凸块下金属化层,该凸块下金属化层具有第三直径,第三直径比第一直径大第一距离,该第一距离大于约5μm。
尽管已经详细地描述了本发明实施例及其优势,但应该理解,可以在不背离所附权利要求限定的公开内容的精神和范围的情况下,进行各种改变、替换和更改。例如,可以改变外部接触件的类型,或可以改变使用的确切材料和工艺,但仍然保持在实施例的范围内。
而且,本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员根据本发明应很容易理解,根据本发明可以利用现有的或今后开发的用于执行与本文所述相应实施例基本上相同的功能或者获得基本上相同的结果的工艺、机器、制造、材料组分、装置、方法或步骤。因此,所附权利要求预期在其范围内包括这样的工艺、机器、制造、材料组分、装置、方法或步骤。
Claims (10)
1.一种半导体器件,包括:
具有第一直径的接触焊盘;和
与所述接触焊盘电连接的凸块下金属化层,所述凸块下金属化层具有第二直径,其中所述第二直径比所述第一直径大第一距离,所述第一距离为约5μm。
2.根据权利要求1所述的半导体器件,还包括至少部分地位于所述接触焊盘和所述凸块下金属化层之间的第一钝化层。
3.根据权利要求2所述的半导体器件,还包括穿过所述钝化层的开口,其中所述凸块下金属化层延伸穿过所述开口与所述接触焊盘接触,所述开口具有第三直径,其中所述第三直径比所述第一直径小第二距离,所述第二距离为约10μm。
4.根据权利要求3所述的半导体器件,其中,所述第一距离和所述第二距离之和大于约15μm。
5.根据权利要求1所述的半导体器件,还包括在所述凸块下金属化层上形成的外部接触件。
6.根据权利要求5所述的半导体器件,其中,所述外部接触件是铜柱。
7.根据权利要求1所述的半导体器件,其中,所述接触焊盘是铝。
8.一种半导体器件,包括:
位于衬底上的接触焊盘,所述接触焊盘具有第一尺寸;
至少部分地位于所述接触焊盘上方的钝化层;
穿过所述钝化层的开口,所述开口具有第二尺寸;以及
延伸穿过所述开口接触所述接触焊盘的凸块下金属化层,所述凸块下金属化层具有第三尺寸,其中所述第三尺寸比所述第一尺寸大第一数值,所述第一数值大于约5μm。
9.根据权利要求8所述的半导体器件,其中所述第一尺寸比所述第二尺寸大第二数值,所述第二数值大于约10μm。
10.一种制造半导体器件的方法,所述方法包括:
在衬底上形成接触焊盘,所述接触焊盘具有第一直径;
在所述接触焊盘上方沉积钝化层;
对所述钝化层进行图案化以形成穿过所述钝化层的开口,所述开口具有小于所述第一直径的第二直径;以及
形成延伸穿过所述开口的凸块下金属化层,所述凸块下金属化层具有第三直径,所述第三直径比所述第一直径大第一距离,所述第一距离大于约5μm。
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Also Published As
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CN103456704B (zh) | 2016-12-28 |
US9472521B2 (en) | 2016-10-18 |
TW201349420A (zh) | 2013-12-01 |
US20130320524A1 (en) | 2013-12-05 |
KR20130135042A (ko) | 2013-12-10 |
TWI625835B (zh) | 2018-06-01 |
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