CN103219325B - 多维集成电路结构及其形成方法 - Google Patents
多维集成电路结构及其形成方法 Download PDFInfo
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- CN103219325B CN103219325B CN201210171893.7A CN201210171893A CN103219325B CN 103219325 B CN103219325 B CN 103219325B CN 201210171893 A CN201210171893 A CN 201210171893A CN 103219325 B CN103219325 B CN 103219325B
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- tube core
- intermediate plate
- elecrical connector
- tube
- connector
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Classifications
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- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
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- H05K1/00—Printed circuits
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- H05K1/144—Stacked arrangements of planar printed circuit boards
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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Abstract
一种结构包括第一管芯、第二管芯、第三管芯和第四管芯。第一管芯和第二管芯均具有第一表面和第二表面。第一导电连接器连接至第一管芯和第二管芯的第一表面,以及第二导电连接器连接至第一管芯和第二管芯的第二表面。中介板位于第一管芯和第二管芯的上方。中介板的第一表面连接至第一导电连接器,以及中介板的第二表面连接至第三导电连接器。第三管芯和第四管芯位于中介板的上方并连接至第三导电连接器。第一管芯通过中介板通信连接至第二管芯,和/或第三管芯通过中介板通信连接至第四管芯。本发明还提供了多维集成电路结构及其形成方法。
Description
技术领域
本发明一般地涉及半导体技术领域,更具体地来说,涉及多维集成电路结构及其形成方法。
背景技术
因为集成电路的发明,半导体工业由于各种电子部件(即,晶体管、二极管、电阻器、电容器等)的集成密度的不断改进而经历了连续快速发展。通常,集成密度的这些改进源于最小部件尺寸的重复减小,从而允许更多的部件集成到给定的芯片面积中。
这些集成改进本质上主要是二维(2D)的,其中,由集成部件所占用的体积基本上位于半导体晶圆的表面上。尽管光刻的显著改进导致2D集成电路形成的重大改进,但对可以二维实现的密度存在物理限制。这些限制中的一个是需要制造这些部件的最小部件尺寸。此外,当将更多的器件置于一个芯片中时,要求更加复杂的设计。随着器件数量增加,额外限制源于器件之间的互连件的数量和长度的显著增加。当互连件的数量和长度增加时,电路RC延迟和功耗也增加。
由此形成了三维集成电路(3DIC),其中,可以堆叠至少两个管芯,在一个管芯中形成的硅通孔(TSV)将另一个管芯连接至封装衬底。这些3DIC通常会带来多个问题。例如,管芯(例如,顶部管芯)与另一部件的连接要求对介于管芯和另一部件之间的其他管芯的设计的依赖性。此外,通常通过成品率要求来限制堆叠高度。通常,随着堆叠高度由于添加管芯而增加,产量降低,这是因为任何管芯的故障都会导致整个结构具有缺陷,并且管芯增加的数量增加了任意一个管芯不合格的可能性。此外,底部管芯在堆叠中通常为热和电流“热点”,因为在管芯的正常操作期间,相对较大的电流从电源流经底部管芯到达顶部管芯,以及因为与最顶部管芯上方的封装散热器的较大距离。接下来,这些结构可以具有占位面积,该占位面积太小以致于不能包含各种应用所要求的所有可控崩溃芯片连接(ControlledCollapseChipConnection,“C4”)凸块或焊球。
此外,半导体工业形成已知的2.5维集成电路(2.5DIC),其中,至少两个管芯可以连接至中介板,中介板又连接至封装衬底。这些结构可以通过中介板大小来限制,其由通过刻线、产量和封装要求来限制。此外,占位面积对于一些产品来说太大。此外,与单片器件相比,没有减小配线长度和功耗。由于电信号的全局布线,在中介板的中心会发生热点。
发明内容
为了解决现有技术中所存在的缺陷,根据本发明的一方面,提供了一种结构,包括:第一管芯,具有第一表面和第二表面,所述第一管芯的第二表面与所述第一管芯的第一表面相对,对应的第一导电连接器连接至所述第一管芯的第一表面,以及对应的第二导电连接器连接至所述第一管芯的第二表面;第二管芯,具有第一表面和第二表面,所述第二管芯的第二表面与所述第二管芯的第一表面相对,对应的第一导电连接器连接至所述第二管芯的第一表面,以及对应的第二导电连接器连接至所述第二管芯的第二表面;第一中介板,位于所述第一管芯和所述第二管芯的上方,所述第一中介板的第一表面连接至所述第一导电连接器,所述第一中介板的第二表面连接至第三导电连接器;第三管芯,位于所述第一中介板的上方,所述第三管芯的第一表面连接至对应的第三导电连接器;以及第四管芯,位于所述第一中介板的上方,所述第四管芯的第一表面连接至对应的第三导电连接器,其中,所述第一管芯通过所述第一中介板通信连接至所述第二管芯,和/或所述第三管芯通过所述第一中介板通信连接至所述第四管芯。
该结构还包括:衬底,连接至所述第二导电连接器,所述第一管芯和所述第二管芯位于所述衬底的上方。
该结构还包括:第二中介板,位于所述第三管芯和所述第四管芯的上方;第五管芯,位于所述第二中介板的上方;以及第六管芯,位于所述第二中介板的上方。
该结构还包括:第五管芯,具有第一表面和第二表面,所述第五管芯的第二表面与所述第五管芯的第一表面相对,对应的第一导电连接器连接至所述第五管芯的第一表面,以及对应的第二导电连接器连接至所述第五管芯的第二表面;第六管芯,位于所述第一中介板的上方,所述第六管芯的第一表面连接至对应的第三导电连接器;第七管芯,具有第一表面和第二表面,所述第七管芯的第二表面与所述第七管芯的第一表面相对,对应的第一导电连接器连接至所述第七管芯的第一表面,以及对应的第二导电连接器连接至所述第七管芯的第二表面;以及第八管芯,位于所述第一中介板的上方,所述第八管芯的第一表面连接至对应的第三导电连接器。
在该结构中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个为所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的另外一个的冗余管芯。
在该结构中,所述第一中介板包括:多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个的对应信号并选择性地发送所选信号。
在该结构中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个包括:多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个其他管芯的对应信号。
在该结构中,所述第四管芯不直接位于所述第一管芯的上方,所述第一管芯通过电通路通信连接至所述第四管芯,所述电通路不延伸经过所述第二管芯和所述第三管芯。
根据本发明的另一方面,提供了一种结构,包括:第一管芯层,包括第一管芯和第二管芯,所述第一管芯和所述第二管芯的对应第一表面连接至对应的第一导电连接器,所述第一管芯和所述第二管芯的对应第二表面连接至对应的第二导电连接器,所述第一管芯的第一表面与所述第一管芯的第二表面相对,以及所述第二管芯的第一表面与所述第二管芯的第二表面相对;第二管芯层,包括第三管芯和第四管芯,所述第三管芯和所述第四管芯的对应第一表面连接至对应的第三导电连接器;以及第一中介板,设置在所述第一管芯层和所述第二管芯层之间,所述第一中介板的第一表面连接至所述第一导电连接器,以及所述第一中介板的第二表面连接至所述第三导电连接器。
该结构还包括:衬底,连接至所述第二导电连接器,所述第一管芯层设置在所述衬底和所述第一中介板之间。
该结构还包括:第三管芯层,包括第五管芯和第六管芯;以及第二中介板,设置在所述第二管芯层和所述第三管芯层之间。
在该结构中,所述第一管芯层还包括第五管芯和第六管芯,所述第五管芯和所述第六管芯的对应第一表面连接至对应的第一导电连接器,以及其中,所述第二管芯层还包括第七管芯和第八管芯,所述第七管芯和所述第八管芯的对应第一表面连接至对应的第三导电连接器。
在该结构中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个为所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的另外一个的冗余管芯。
在该结构中,所述第一中介板包括多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个的对应信号并选择性地发送所选信号。
在该结构中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个包括多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个其他管芯的对应信号。
根据本发明的又一方面,提供了一种方法,包括:使用连接至第一管芯和第二管芯的对应第一表面的对应第一导电连接器将所述第一管芯和所述第二管芯附接至第一中介板的第一表面;使用对应的第二导电连接器将第三管芯和第四管芯附接至所述第一中介板的第二表面,所述第一中介板的第二表面与所述第一中介板的第一表面相对;以及使用连接至所述第一管芯和所述第二管芯的对应第二表面的对应第三导电连接器将所述第一管芯和所述第二管芯附接至衬底。
该方法还包括:将所述第三管芯和所述第四管芯附接至第二中介板的第一表面;以及将第五管芯和第六管芯附接至所述第二中介板的第二表面。
该方法还包括:将第五管芯和第六管芯附接至所述第一中介板的第一表面;以及将第七管芯和第八管芯附接至所述第一中介板的第二表面。
在该方法中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个为冗余管芯。
在该方法中,所述第一中介板包括多路复用器。
附图说明
为了更好的理解本发明的实施例及其优点,现在将结合附图所进行以下描述作为参考,其中:
图1A是根据实施例的四管芯3DIC结构的横截面图;
图1B是根据实施例的四管芯3DIC结构的横截面图;
图2是在图1A和图1B的截面中示出的3DIC结构的简化三维图;
图3示出了根据实施例的五管芯3DIC结构的横截面图;
图4示出了在图3的截面中示出的3DIC结构的三维图;
图5是根据实施例的具有下面的中介板的3DIC结构的三维图;
图6是根据实施例的具有覆盖中介板的结构的三维图;
图7是根据实施例的八管芯3DIC结构的三维图;
图8是根据实施例的六管芯3DIC结构的三维图;
图9是根据实施例的十二管芯3DIC结构的三维图;以及
图10A至图10M是根据实施例的形成三层3DIC结构的方法。
具体实施方式
以下详细讨论本发明实施例的制造和使用。然而,应该理解,本公开内容提供了许多可以在各种具体环境中实现的可应用发明概念。所讨论的特定实施例仅仅是制造和使用所公开的主题的具体方式,并没有限定不同实施例的范围。
提供了新颖的三维集成电路(3DIC)结构及其形成方法。3DIC的实施例适用于各种应用,包括现场可编程门阵列(FPGA)、芯片上系统(SoC)、图形处理单元(GPU)等,所有这些应用都具有或不具有在3DIC中包括的存储器管芯。应该注意,尽管在3DIC结构的情况下进行讨论,但其他实施例可以实施2.5维IC(2.5DIC)结构。示出了实施例和制造实施例的中间阶段。讨论了实施例的一些变形例,并且其他变形例对于本领域的技术人员来说是显而易见的。在整个附图和所描述的实施例中,类似的参考标号用于指定类似的元件。
现在,参照图1A,示出了根据实施例的四管芯3DIC结构50的横截面图。3DIC结构50包括:第一管芯10和第二管芯12(统称为“第二层管芯10/12”)、中介板18、第三管芯14和第四管芯16(统称为“第一层管芯14/16”)以及衬底20。第二层管芯10/12均具有第一表面(诸如有源面),将该第一表面通过对应的第一连接器22(例如,导电微凸块)电、通信和/或机械连接至中介板18的第一表面(诸如顶面)。类似地,第一层管芯14/16均具有第一表面(诸如有源面),将该第一表面通过对应的第一连接器22(例如,导电微凸块)电、通信和/或机械地连接至中介板18的第二表面(诸如底面)。第一层管芯14/16均具有:第二表面(诸如背面),将该第二表面通过第二连接器24(例如,可控崩溃芯片连接(“C4”)凸块)电、通信和/或机械地连接至衬底20的第一表面(诸如顶面)。衬底20的第二表面(诸如底面)具有第三连接器26,诸如球珊阵列(“BGA”)球。例如,衬底20为封装层压衬底。
第一管芯10包括互连件36,其将管芯衬底中、上和/或上方的有源器件和/或无源器件电连接至外部部件。互连件36可以为各个金属层中的图案和对应图案之间的通孔的组合。对应的第一连接器22直接或间接连接至互连件36。例如,连接器焊盘可以位于第一管芯10的第一表面上方,其中,第一连接器22连接至第一管芯的第一表面。
第二管芯12也包括互连件36,该互连件36电连接管芯衬底中、上和/或上方的有源器件和/或无源器件,并且进一步包括衬底通孔(“TSV”)通孔32(已知为“半导体通孔”或“硅通孔”)。对应的第一连接器22直接或间接连接至互连件36。TSV32从与第二管芯12的第一表面相对的第二表面(例如,背面)延伸到互连件36。第四连接器28(诸如C4凸块)直接或间接地连接至第二管芯12的对应TSV32。接合引线30连接至第四连接器28中的一个和衬底20。尽管在图1A中没有具体示出,但接合引线可以连接至第四连接器28中的另一个和衬底20。
在图1B的3DIC结构51的另一实施例中,接合引线31连接至第一连接器28以及中介板18的第一表面。在该实施例中,中介板18的第一表面的面积大于第一管芯10的第一表面和第二管芯12的第一表面的组合面积,以具有接合引线连接至中介板18的面积。
图1A和图1B(“统称为图1”)示出了各个实施例的方面,其中,顶层管芯可能具有或者可能不具有TSV和与其连接的接合引线。在图1中,第一管芯10既不具有TSV也不具有接合引线,但是第二管芯12具有TSV32以及接合引线30或31。应该注意,两个管芯都可以具有TSV和接合引线,或者没有管芯具有TSV和接合引线。如图所示,TSV和接合引线可以允许进一步连接至衬底20和/或中介板18。尽管在以后的附图中没有具体示出,但每幅图中的管芯都可以具有与其连接且与结构中的各个部件连接的接合引线。
再次参照图1A,中介板18包括:TSV34;第一面互连部件38,包括任何数量的金属层以及任何数量的介电层中的通孔;以及第二面互连部件40,也包括任何数量的金属层以及任何数量的介电层中的通孔。在该实施例中,中介板18可以说处于第一层管芯14/16与第二层管芯10/12之间的中间层中。中介板18的第一面上的第一连接器22通过第一面互连部件38、TSV34、以及第二面互连部件40电连接至中介板18的第二面上的对应第一连接器22。值得注意的是,尽管在图1中示出了互连部件,但在其他实施例中,中介板可以不包括互连部件。例如,第一连接器22中的每一个都可以直接连接至连接器焊盘,而连接器焊盘又直接连接至TSV34。此外,在又一些实施例中,只有一面可以具有互连部件。
第一层管芯14/16还包括互连件36,该互连件电连接对应管芯衬底中、上和/或上方的有源和/或无源器件;并且进一步包括TSV32。对应的第一连接器22直接或间接地连接至互连件36。TSV32从第二表面(例如,背面)延伸到互连件36,该第二表面与第一层管芯14/16中的每一个的第一表面相对。第二连接器24电、通信和/或机械地直接或间接连接至第一层管芯14/16中的每一个的对应TSV32。
图2示出了图1的横截面图所示的3DIC结构50(随后提及的结构50也指的是结构51)的三维图。值得注意的是,如上所述,尽管在图2中没有具体示出,但一条或多条接合引线可以连接至一个或多个管芯10/12的每一个。
图1和图2中的3DIC结构可以包括各种部件。在实施例中,中介板18允许管芯电和/或通信连接在一起。在又一些实施例中,中介板18允许管芯电和/或通信连接在一起而不通过另一管芯来传送电信号。例如,第一管芯10可以电连接至第四管芯16,而不通过第二管芯12或第三管芯14来传送电信号。连接至第一管芯10的第一连接器22可以连接至第一面互连部件38中的一个,该第一面互连部件38中的一个连接至中介板中的TSV34。然后,TSV34可以连接至第二面互连部件40中的一个,第二面互连部件40中的一个连接至与第四管芯16相连的第一连接器22。第一面互连部件38和第二面互连部件40中的一个或两个都可以通过例如导线横跨(cross)中介板18。类似地,第二管芯12和第三管芯14可以电和/或通信连接在一起。此外,第一管芯10可以电和/或通信连接至第三管芯14,以及第二管芯12可以以类似方式电和/或通信连接至第四管芯16,而不具有例如横跨中介板18的导线。此外,第二层管芯10/12可以使用例如第一面互连部件38中的导线电和/或通信连接在一起而不使用TSV34,类似地,第一层管芯14/16可以使用例如第二面互连部件40中的导线电和/或通信连接在一起而不使用TSV34。因此,两个对应管芯之间的路径可以为专用路径,并且每个管芯的设计可以独立于两个其他管芯之间的所要求的电通路以及相关联的连接。
实施例进一步允许管芯的冗余。在实施例中,一个管芯(例如,第二管芯12)与另一管芯(诸如第一管芯10)相同或者功能等效。因此,第二管芯12是冗余管芯。例如,从第一管芯10和第二管芯12去往另一管芯(诸如第三管芯14或第四管芯16)的信号进行多路复用,以选择要通过另一管芯接收和处理来自第一管芯10的信号还是来自第二管芯12的信号。在实施例中,诸如当中介板18为有源中介板时,在中介板18中实施多路复用。例如,将中介板18的衬底进行处理,以包括诸如多路复用器的有源电路。有源中介板中的其他器件可以包括:晶体管、二极管、熔丝、RLC无源器件、谐振器和/或微机电系统(MEMS)。多路复用器从第一管芯10和第二管芯12接收输入信号。通过多路复用器接收诸如来自第三管芯14或第四管芯16的控制信号,以选择哪些信号传送至另一管芯(诸如第三管芯14或第四管芯16)。在另一实施例中,通过另一管芯(诸如第三管芯14或第四管芯16)中的多路复用器来进行多路复用。
值得注意的是,多路复用器可以采取许多不同的结构。例如,如果存在N个冗余管芯,则多路复用器可以为单个N:1多路复用器,或者多路复用器可以为N-1个串连的2:1多路复用器,其中,在每个控制层处仅有一个多路复用器,或者每个控制层都具有两个多路复用器。在其他实施例中,从第一管芯10和第二管芯12输出的信号通过三态缓冲器传送至每个管芯的输出。可以连接(诸如短路)管芯的输出,并且可以控制三态缓冲器以输出仅来自第一管芯10或第二管芯12的一个管芯的信号。实施例预期用于多路复用的任何结构。
在这些实施例中,例如,如果管芯发生故障,则在3DIC结构中可以复制廉价制造的管芯,以允许修复。基于廉价管芯的故障,这可以防止3DIC中损失更多的昂贵管芯。例如,如果第一管芯10需要5美元来处理,第二管芯12与第一管芯10相同或者功能等效(由此为冗余管芯),第三管芯14需要100美元来处理以及第四管芯16需要50美元来处理,则尽管第一管芯10发生故障,但第二管芯12可以使得3DIC结构仍然保持功能,由此分别防止第三管芯14的100美元和第四管芯16的50美元的处理成本。
如上所述,冗余管芯可以为3DIC结构中另一管芯的复制品。复制管芯可以使得3DIC结构增加能力,原始管芯和复制管芯中的每一个都在结构操作期间保持功能。在一些情况下,冗余管芯可以包括TSV并且可以位于顶层。在这些情况下,如果没有连接器通过冗余管芯的背面连接至TSV,则钝化层或过填充层(overfill)(诸如封装期间应用的模塑料)可以电隔离TSV。如果连接器连接至TSV(诸如通过C4凸块),则过填充绝缘层可以抑制(smother)连接器。
在使用接合引线的实施例中,接合引线可以向管芯提供电源。如果确定接合引线提供电源的管芯发生故障,则可以切断接合引线以防止电源被提供给故障管芯,由此节省了电能。在其他实施例中,管芯可以为冗余管芯或者可以为可通过切断接合引线而无效的任选产品部件。在又一些实施例中,接合引线可以提供用于多路复用的控制信号。接合引线可以接合至恒定值以基于用于结构的修复分析来提供控制信号。
图3示出了根据实施例的5管芯3DIC结构70的横截面图。该实施例示出了考虑层之间不对称的实施例的实例部件。3DIC结构70包括第一管芯52和第二管芯54(统称为“第二层管芯52/54”);中介板62;第三管芯56、第四管芯58和第五管芯60(统称为“第一层管芯56/58/60”);以及衬底64。第二层管芯52/54均具有第一表面(诸如有源面),将这些第一表面通过对应的第一连接器22电、通信和/或机械连接至中介板62的第一表面(诸如顶面)。类似地,第一层管芯56/58/60均具有第一表面(诸如有源面),将这些第一表面通过对应的第一连接器22电、通信和/或机械连接至中介板62的第二表面(诸如底面)。第一层管芯56/58/60均具有第二表面(诸如背面),将这些第二表面通过第二连接器24电、通信和/或机械连接至衬底64的第一表面(诸如顶面)。衬底64的第二表面(诸如底面)具有第三连接器26。图3还示出了在图1中描述的参考标号的部件,因此为了简化在这里省略这些部件的详尽描述。
在图3中,第一层包括比第二层多的管芯,并且管芯具有不同尺寸。此外,第三管芯56和第五管芯60的每一个都从中介板62的下方(诸如第三管芯56和第五管芯60的对应第一表面没有被中介板62覆盖的部分)开始延伸。此外,中介板62的面积大于第二层管芯52/54的第一表面的组合面积,使得中介板62具有从第二层管芯52/54开始延伸且没有被其覆盖的区域。在该实施例中,接合引线66和68可用于电连接各个器件的各个表面上的部件。如图所示,接合引线68将第三管芯56的第一表面上的第一连接器22电连接至中介板62的第一表面。此外,接合引线66将第五管芯60的第一表面上的第一连接器22电连接至第二管芯54上的第四连接器28。由于不同的技术用于电连接各种部件(诸如通过接合引线),所以在其他实施例中考虑管芯的不同形状、尺寸、数量和结构。
图4示出了图3的横截面图所示的3DIC结构70的三维图。值得注意的是,如上所述,尽管在图4中没有具体示出,但一条或多条接合引线可以连接至一个管芯或多个管芯(诸如图3所讨论的)的每一个。
图5是类似于图1的结构50的3DIC结构80的三维图。结构80包括第一层管芯14/16与衬底20之间的第二中介板72。第一连接器22电、通信和/或机械地将第一层管芯的第二表面连接至第二中介板72的第一表面(诸如顶面),以及第二连接器24电、通信和/或机械地将第二中介板72的第二表面(诸如底面)连接至衬底20。第二中介板72通常类似于中介板18,并且可以允许管芯之间的附加电通路。
图6是类似于图5的3DIC结构80的结构90的三维图。结构 90不包括中介板18上方的管芯。因此,中介板18可以为覆盖中介板。
图7示出了8管芯3DIC结构110的三维图。3DIC结构110类似于图1和图2的3DIC结构50。3DIC结构110还包括中介板98上方的第二层上的第五管芯92和第六管芯94,并且还包括衬底100上方的第一层上的第七管芯(没有具体示出)和第八管芯96。中介板98和衬底100与中介板18和衬底20的不同之处分别在于,中介板98和衬底100可以提供四个管芯而不是两个管芯的面积(两个管芯乘以两个管芯的面积)。3DIC结构110可以具有如参照图1和图2的3DIC结构50所讨论的部件。此外,实施例考虑附加部件,诸如不同层上不同数量的管芯、不同尺寸的管芯、不同的电连接件等(诸如参照图3和图4所讨论的)以及下面的中介板和覆盖中介板(诸如参照图5和图6所讨论的)。
图8示出了6管芯3DIC结构120的三维图。3DIC结构120类似于图1和图2中的3DIC结构50。3DIC结构120还包括中介板116上方的第三层上的第五管芯112和第六管芯114(统称为“第三层管芯112/114”)。中介板116位于第二层管芯10/12上方并通过第一连接器22连接至第二层管芯10/12。在该实施例中,第二层管芯中的一个或两个管芯包括TSV,以允许来自第三层管芯112/114的信号被传送至3DIC结构120的各个下面的层。3DIC结构120可具有参照图1和图2的3DIC结构50所讨论的部件。此外,实施例考虑附加部件,诸如不同层上的不同数量的管芯、不同尺寸的管芯、不同的电连接件等(诸如参照图3和图4所讨论的)以及下面的中介板和覆盖中介板(诸如参照图5和图6所讨论的)。
图9示出了12管芯3DIC结构140的三维图。3DIC结构140将图7的3DIC结构110的部件与图8的3DIC结构120的部件进行组合。3DIC结构140还包括:第九管芯122、第十管芯124、第十一管芯126和第十二管芯128,这些管芯位于中介板130上方并通过连接器22连接至中介板130。中介板130与中介板98的类似之处在于,其可以提供四个管芯的面积(两个管芯乘以两个管芯的面积)。3DIC结构140可具有参照图1和图2的3DIC结构50所讨论的部件。此外,实施例考虑附加部件,诸如不同层上的不同数量的管芯、不同尺寸的管芯、不同的电连接件等(诸如参照图3和图4所讨论的)以及下面的中介板和覆盖中介板(诸如参照图5和图6所讨论的)。
图10A至图10M示出了根据实施例的用于形成三层3DIC结构(诸如图8的3DIC结构120和/或图9的3DIC结构140)的方法。本领域的技术人员容易理解如何修改本文所公开的工艺以实现两层3DIC结构、具有多于三层的3DIC结构或者2.5DIC结构。此外,可以以任何逻辑顺序来实施所讨论的步骤。这些修改在各个实施例的范围内。例如,尽管一些步骤示出了晶圆上芯片接合,但可以使用晶圆上晶圆接合来实施一些步骤。
首先,参照图10A,示出了第一中介板衬底200和形成的穿过第一中介板衬底200的正面的TSV202。第一中介板衬底200的材料通常与用于形成管芯(其中,将该管芯附接至中介板)的衬底的材料类似,诸如硅。虽然第一中介板衬底200可以由其他材料形成,但应该相信使用硅衬底用于中介板可以减小应力,因为硅衬底与用于管芯的硅之间的热膨胀系数(CTE)失配低于衬底由不同材料形成的情况下的热膨胀系数失配。
例如,通过蚀刻、研磨、激光技术、其组合等在第一中介板衬底200中形成凹槽来形成TSV202。诸如通过化学汽相沉积(CVD)、原子层沉积(ALD)、物理汽相沉积(PVD)、热氧化、其组合等,在第一中介板衬底200的正面上方和开口中共形地沉积薄势垒层。势垒层可以包括氮化物或氮氧化物,诸如氮化钛、氮氧化钛、氮化钽、氮氧化钽、氮化钨、其组合等。导电材料沉积在薄势垒层的上方和开口中。导电材料可以通过电化学喷镀工艺、CVD、ALD、PVD、其组合等来形成。导电材料的实例为铜、钨、铝、银、金、其组合,诸如合金等。例如,通过化学机械抛光来从第一中介板衬底200的正面去除多余的导电材料和势垒材料。因此,TSV202包括导电材料以及导电材料和第一中介板衬底200之间的薄势垒层。例如,当第一中介板衬底200为绝缘体材料时,可以省略薄势垒层。
在图10B中继续正面工艺,在第一中介板衬底200上方形成互连结构204。互连结构204可以包括任意数量的金属层、金属间介电(IMD)层、通孔和钝化层或者可以包括它们的任意组合。图10B所示互连结构204在IMD层中包括三个金属层,诸如第一金属层(Mx)206、第二金属层(My)208和第三金属层(Mz)210(图中金属层所示的连接不用于指定具体连接)。通孔形成在IMD层中的金属层之间。金属层通过以下工艺步骤形成:沉积IMD层、使用例如可接受的光刻技术蚀刻IMD层中的层的金属图案、在IMD中沉积用于金属层的导电材料以及通过例如CMP去除任何多余的导电材料。尤其当形成的通孔穿过IMD到达下面的金属层时,光刻技术可以包括单镶嵌工艺或双镶嵌工艺。
IMD层可以为氧化物电介质,诸如二氧化硅(SiO2)、硼磷硅酸盐玻璃(BPSG)、来自DowChemicals的SiLK、TeflonAF或其他介电材料。例如,金属层的导电材料可以为铜、镍、铝、铜铝、钨、钛、金、银、其组合(诸如合金)等。金属层可以包括导电材料和IMD材料之间的势垒层,并且可以在IMD层之间形成其他介电层,诸如例如由氮化硅制成的蚀刻停止层。
在形成顶部金属层(在图10B中为第三金属层210)之后,在金属层的上方形成一个或多个钝化层。钝化层可以为聚酰亚胺、BPSG、氮化硅(SiN)、其组合等,并且可以使用旋涂技术、CVD、ALD、PVD、其组合等来形成该钝化层。形成穿过钝化层的开口以暴露顶部金属层(在图10B中为第三金属层210),以在顶部金属层上方形成连接器焊盘212。例如,可以使用可接受的光刻和蚀刻技术来形成开口。
通过顶部金属层上的开口形成连接器焊盘212,并且导电连接器214形成在连接器焊盘212上方。例如,导电连接器214为:引脚、微凸块、凸块、微柱、柱、圆柱等和/或它们的组合。可以通过在开口中沉积导电材料并将导电材料图案化为连接器焊盘212来形成连接器焊盘212。导电材料可以包括:铜、银、锡、钛、钨、金、银、它们的组合(诸如合金)等,并且可以通过PVD、CVD、ALD、它们的组合等来沉积导电材料。可以通过可接受的光刻和蚀刻技术图案化连接器焊盘212。导电连接器214通过电化学喷镀(ECP)等形成在连接器焊盘212上方,并且可以包括铜、锡、镍、它们的组合等。
在图10C中,第一管芯216和第二管芯218(统称为“第三层管芯216/218”)(如果使用更多管芯的话则为更多管芯)通过导电连接器214附接,并且底部填充材料220分布在第三层管芯216/218与第一中介板衬底200之间。第三层管芯216/218可以为使用拾取和放置工具附接的已知良好管芯,并且导电连接器214可以在分布底部填充材料220之前进行回流。底部填充材料220可以为使用可接受的涂胶设备(dispensingequipment)所分布的液态环氧树脂、可变形凝胶、硅橡胶、它们的组合等。
此外,第一管芯216均包括连接至导电连接器219(例如,其可以为C4凸块)的TSV217。可以在形成每一个第一管芯216中的有源或无源器件之前以及在从晶圆切割每一个第一管芯216之前形成TSV217。虽然TSV217为晶圆的部分,但可以通过穿过第一管芯衬底的表面形成开口(诸如通过蚀刻、研磨、激光技术、它们的组合等)来形成TSV217。诸如通过CVD、ALD、PVD、热氧化、它们的组合等,薄势垒层共形地沉积在第一管芯衬底的上方以及开口中。势垒层可以包括氮化物或氮氧化物,诸如氮化钛、氮氧化钛、氮化钽、氮氧化钽、氮化钨、它们的组合等。导电材料沉积在薄势垒层的上方和开口中。导电材料可以通过电化学喷镀工艺、CVD、ALD、PVD、它们的组合等来形成。导电材料的实例为铜、钨、铝、银、金、它们的组合等。例如,通过化学机械抛光来从第一管芯衬底去除多余的导电材料和势垒层。因此,TSV217包括导电材料以及导电材料和第一管芯衬底之间的薄势垒层。
然后,诸如通过化学机械抛光(CMP)工艺从背面减薄第一管芯216的晶圆以暴露TSV217。晶圆可以附接至承载衬底以在减薄期间提供支持。钝化层形成在背面上,并且例如通过使用可接受的光刻技术进行蚀刻暴露穿过钝化层的TSV217。通过沉积和图案化导电材料在暴露的TSV217上方形成连接器焊盘。然后,导电连接器219形成在连接器焊盘上方。然后,切割晶圆以分离成第一管芯216,并且第一管芯216通过导电连接器214附接至第一中介板焊盘200。值得注意的是,在第一管芯216附接至第一中介板衬底200之前执行,或者在第一管芯216部分或全部附接至第一中介板衬底200之后可以实施第一管芯216的背面工艺。本领域的技术人员容易理解这些修改,因此为了简化这里省略这些修改的讨论。
从图10D开始示出了第一中介板衬底200的背面处理。在背面处理期间将图10C的组件附接至第一承载衬底222。第一承载衬底222可以使用粘合剂224附接至第三层管芯216/218。通常,第一承载衬底222在后续处理步骤期间提供临时的机械和结构支撑。例如,第一承载衬底222可以包括:玻璃、氧化硅、氧化铝、它们的组合等。粘合剂224可以为任何适当的粘合剂,诸如紫外线(UV)胶,当该UV胶暴露在UV光下时,失去其粘性。
在图10E中,通过减薄第一中介板衬底200,从第一中介板衬底200的背面暴露TSV202。可以使用蚀刻工艺和/或平面化工艺(诸如CMP工艺)来实施减薄工艺。互连结构226形成在第一中介板衬底200的背面上。类似于正面上的互连结构204,互连结构226可以包括任意数量的金属层、IMD层、通孔和钝化层或者它们的任意组合。互连结构226在IMD层中包括三个金属层。通孔形成在IMD层中的金属层之间。在形成顶部金属层之后,在金属层的上方形成一个或多个钝化层。形成穿过钝化层的开口以暴露顶部金属层。在顶部金属层上方形成穿过开口的连接器焊盘228,并且导电连接器230形成在连接器焊盘228上方。在参照图10E讨论的背面处理期间形成的部件可以包括任何材料并且可以通过对于正面处理期间形成的对应部件所讨论(诸如参照图10B所讨论的)的任何技术来形成。
在图10F中,第三管芯232和第四管芯234(统称为“第二层管芯232/234”)(如果使用更多管芯的话则为更多管芯)通过导电连接器230附接,并且底部填充材料236分布在第二层管芯232/234和第一中介板衬底200之间。第二层管芯232/234可以为使用拾取和放置工具附接的已知良好管芯,并且在分布底部填充材料236之前,导电连接器230可以进行回流。底部填充材料236可以为使用可接受的涂胶设备所分布的液态环氧树脂、可变形凝胶、硅橡胶、它们的组合等。
此外,第二层管芯232/234均包括连接至导电连接器240的TSV238。可以通过与第一管芯216中的TSV217相同或类似的技术进行第二层管芯232/234中的TSV238的处理以及第二层管芯232/234中的TSV238的处理具有与第一管芯216中的TSV217相同或类似材料(诸如参照图10C所讨论的)。此外,导电连接器240可以形成在连接器焊盘242上方。例如,导电连接器240为引脚、微凸块、凸块、微柱、柱、圆柱等和/或它们的组合。在减薄对应晶圆以暴露TSV238之后,沉积钝化层以及暴露穿过钝化层的TSV238,可以通过在第二层管芯232/234的背面上(诸如在切割管芯之前的对应晶圆的背面上)沉积导电材料以及通过可接受光刻技术图案化导电材料来形成连接器焊盘242。导电材料可以包括铜、银、锡、钛、钨、其组合等,并且可以通过PVD、CVD、ALD、它们的组合等来沉积导电材料。导电连接器240通过电化学喷镀(ECP)等形成在连接器焊盘242上方,并且可以包括铜、锡、镍、它们的组合等。值得注意的是,在第二层管芯232/234附接至第一中介板衬底200之前,或者在第二层管芯232/234部分或全部附接至第一中介板衬底200之后,实施第二层管芯232/234的背面处理。
在图10G中,通过参照图10A和图10B讨论的正面处理来处理第二中介板衬底244。第二中介板衬底244包括正面互连结构246(包括金属层、IMD层和通孔),并且还包括连接器焊盘250和导电连接器252。第二中介板衬底244还包括TSV248。与参照图10A至图10B讨论的工艺相同或类似地,实施第二中介板衬底244的正面处理。
从图10H开始示出了第二中介板衬底244的背面处理。图10G的组件中背面处理期间附接至第二承载衬底254。第二承载衬底254可以使用粘合剂256附接至第二中介板衬底244(包括导电连接器252)的正面。这些部件与参照图10D所讨论的部件类似。通过减薄第二中介板衬底244从第二中介板衬底244的背面暴露TSV248。可以使用蚀刻工艺和/或平面化工艺(诸如CMP工艺)来实施减薄工艺。
在图10I中,类似于图10E,互连结构258形成在第二中介板衬底244的背面上。类似于正面上的互连结构246,互连结构258可以包括任意数量的金属层、IMD层、通孔和钝化层或者它们的任意组合。互连结构258在IMD层中包括三个金属层。通孔形成在IMD层中的金属层之间。在形成顶部金属层之后,在金属层的上方形成一个或多个钝化层。形成穿过钝化层的开口以暴露顶部金属层。在顶部金属层上形成穿过开口的连接器焊盘260,并且导电连接器262形成在连接器焊盘260上。在参照图10H和图10I讨论的背面处理期间形成的部件可以包括任何材料并且可以通过对于正面处理期间形成的对应部件所讨论(诸如参照图10E所讨论的)的任何技术来形成。
在图10J中,切割第二中介板衬底244以形成单独的第二中介板264,并且例如,第二中介板264通过将粘合剂256暴露在UV辐射下而与承载衬底254分离。第二中介板264位于第二层管芯232/234上方并通过连接器焊盘242和250上的导电连接器240和252连接至第二层管芯232/234。使用例如拾取和放置工具并且导电连接器240和252进行回流来附接第二中介板 264。底部填充材料266分布在第二中介板 264和第二层管芯232/234之间。底部填充材料266可以为使用可接受的涂胶设备所分布的液态环氧树脂、可变形凝胶、硅橡胶、它们的组合等。
在图10K中,第五管芯268和第六管芯270(统称为“第一层管芯268/270”)(如果使用更多管芯的话则为更多管芯)通过第一层管芯268/270的接合焊盘276上的导电连接器278并且通过导电连接器262附接,并且连接器278和262回流。第一层管芯268/270可以为使用拾取和放置工具附接的已知良好管芯。底部填充材料277分布在第一层管芯268/270和第二中介板264之间。底部填充材料277可以为使用可接受的涂胶设备所分配的液态环氧树脂、可变形凝胶、硅橡胶、它们的组合等。
此外,第一层管芯268/270均包括连接至导电连接器272(例如,其可以为C4凸块)的TSV274。可以通过与第二层管芯232/234中的TSV238(诸如参照图10F讨论的)相同或类似的技术处理第一层管芯268/270中的TSV274或者第一层管芯268/270中的TSV274具有与第二层管芯232/234中的TSV238相同或类似的材料。在减薄对应晶圆以暴露TSV274之后,沉积钝化层以及暴露穿过钝化层的TSV274,可以通过沉积和图案化导电材料在暴露的TSV274上方形成连接器焊盘。然后,导电连接器272形成在连接器焊盘上方。然后,切割第一层管芯268/270的每一个,并且第一层管芯268/270通过导电连接器268附接至第二中介板衬底244。值得注意的是,在附接至第二中介板衬底244之前,或者在第一层管芯268/270部分或全部附接至第二中介板衬底244之后,可以实施第一层管芯268/270的背面处理。
在图10L中,沿切割线 280切割第一中介板衬底200以分离为单独的3DIC结构。可以通过切割、蚀刻等或者它们的组合来实施切割。然后,单个的3DIC结构通过导电连接器272连接至衬底282的第一表面。衬底282可以为封装层压衬底。衬底282在第二表面上具有导电球284,诸如BGA球。可以对3DIC结构实施附加封装步骤,诸如利用模塑料进行密封。本领域的技术人员容易理解这些步骤,因此为了简化省略这些步骤。
实施例可以实现各种优点。首先,可以实现管芯之间更高的连接性而不依赖于另一管芯的设计。例如,可以通过中介板电连接两个管芯而不需要使用第三管芯的TSV和/或金属线。此外,中介板上的连接器(诸如微凸块)不必与中介板上的另一连接器对准,因为中介板允许各种连接器的再分布。因此,在各个实施例中,不对称布线不再是问题。接下来,可以实现管芯冗余以增加制造3DIC结构的成品率。例如,冗余管芯可以功能性地代替另一故障管芯,使得3DIC结构保持功能。此外,与一些现有技术结构(其中,面积不足成为问题)相比,实施例允许具有连接器(诸如C4凸块)的更大面积以连接封装衬底。此外,该结构的堆叠高度可以减小。然而,与结构要求太多面积的其他现有技术结构相比,实施例允许具有更小的占位面积。
另外,实施例实现更好的电压和热特性。在实施例中,每个管芯的电源可以不串联连接。由于尤其在串联连接的开始处相对较大的电流流动,以及导体的阻抗,传统结构中的串联电源会引起电源和串联连接中最后的管芯之间的显著压降。实施例允许电源独立,由此允许减小的电流流动以及由电流流动的较短距离所引起的减小阻抗。因此,可以减小来自电源的压降。此外,实施例可以实现较短的3DIC结构高度,从而可以具有管芯温度较低以及热产生和热消散增加的混合效果。较短的高度允许从一些管芯到散热器的较短距离,减小了热阻抗以及流经热阻抗的中间管芯热量产生。温度上升通常为热阻与每单位时间的要消散的热量的乘积(product)。
第一实施例是一种结构,包括:第一管芯、第二管芯、第一中介板、第三管芯和第四管芯。第一管芯具有第一表面和第二表面,第一管芯的第二表面与第一管芯的第一表面相对。对应的第一导电连接器连接至第一管芯的第一表面,以及对应的第二导电连接器连接至第一管芯的第二表面。第二管芯具有第一表面和第二表面,并且第二管芯的第二表面与第二管芯的第一表面相对。对应的第一导电连接器连接至第二管芯的第一表面,以及对应的第二导电连接器连接至第二管芯的第二表面。第一中介板位于第一管芯和第二管芯的上方。第一中介板的第一表面连接至第一导电连接器,第一中介板的第二表面连接至第三导电连接器。第三管芯位于第一中介板的上方,第三管芯的第一表面连接至对应的第三导电连接器。第四管芯位于第一中介板的上方,第四管芯的第一表面连接至对应的第三导电连接器。第一管芯通过第一中介板通信连接至第二管芯,和/或第三管芯通过第一中介板通信连接至第四管芯。
第二实施例是一种结构,包括:第一管芯层、第二管芯层以及设置在第一管芯层和第二管芯层之间的第一中介板。第一管芯层包括第一管芯和第二管芯。第一管芯和第二管芯的对应第一表面连接至对应的第一导电连接器,第一管芯和第二管芯的对应第二表面连接至对应的第二导电连接器。第一管芯的第一表面与第一管芯的第二表面相对,以及第二管芯的第一表面与第二管芯的第二表面相对。第二管芯层包括第三管芯和第四管芯。第三管芯和第四管芯的对应第一表面连接至对应的第三导电连接器。第一中介板的第一表面连接至第一导电连接器,以及第一中介板的第二表面连接至第三导电连接器。
又一实施例是一种方法,包括:使用连接至第一管芯和第二管芯的对应第一表面的对应第一导电连接器将第一管芯和第二管芯附接至第一中介板的第一表面;使用对应的第二导电连接器将第三管芯和第四管芯附接至第一中介板的第二表面,第一中介板的第二表面与中介板的第一表面相对;以及使用连接至第一管芯和第二管芯的对应第二表面的对应第三导电连接器将第一管芯和第二管芯附接至衬底。
尽管详细描述了示例性实施例及其特征,但应该理解,在不背离由所附权利要求限定的公开内容的精神和范围的情况下,可以进行各种改变、替换和变化。此外,本申请的范围不限于说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。本领域的技术人员应该容易地从公开内容中理解,可以根据公开内容利用现有或稍后开发的执行与本文所描述对应实施例基本相同的功能或实现基本相同的结果的工艺、机器、制造、材料组分、装置、方法和步骤。因此,所附权利要求应该包括在这样的工艺、机器、制造、材料组分、装置、方法或步骤的范围内。
Claims (17)
1.一种多维集成电路结构,包括:
第一管芯,具有第一表面和第二表面,所述第一管芯的第二表面与所述第一管芯的第一表面相对,对应的第一导电连接器连接至所述第一管芯的第一表面,以及对应的第二导电连接器连接至所述第一管芯的第二表面;
第二管芯,具有第一表面和第二表面,所述第二管芯的第二表面与所述第二管芯的第一表面相对,对应的第一导电连接器连接至所述第二管芯的第一表面,以及对应的第二导电连接器连接至所述第二管芯的第二表面;
第一中介板,位于所述第一管芯和所述第二管芯的上方,所述第一中介板的第一表面连接至所述第一导电连接器,所述第一中介板的第二表面连接至第三导电连接器;
第三管芯,位于所述第一中介板的上方,所述第三管芯的第一表面连接至对应的第三导电连接器;以及
第四管芯,位于所述第一中介板的上方,所述第四管芯的第一表面连接至对应的第三导电连接器,其中,所述第一管芯通过所述第一中介板通信连接至所述第二管芯,和/或所述第三管芯通过所述第一中介板通信连接至所述第四管芯,
其中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个为所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的另外一个的冗余管芯。
2.根据权利要求1所述的结构,还包括:衬底,连接至所述第二导电连接器,所述第一管芯和所述第二管芯位于所述衬底的上方。
3.根据权利要求1所述的结构,还包括:
第二中介板,位于所述第三管芯和所述第四管芯的上方;
第五管芯,位于所述第二中介板的上方;以及
第六管芯,位于所述第二中介板的上方。
4.根据权利要求1所述的结构,还包括:
第五管芯,具有第一表面和第二表面,所述第五管芯的第二表面与所述第五管芯的第一表面相对,对应的第一导电连接器连接至所述第五管芯的第一表面,以及对应的第二导电连接器连接至所述第五管芯的第二表面;
第六管芯,位于所述第一中介板的上方,所述第六管芯的第一表面连接至对应的第三导电连接器;
第七管芯,具有第一表面和第二表面,所述第七管芯的第二表面与所述第七管芯的第一表面相对,对应的第一导电连接器连接至所述第七管芯的第一表面,以及对应的第二导电连接器连接至所述第七管芯的第二表面;以及
第八管芯,位于所述第一中介板的上方,所述第八管芯的第一表面连接至对应的第三导电连接器。
5.根据权利要求1所述的结构,其中,所述第一中介板包括:多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个的对应信号并选择性地发送所选信号。
6.根据权利要求1所述的结构,其中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个包括:多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个其他管芯的对应信号。
7.根据权利要求1所述的结构,其中,所述第四管芯不直接位于所述第一管芯的上方,所述第一管芯通过电通路通信连接至所述第四管芯,所述电通路不延伸经过所述第二管芯和所述第三管芯。
8.一种多维集成电路结构,包括:
第一管芯层,包括第一管芯和第二管芯,所述第一管芯和所述第二管芯的对应第一表面连接至对应的第一导电连接器,所述第一管芯和所述第二管芯的对应第二表面连接至对应的第二导电连接器,所述第一管芯的第一表面与所述第一管芯的第二表面相对,以及所述第二管芯的第一表面与所述第二管芯的第二表面相对;
第二管芯层,包括第三管芯和第四管芯,所述第三管芯和所述第四管芯的对应第一表面连接至对应的第三导电连接器;以及
第一中介板,设置在所述第一管芯层和所述第二管芯层之间,所述第一中介板的第一表面连接至所述第一导电连接器,以及所述第一中介板的第二表面连接至所述第三导电连接器,
其中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个为所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的另外一个的冗余管芯。
9.根据权利要求8所述的结构,还包括:衬底,连接至所述第二导电连接器,所述第一管芯层设置在所述衬底和所述第一中介板之间。
10.根据权利要求8所述的结构,还包括:
第三管芯层,包括第五管芯和第六管芯;以及
第二中介板,设置在所述第二管芯层和所述第三管芯层之间。
11.根据权利要求8所述的结构,其中,所述第一管芯层还包括第五管芯和第六管芯,所述第五管芯和所述第六管芯的对应第一表面连接至对应的第一导电连接器,以及其中,所述第二管芯层还包括第七管芯和第八管芯,所述第七管芯和所述第八管芯的对应第一表面连接至对应的第三导电连接器。
12.根据权利要求8所述的结构,其中,所述第一中介板包括多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个的对应信号并选择性地发送所选信号。
13.根据权利要求8所述的结构,其中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个包括多路复用器,所述多路复用器能够接收来自所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少两个其他管芯的对应信号。
14.一种多维集成电路结构的形成方法,包括:
使用连接至第一管芯和第二管芯的对应第一表面的对应第一导电连接器将所述第一管芯和所述第二管芯附接至第一中介板的第一表面;
使用对应的第二导电连接器将第三管芯和第四管芯附接至所述第一中介板的第二表面,所述第一中介板的第二表面与所述第一中介板的第一表面相对;以及
使用连接至所述第一管芯和所述第二管芯的对应第二表面的对应第三导电连接器将所述第一管芯和所述第二管芯附接至衬底,
其中,所述第一管芯、所述第二管芯、所述第三管芯或所述第四管芯中的至少一个为冗余管芯。
15.根据权利要求14所述的方法,还包括:
将所述第三管芯和所述第四管芯附接至第二中介板的第一表面;以及
将第五管芯和第六管芯附接至所述第二中介板的第二表面。
16.根据权利要求14所述的方法,还包括:
将第五管芯和第六管芯附接至所述第一中介板的第一表面;以及
将第七管芯和第八管芯附接至所述第一中介板的第二表面。
17.根据权利要求14所述的方法,其中,所述第一中介板包括多路复用器。
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US9054101B2 (en) | 2015-06-09 |
US20140147972A1 (en) | 2014-05-29 |
US8686570B2 (en) | 2014-04-01 |
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US20130187292A1 (en) | 2013-07-25 |
US9686852B2 (en) | 2017-06-20 |
US20150216030A1 (en) | 2015-07-30 |
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