CN103050376B - 沉积材料及形成方法 - Google Patents
沉积材料及形成方法 Download PDFInfo
- Publication number
- CN103050376B CN103050376B CN201210057500.XA CN201210057500A CN103050376B CN 103050376 B CN103050376 B CN 103050376B CN 201210057500 A CN201210057500 A CN 201210057500A CN 103050376 B CN103050376 B CN 103050376B
- Authority
- CN
- China
- Prior art keywords
- time
- precursor
- layer
- individual layer
- cycle
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000463 material Substances 0.000 title claims abstract description 119
- 238000000034 method Methods 0.000 title claims abstract description 88
- 230000008021 deposition Effects 0.000 title claims abstract description 86
- 230000015572 biosynthetic process Effects 0.000 title abstract description 20
- 239000002243 precursor Substances 0.000 claims abstract description 205
- 239000004065 semiconductor Substances 0.000 claims abstract description 24
- 239000003990 capacitor Substances 0.000 claims description 80
- 239000003989 dielectric material Substances 0.000 claims description 72
- 239000007789 gas Substances 0.000 claims description 52
- 239000000758 substrate Substances 0.000 claims description 42
- 230000004087 circulation Effects 0.000 claims description 30
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 16
- 229910052760 oxygen Inorganic materials 0.000 claims description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 238000006243 chemical reaction Methods 0.000 claims description 9
- 230000002045 lasting effect Effects 0.000 claims description 9
- 238000007254 oxidation reaction Methods 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 230000003647 oxidation Effects 0.000 claims description 8
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 4
- 229910052726 zirconium Inorganic materials 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 3
- 230000008520 organization Effects 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 185
- 238000000151 deposition Methods 0.000 description 141
- 229910052751 metal Inorganic materials 0.000 description 26
- 239000002184 metal Substances 0.000 description 26
- 238000005530 etching Methods 0.000 description 20
- 239000002131 composite material Substances 0.000 description 19
- 230000008569 process Effects 0.000 description 19
- 238000005516 engineering process Methods 0.000 description 15
- 239000012159 carrier gas Substances 0.000 description 13
- 238000005229 chemical vapour deposition Methods 0.000 description 12
- 239000004020 conductor Substances 0.000 description 12
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 10
- 238000000059 patterning Methods 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 230000004888 barrier function Effects 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 239000012212 insulator Substances 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 5
- 239000000654 additive Substances 0.000 description 5
- 230000000996 additive effect Effects 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 5
- 229910052721 tungsten Inorganic materials 0.000 description 5
- 239000010937 tungsten Substances 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000011161 development Methods 0.000 description 4
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 4
- 229910021332 silicide Inorganic materials 0.000 description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 4
- 125000006850 spacer group Chemical group 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 3
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 239000012071 phase Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229910052707 ruthenium Inorganic materials 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000001739 density measurement Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000007791 liquid phase Substances 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 125000002524 organometallic group Chemical group 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- -1 titanium silicide Chemical compound 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- FWDQDBTTXSRLHJ-UHFFFAOYSA-N C(C)N(C)[Zr] Chemical compound C(C)N(C)[Zr] FWDQDBTTXSRLHJ-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- BRGOCSWOKBOIOJ-UHFFFAOYSA-N N.[O-2].[Hf+4] Chemical compound N.[O-2].[Hf+4] BRGOCSWOKBOIOJ-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004541 SiN Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910004166 TaN Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 239000000567 combustion gas Substances 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000004821 distillation Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000002294 plasma sputter deposition Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 238000007086 side reaction Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 230000000638 stimulation Effects 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- 239000002912 waste gas Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
- DUNKXUFBGCUVQW-UHFFFAOYSA-J zirconium tetrachloride Chemical compound Cl[Zr](Cl)(Cl)Cl DUNKXUFBGCUVQW-UHFFFAOYSA-J 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/405—Oxides of refractory metals or yttrium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02189—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28176—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28264—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30612—Etching of AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
- H01L29/365—Planar doping, e.g. atomic-plane doping, delta-doping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66431—Unipolar field-effect transistors with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66522—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with an active layer made of a group 13/15 material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
- H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
- H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02192—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Crystallography & Structural Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Semiconductor Memories (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
本发明公开了一种用于制造半导体器件的系统和方法。一个实施例包括采用原子层沉积(ALD)工艺形成沉积层。ALD工艺可以利用第一前体并持续第一时间周期;第一清除并持续比第一时间周期更长的第二时间周期;第二前体并持续比第一时间周期更长的第三时间周期;以及第二清除并持续比第三时间周期更长的第四时间周期。本发明还公开了沉积材料及形成方法。
Description
技术领域
本发明涉及半导体技术领域,更具体地,涉及沉积材料及形成方法。
背景技术
介电材料已被用于半导体制造领域中以实现多种目的。它们能够被用于将一个区与另一个区电隔离。另外,可以采用被选择的用于介电材料的具体材料来帮助微调半导体芯片内的电磁场,从而可以获得多种部件。
在一个实例中,可以通过制造被电容器介电材料分开的第一电容器电极和第二电容器电极来形成电容器。当施加电流时,这种电容器介电材料允许第一电容器电极和第二电容器电极容纳电荷。这允许被采用的电容器临时存储所需电荷。
然而,随着半导体器件变得越来越小,可能出现关于介电层的问题。具体来说,当半导体制造从40nm工艺节点急速冲过28nm工艺节点时,当前的形成这些介电层的方法对被要求满足当今竞争环境中期望的性能和制造规范的任务是完全不够的。
发明内容
为了解决现有技术中所存在的问题,根据本发明的一个方面,提供了一种用于制造半导体器件的方法,所述方法包括:
向沉积腔室引入第一前体并持续第一时间;
在引入所述第一前体之后,向所述沉积腔室引入第一清除气体并持续第二时间,其中所述第二时间大于所述第一时间;
在引入所述第一清除气体之后,向所述沉积腔室引入第二前体并持续第三时间,其中所述第三时间大于或等于所述第一时间;以及
在引入所述第二前体之后向所述沉积腔室引入第二清除气体并持续第四时间。
在一可选实施例中,所述第四时间大于所述第三时间。
在一可选实施例中,所述第二时间和所述第四时间的第一总和大于所述第一时间和所述第三时间的第二总和。
在一可选实施例中,所述第二前体含有氧。
在一可选实施例中,所述方法进一步包括:向所述沉积腔室引入所述第一前体并持续第五时间,在向所述沉积腔室引入所述第二清除气体之后进行向所述沉积腔室引入所述第一前体并持续第五时间的步骤;向所述沉积腔室引入第三清除气体并持续第六时间,所述第六时间小于所述第二时间;向所述沉积腔室引入所述第二前体并持续第七时间,所述第七时间小于所述第三时间;以及向所述沉积腔室引入所述第四清除气体并持续第八时间,所述第八时间小于所述第四时间。
在一可选实施例中,所述第五时间、所述第六时间、所述第七时间、和所述第八时间全都彼此相等。
在一可选实施例中,引入的所述第一前体包含锆。
在一可选实施例中,所述方法进一步包括在引入第二清除气体之后形成DRAM电容器顶板。
根据本发明的另一方面,还提供了一种用于制造半导体器件的方法,所述方法包括:
执行第一循环以形成介电材料的第一单层,所述第一循环包括:
使衬底的表面与第一前体反应并持续第一时间周期以形成第一前体表面;
从所述第一前体表面清除所述第一前体并持续第二时间,其中,所述第二时间周期大于所述第一时间周期;
用第二前体氧化所述第一前体表面以形成所述介电材料的所述第一单层,氧化所述第一前体表面持续第三时间周期,其中,所述第三时间周期大于或等于所述第一时间周期;以及
从所述介电材料的所述第一单层清除所述第二前体并持续第四时间周期,其中,所述第四时间周期大于所述第三时间周期;以及
在执行所述第一循环之后执行第二循环以形成所述介电材料的第二单层。
在一可选实施例中,所述第一前体包含锆。
在一可选实施例中,所述第二循环进一步包括:使所述介电材料的所述第一单层的表面与所述第一前体反应并持续第五时间周期以形成第二前体表面;从所述第二前体表面清除所述第一前体并持续第六时间周期,其中,所述第六时间周期小于所述第二时间周期;用所述第二前体氧化所述第二前体表面以形成所述介电材料的第二单层,氧化所述第二前体表面持续第七时间周期,所述第七时间周期小于所述第三时间周期;以及从所述第二单层清除所述第二前体并持续第八时间周期,其中,所述第八时间周期小于所述第四时间周期。
在一可选实施例中,所述方法进一步包括执行第三循环以形成所述介电材料的第三单层,所述执行第三循环发生在所述执行第二循环之后,所述第三循环与所述第一循环相同。
在一可选实施例中,所述方法进一步包括在所述第二单层上方形成DRAM顶部电容器极板。
在一可选实施例中,所述方法进一步包括在所述第二单层上方形成电容器顶板。
在一可选实施例中,所述方法进一步包括在所述第二单层上方形成栅电极。
根据本发明实施例的又一个方面,还提供了一种半导体器件,该半导体器件包括:
第一层,包括第一材料,所述第一层包括多个第一单层,所述多个第一单层具有第一密度;以及
第二层,位于所述第一层上方,所述第二层包括所述第一材料,所述第二层包括多个第二单层,所述多个第二单层具有小于所述第一密度的第二密度。
在一可选实施例中,所述第一材料是氧化锆。
在一可选实施例中,所述半导体器件进一步包括位于所述第二层上方的第三层,所述第三层包括所述第一材料,并包括多个第三单层,所述多个第三单层具有大于所述第二密度的第三密度。
在一可选实施例中,所述第一层具有比所述第二层更高的氧浓度。
在一可选实施例中,所述半导体器件进一步包括位于所述第二层上方的电容器顶部电极。
附图说明
为了更充分地理解实施例及其优点,现将结合附图进行的以下描述作为参考,其中:
图1示出了根据一实施例的具有栅层叠和底部电容器电极的衬底;
图2A示出了根据一实施例的位于底部电容器电极上方的介电层的形成;
图2B示出了根据一实施例的可用于形成介电层的沉积腔室;
图3示出了根据一实施例的可用于形成介电层的第一沉积工艺;
图4示出了根据一实施例的位于介电层上方的顶部电容器电极和位线的形成;
图5A示出了根据一实施例的复合介电层;
图5B示出了根据一实施例的可用于帮助形成复合介电层的第二沉积工艺;
图6A-6B示出了根据一实施例的复合介电层;
图7A-7B示出了根据一实施例的显示密度增加的试验数据;
图8示出了根据一实施例的显示泄露减少的试验数据;
图9示出了根据一实施例的用作CMOS晶体管中的栅极电介质的介电层;和
图10示出了根据一实施例的用作III-V族金属栅极晶体管中的栅极电介质的介电层。
除非另有说明,不同附图中的相应数字和符号通常是指相应的部件。绘制附图是为了清楚地举例说明实施例的相关方面,附图并不必需按比例绘制。
具体实施方式
下面详细讨论实施例的制造和使用。然而,应该理解,这些实施例提供了许多可以在各种具体环境中实现的可应用概念。所讨论的具体实施例仅仅是制造和使用实施例的示例性的具体方式,并不用于限制实施例的范围。
实施例将描述关于具体环境中的实施例,即在28纳米工艺节点的金属-绝缘体-金属(MIM)中的高k电介质。然而,这些实施例也可以适用于其他用途中的其他介电层。
现在参考图1,示出了衬底101以及位于衬底101内的隔离区103、位于衬底101上的多个栅层叠102、源极/漏极区111、第一层间介电(ILD)层113、第一蚀刻停止层119、电容器接触件115、下位线接触件117、第二ILD层121、和底部电容器极板123。衬底101可以包括掺杂的或未掺杂的体硅或者绝缘体上硅(SOI)衬底的有源层。通常,SOI衬底包括半导体材料的层,如硅、锗、硅锗、SOI、绝缘体上硅锗(SGOI)、或它们的组合。可以使用的其他衬底包括多层衬底、梯度衬底、或混合取向衬底。
隔离区103可以是浅沟槽隔离(STI)区,并且可以通过蚀刻衬底101形成沟槽并用如本领域中已知的介电材料填充沟槽来形成。可以使用通过本领域中已知的常规方法形成的介电材料,如氧化物材料、高密度等离子体(HDP)氧化物或类似氧化物填充隔离区103。
位于衬底101上的栅层叠102可以包括栅极介电层105、栅电极107、和间隔件109。栅极介电层105可以是介电材料,如氧化硅、氮氧化硅、氮化硅、氧化物、含氮氧化物、或它们的组合等。栅极介电层105可以具有大于约4的相对介电常数值。这些材料的其他实例包括氧化铝、氧化镧、氧化铪、氧化锆、氮氧化铪、或它们的组合。
在栅极介电层105包括氧化物层的实施例中,栅极介电层105可以在包含氧化物、H2O、NO、或它们的组合的环境中通过任何氧化工艺形成,如湿法或干法热氧化。可选地,可以采用化学汽相沉积(CVD)技术将四乙基原硅酸盐(TEOS)和氧气用作前体来形成栅极电介质105。在一实施例中,栅极介电层105的厚度可以在约至约之间。
栅电极107可以包含导电材料,如金属(例如,钽、钛、钼、钨、铂、铝、铪、钌)、金属硅化物(例如,硅化钛、硅化钴、硅化镍、硅化钽)、金属氮化物(例如,氮化钛、氮化钽)、掺杂的多晶硅、其他导电材料、或它们的组合等。在栅电极107是多晶硅的实施例中,可以通过采用低压化学汽相沉积(LPCVD)沉积掺杂的或未掺杂多晶硅来形成厚度在约至约范围内,如约的栅电极107。
一旦形成了栅极介电层105和栅电极107,则可以图案化栅极介电层105和栅电极107。在一实施例中,可以采用例如光刻掩膜和蚀刻工艺来图案化栅极介电层105和栅电极107,由此在栅电极107上方形成光刻掩膜(在图1中未示出),然后使其暴露到图案化的光下。暴露之后,去除光刻掩膜的期望部分暴露出下面的栅电极107,然后可以蚀刻下面的栅电极107以去除暴露部分,从而图案化栅电极107和栅极介电层105。
可以通过在栅电极107和衬底101的上方均厚沉积一个或多个间隔件层(未示出)来形成间隔件109。间隔件层可以包含SiN、氮氧化物、SiC、SiON、氧化物和类似化合物,并可以通过常用方法如化学汽相沉积(CVD)、等离子体增强CVD、溅射、和本领域中已知的其他方法形成。可以诸如通过各向同性或各向异性蚀刻来图案化间隔件层,从而从结构的水平面去除间隔件层,并形成如图1中所示出的间隔件109。
可以在栅极介电层105的相对侧的衬底101中形成源极/漏极区111。在衬底101是n型衬底的实施例中,可以通过注入适当的p型掺杂剂如硼、锗、铟或类似物来形成源极/漏极区111。可选地,在衬底101是p型衬底的实施例中,可以通过注入适当的n型掺杂剂如磷,砷,或类似物来形成源极/漏极区111。可以使用栅极介电层105、栅电极107和间隔件109作为掩膜注入这些源极/漏极区111。
可以在栅层叠102和衬底101上方形成第一ILD层113以便提供衬底101、栅层叠102、和上面的金属层之间的电隔离。第一ILD层113可以通过以下方法来形成:化学汽相沉积、溅射或任何本领域中用于形成ILD的已知和使用的其他方法,使用例如四乙基正硅酸盐(TEOS)和氧气作为前体。第一ILD层113的厚度可以是约至约但也可以使用其他厚度。第一ILD层113可以包含掺杂的或未掺杂的氧化硅,但是可选地也可以采用其他材料,如掺杂氮化硅的硅酸盐玻璃、高k材料、或这些的组合,或类似物。形成之后,可以采用例如化学机械抛光(CMP)工艺平坦化第一ILD层113。
在形成第一ILD层113之后,可以通过第一ILD层113形成电容器接触件115和下位线接触件117。在一实施例中,可以形成电容器接触件115以提供衬底101和底部电容器极板123(在下面进一步描述)之间的电连接。可以形成下位线接触件117以帮助提供栅层叠102之间的源极/漏极区111与位线407(下面参考图4讨论的)之间的电连接。
可以通过镶嵌工艺形成电容器接触件115和下位线接触件117,以此掩膜沉积在第一ILD层113的表面上,在表面内蚀刻空穴,并使用导电材料(如钨或铜)填充空穴。应当注意到,电容器接触件115和下位线接触件117可以包含一层或多层导电材料。例如,电容器接触件115和下位线接触件117可以包括阻挡层、粘合层、多个导电层或类似层。
可以在第一ILD层113上方形成第一蚀刻停止层119以便为后续蚀刻工艺提供控制点。第一蚀刻停止层119可以是介电材料,如SiN或SiON,但是也可以使用本领域中已知的其他材料,如SiC或氧化物。在一实施例中,可以采用工艺如CVD、PECVD、ALD或类似工艺形成第一蚀刻停止层119,并且可以形成具有厚度在约和约之间的第一蚀刻停止层119。
可以在第一蚀刻停止层119上方形成第二ILD层121,并且第二ILD层121可以包含通过以下方法形成的氧化物:通过化学汽相沉积(CVD)技术使用四乙基正硅酸盐(TEOS)和氧气作为前体形成或者通过等离子体增强化学汽相沉积(PECVD)形成的氧化物。在一实施例中,第二ILD层121的厚度可以处于约和约之间。可以平坦化第二ILD层121的表面,诸如使用氧化物浆液通过CMP工艺来平坦化。
一旦形成了第二ILD层121,可以图案化第二ILD层121和第一蚀刻停止层119以便暴露出下面的电容器接触件115,以及提供在第二ILD层121中的开口,其中,底部电容器极板123可以形成在开口中。第二ILD层121和第一蚀刻停止层119可以采用例如合适的光刻掩膜和蚀刻工艺来图案化,其中光刻胶(在图1中未示出)形成在第二ILD层121的上方、然后照射并显影使得暴露出第二ILD层121的下面部分。一旦光刻胶已被显影,可以使用合适的蚀刻剂并且还使用光刻胶作为掩膜来去除暴露出的第二ILD层121。第二ILD层121的蚀刻可以停止在第一蚀刻停止层119上,然后采用光刻胶和第二ILD层121作为掩膜可以蚀刻第一蚀刻停止层119以便暴露出下面的电容器接触件115。
一旦图案化了第二ILD层121和第一蚀刻停止层119,可以形成与电容器接触件115电接触的底部电容器极板123。底部电容器极板123可以通过沉积并图案化导电材料层,如TiN、TaN、钌或类似物层,来形成。底部电容器极板123可以例如通过CVD或SLD技术来形成,并且底部电容器极板123可以具有约至约之间的厚度,如约的厚度。在形成了底部电容器极板123之后,可以通过例如CMP工艺或回蚀刻工艺去除第二ILD层121的表面上的任何多余的导电材料。
图2A示出了可形成在底部电容器极板123上方的沉积层201。沉积层201可以用作介电层以将底部电容器板123与顶部电容器极板401(图2A中未示出,但在下面参考图4并讨论)电隔离。在一实施例中,沉积层201可以结合底部电容器极板123和顶部电容器极板401一起使用以形成电容器,所述电容器可用于以例如嵌入式动态随机存取存储器(eDRAM)结构存储电荷。
图2B示出了可用于形成沉积层201的沉积系统200。在一实施例中,沉积系统200可以接收来自第一前体输送系统205和第二前体输送系统207的前体材料,并形成在第二ILD层121以及衬底101上方的底部电容器极板123上的沉积层201(为了清楚起见位于衬底101和第一蚀刻停止层119之间的介入层被从图2B中去除)。沉积层201的形成可以在接收第一前体材料和第二前体材料的沉积腔室203中实施。
第一前体输送系统205和第二前体输送系统207可以彼此结合起来工作以向沉积腔室203供应各种不同的前体材料。在一实施例中,第一前体输送系统205可以包括载气供应系统208、流量控制器209和前体罐211。载气供应系统208可以供应可用于帮助向沉积腔室203“运载”前体气体的气体。载气可以是惰性气体或者不与沉积系统200内的前体材料或其他材料反应的其他气体。例如,载气可以是氦气(He)、氩气(Ar)、氮气(N2)、氢气(H2)、或它们的组合,或类似气体,然而可选地也可以采用任何其他合适的载气。载气供应系统208可以是容器,如气体贮藏罐,所述容器或者位于沉积腔室203当地处或者位于远离沉积腔室203处。
载气供应系统208可以向流量控制器209供应期望的载气。可以采用流量控制器209以控制到前体罐211的载气的流量,并且最终控制到沉积腔室203的载气得流量,从而还有助于控制沉积腔室203内的压强。流量控制器209可以是例如比例阀、调节阀、针阀、调压器、质量流量控制器、或它们的组合,或类似装置。
流量控制器209可以向前体罐211供应受控载气。可以采用前体罐211通过蒸发或升华可以固相或液相输送的前体材料来向沉积腔室203供应期望的前体。前体罐211可以具有蒸汽区,在蒸汽区内前体材料可被驱动转化成气相以致来自流量控制器209的载气可以进入前体罐211,并使得或者运载气态前体材料离开前体罐211并去往沉积腔室203。
如果可以使用载气和升华/蒸发工艺来实现第二前体材料,则第二前体输送系统207可以包括与第一前体输送系统205相似的部件。可选地,在在制备和存储期间第二前体材料呈气体状态的实施例中,第二前体输送系统207可以包括第二前体材料供应系统210,如气体贮藏罐或机器,以在按需基础上生成第二前体材料。例如,在采用臭氧作为第二前体材料的实施例中,第二前体材料供应系统210可以包括集中器或者其他的能够按需生成臭氧以便向前体气体控制器213供应臭氧的臭氧生成器。
第二前体材料供应系统210可以供应一连串的第二前体材料到,例如,流量控制器209,其与上面描述的关于第一前体输送系统205的流量控制器相似。第二前体输送系统207中的流量控制器209可以帮助控制第二前体材料流向前体气体控制器213的流量,流量控制器209可以是例如比例阀、调节阀、针阀、调压器、质量流量控制器、或它们的组合,或类似装置,然而可选地也可以采用任何其他合适的控制第二前体材料的流量的方法。
第一前体输送系统205和第二前体输送系统207可以将它们各自的前体材料供应到前体气体控制器213中,该前体气体控制器213可以将第一前体输送系统205和第二前体输送系统207与沉积腔室203连接或者隔离,以便向沉积腔室203输送期望的前体材料。前体气体控制器213可以包括诸如阀门、流量计、传感器或类似物之类的器件,以控制每种前体的输送速率,并且前体气体控制器213可以通过接收到的来自控制单元215的指令来控制。
前体气体控制器213在接收到来自控制单元215的指令时,可打开或者关闭阀门以便将第一前体输送系统205和第二前体输送系统207之一与沉积腔室203连接,并通过多歧管216将期望的前体材料输送到沉积腔室203中并至莲蓬式喷头217。莲蓬式喷头217可以被用于将所选的前体材料散布至沉积腔室203中,并可以被设计成均匀散布前体材料以便最小化可能由不均匀散布引起的不期望的工艺条件。在一实施例中,莲蓬式喷头217可以具有圆形设计,该圆形设计带有在莲蓬式喷头217周围均匀散布的开口,以使得将期望的前体材料散布到沉积腔室203中。
沉积腔室203可以接收期望的前体材料,并将前体材料暴露于衬底101,并且沉积腔室203可以是可适于散布前体材料并使前体材料与衬底101接触的任何期望的形状。在图2B中所示出的实施例中,沉积腔室203具有圆柱形侧壁和底部。而且,沉积腔室203可以被壳体219围绕,壳体219由与各种工艺材料不反应的材料制成。在一实施例中,壳体219可以是钢、不锈钢、镍、铝、这些的合金、或者这些的组合。
在沉积腔室203内,衬底101可以被放置在安装平台221上,以便在沉积工艺期间定位和控制衬底101。安装平台221可以包括加热机构,以便在沉积工艺期间加热衬底101。进一步地,虽然图2B中示出了单个安装平台221,但是另外,在沉积腔室203内可以包括任何数量的安装平台221。
沉积腔室203还可以具有用于废气排出沉积腔室203的排气口225。为了帮助排出废气,还可以将真空泵223连接至沉积腔室203的排气口225。在控制单元215的控制下,真空泵223还可以用于以减少和控制沉积腔室203内的压强达到期望压强,以及还可以用于从沉积腔室203中排出前体材料以便为引入下一种前体材料做准备。
可以采用沉积系统200在衬底101上形成沉积层201。在一实施例中,沉积层201可以是材料如氧化锆(ZrO2)、氧化铪(HfO2)、氧化镧(La2O3)或类似物的高k介电层。可以采用沉积工艺如原子层沉积(ALD)在沉积腔室203中形成沉积层201。
然而,虽然本文所述的实施例描述了采用ALD形成电容器内的介电层的沉积层201,这些实施例不旨在限制电容器介电层,或者甚至完全不限制介电材料,因为采用这些实施例可以形成其他用途和材料,如导电材料。仅仅作为实例,微电子技术中的ALD可以用于形成高k(高介电常数)栅极氧化物、高k存储器电容器介电层(如图1至图6B中示出的沉积层201)、铁电体、和用于电极和互连件的金属和氮化物。在高k栅极氧化物中,可以期望对超薄膜的更大控制,在45nm技术下ALD可以达到更广泛的应用。在金属化中,共形膜是有用的,并且目前期望ALD可以用于65nm节点下的主流生产中。在动态随机存取存储器(DRAM)中,共形层的有用性更大,并且当部件尺寸变得小于100nm时ALD能够有助于满足加工目标。
在采用ALD形成金属氧化物半导体场效应晶体管(MOSFET)中的栅极介电层的实施例中,可以采用ALD沉积高k氧化物如Al2O3、ZrO2和HfO2。当高k氧化物按比例缩小至1.0nm或以下的厚度时,对高k氧化物的刺激来自通过当前使用的SiO2 MOSFET栅极介电层的高隧道电流的问题。采用高k氧化物,可以制成更厚的栅极介电层以实现要求的电容密度,因而可以减小通过该结构的隧道电流。
动态随机存取存储器(DRAM)电容器介电层的发展与迄今为止产业中广泛使用的栅极介电层--SiO2的发展相似,但其可能在不久的将来随着器件尺寸的减小而逐步被淘汰。为了增强操作,按比例缩小的DRAM电容器中的电容器介电层通常具有良好的共形性和200以上的介电常数值。鉴于此,虽然电容器介电层可以包括与用于MOSFET栅极介电层的材料相似的材料(例如,如上面所讨论的Al2O3、ZrO2、和HfO2),然而用于DRAM电容器介电层的候选材料还可以包括与用于MOSFET栅极介电层的那些材料不同的其他材料,如(Ba,Sr)TiO3。鉴于此,ALD工艺,其能够帮助满足高共形目的以实现DRAM电容器介电层,对形成用于DRAM应用的电容器介电层(如图1至图6B中所讨论的电容器介电层的实施例)也是有用的。
在又一个实例中,ALD工艺可以用于形成过渡金属氮化物,如TiN、WN和TaN,这发现作为金属阻挡物和作为栅极金属的潜在用途。金属阻挡物可以使用在基于铜的芯片中以避免铜扩散至周围的材料中,如绝缘体和硅衬底,也阻止由元素从绝缘体扩散的铜污染,绝缘体采用金属阻挡物层包围铜互连件。通常期望金属阻挡物是纯的、致密的、导电的、共形的、薄的,并对金属或绝缘体具有良好的粘合性。从加工技术立场来看,通过采用ALD的实施例可以实现这些属性。在一实施例中,氮化钛是一种这样的ALD氮化物,其可以采用ALD工艺用前体TiCl4和NH3形成。
ALD工艺还可以用于形成其他金属膜。作为实例,在使用沉积层201作为导电层的实施例中,沉积层201可以形成金属互连件(例如,铜)、金属插塞(例如,钨插塞)、DRAM电容器电极、铁电随机存取存储器(FRAM)电极(例如,贵金属)、以及甚至用于双栅极MOSFET的高功函数金属和低功函数金属。
基于所给出的这些,虽然,如图1至图6B所示出的实施例中所讨论的,本文所述的实施例可以用于形成作为电容器介电层的沉积层201,但是沉积层201并不旨在限制为电容器介电层或者甚至完全不限于介电材料。如上面段落中所讨论的,沉积层201可以形成为任何其他合适的介电层,包括用于MOSFET或介电材料的其他用途的栅极氧化物。可选地,可以形成沉积层201作为导电材料,并且该沉积层201可用于形成在导电互连件内的栅极金属或阻挡物金属。可选地,沉积层201的这些用途和所有其他合适的用途以及ALD工艺可以被采用,并且所有这些打算全部包括在这些实施例的范围内。
返回到沉积层201是电容器介电层的实施例中,可以通过将第一前体放入第一前体输送系统205中启动沉积层201的形成。例如,在沉积层201是ZrO2的实施例中,第一前体材料可以是诸如四[乙基甲基氨基]锆(TEMAZr)的前体。可选地,可以采用为任何合适的相(固相、液相或气相)的任何合适的前体材料以形成ZrO2层,如氯化锆(ZrCl4)、ZyALD、或Zr-PAZ。
另外,第二前体材料可置入第二前体输送系统207中或通过第二前体输送系统207形成。在对于沉积层201,ZrO2层被期望的实施例中,第二前体材料可以含有氧以便氧化第一前体材料以形成ZrO2单层。例如,在TEMAZr作为第一前体材料采用的实施例中,臭氧(O3)可作为第二前体材料使用,并臭氧可以置入第二前体输送系统207中。可选地,任何其他合适的前体材料如氧气、水(H2O)、N2O、H2O-H2O2、或这些的组合可作为第二前体材料使用。
一旦将第一前体材料和第二前体材料分别准备好在第一前体输送系统205和第二前体输送系统207中,通过控制单元215发送指令给前体气体控制器213从而将第一前体输送系统205连接至沉积腔室203可启动沉积层201的形成。一旦连接,第一前体输送系统205能够将第一前体材料(例如,TEMAZr)通过前体气体控制器213和多歧管216向莲蓬式喷头217输送。然后莲蓬式喷头217能够将第一前体材料散布至沉积腔室203中,在沉积腔室203中第一前体材料能够被吸收并与第二ILD层121和底部电容器极板123的暴露的表面反应。
在沉积层201是ZrO2的实施例中,第一前体材料可以在约150sccm和约600sccm之间如约200sccm的流速下流入沉积腔室203中并持续每循环为大约2秒的第一时间t1。另外,沉积腔室203可以保持在约1torr和约10torr之间如约3torr的压强下以及在约250℃和约400℃之间如约300℃的温度下。然而,作为本领域普通技术人员将意识到,这些工艺条件仅仅旨在示例,因为可以采用任何合适的工艺条件,同时这些合适的工艺条件保留在实施例的范围内。
当第一前体材料被吸收到第二ILD层121和底部电容器极板123上时,第一前体材料将与位于第二ILD层121和底部电容器极板123的暴露表面上的开放活性位点反应。然而,一旦第二ILD层121和底部电容器极板123上所有的开放活性位点都已与第一前体材料发生反应,则反应将停止,因为不再有与第一前体材料键合的开放活性位点。这种限制导致第一前体材料与第二ILD层121和底部电容器极板123的反应是自限制性的以及在第二ILD层121和底部电容器极板123的表面上形成经过反应的第一前体材料的单层,从而实现对沉积层201的厚度的精确控制。
在第二ILD层121和底部电容器极板123上的自限制性反应完成后,可以清除沉积腔室203中的第一前体材料。例如,控制单元215可以指令前体气体控制器213断开第一前体输送系统205(包含将被从沉积腔室203清除走的第一前体材料)并连接清除气体输送系统214以向沉积腔室203输送清除气体。在实施例中,清除气体输送系统214可以是向沉积腔室203提供清除气体如氮气、氩气、氙气、或其他非反应性气体的气体罐或者其他设备。另外,控制单元215也可以启动真空泵223,以便对沉积腔室203施加压强差从而来辅助去除第一前体材料。
清除气体连同真空泵223一起可以从沉积腔室203清除第一前体材料并持续第二时间t2,该第二时间t2大于第一时间t1。在一实施例中,第二时间t2可以处于约2秒和约12秒之间,如约10秒。通过采用更长的清除时间,可以从沉积腔室203去除更大量的残留有机金属化学品(例如,第一前体及其元素如碳、氮和氢)。鉴于此,将存在更少量的可能污染沉积层201的有机金属化学品,并污染可以减少。
当完成清除第一前体材料之后,可以通过控制单元215发送指令给前体气体控制器213从而断开清除气体输送系统214并将第二前体输送系统207(供应第二前体材料)连接至沉积腔室203来启动向沉积腔室203引入第二前体材料(例如,臭氧)。一旦连接,第二前体输送系统207可以向莲蓬式喷头217输送第二前体材料。然后莲蓬式喷头217能够将第二前体材料散布至沉积腔室203中,在沉积腔室203中第二前体材料可以与第一前体材料以另一自限制性反应方式反应以在第二ILD层121和底部电容器极板123的表面上形成期望材料例如ZrO2的单层。
在上面讨论的用臭氧形成ZrO2层的实施例中,臭氧可以在约500sccm和约900sccm之间如约700sccm的流速下引入至沉积腔室203中,同时,沉积腔室203可以保持在约1torr和约10torr之间的压强下以及约250℃至约400℃之间的温度下。然而,作为本领域普通技术人员将意识到,这些工艺条件预期仅仅旨在示例,因为可以采用任何合适的工艺条件来引入氧气,同时这些任何合适的工艺条件仍保留在实施例的范围内。
另外,可以将第二前体材料引入至沉积腔室203中并持续第三时间t3,该第三时间t3大于或等于第一时间t1。在第二前体材料是氧化剂如臭氧的实施例中,使第三时间t3大于第一时间t1有助于完成第一前体材料的氧化。在至少一个实施例中,第三时间t3可以大于或者等于第一时间t1,如处于约2秒和约5秒之间,如4秒。
在已形成期望材料例如ZrO2的单层之后,可以再次清除沉积腔室203(留下位于衬底101上的期望材料的单层)。例如,控制单元215可以指令前体气体控制213断开第二前体输送系统207(含有将被从沉积腔室203清除走的第二前体材料)并连接清除气体输送系统214以向沉积腔室203输送清除气体。另外,控制单元215还可以启动真空泵223以向沉积腔室203施加压强差从而辅助去除第二前体材料。
清除气体连同真空泵223一起可以从沉积腔室203清除第二前体材料并持续第四时间t4,该第四时间t4大于第三时间t3。在一实施例中,第四时间t4可以处于约2秒和约12秒之间,如约10秒。通过采用更长的清除时间,可以从沉积腔室203去除更大量的残留化学品(例如,第二前体材料和可能在副反应中形成的任何其他化学品)。另外,在一实施例中,总清除时间(例如第二时间t2和第四时间t4之和)可以大于引入前体材料的总时间(例如,第一时间t1和第三时间t3)。鉴于此,将存在更少量的可能污染沉积层201的残留化学品污染,并且污染可以减少。
在已对沉积腔室203清除第二前体材料之后,完成了用于形成材料的第一循环,并可以开始类似于第一循环的第二循环。例如,重复循环可以引入第一前体材料约2秒,用清除气体清除约10秒,用第二前体脉冲约4秒,以及用清除气体清除约10秒。可以重复这些循环直到衬底101上的沉积层201具有约和约之间如约的厚度。在一实施例中,用处于约70个循环和约120个循环之间的循环可以获得期望的厚度。一旦沉积层201已达到了期望的厚度,则可以从沉积腔室203中去除衬底101以进行更进一步的加工。
图3示出了描述的用于形成沉积层201的第一沉积工艺300的总括。在一实施例中,第一沉积工艺300采用一个循环,在该循环中,在第一步骤301中引入第一前体材料并持续第一时间t1,并在第二步骤303中清除沉积系统200并持续第二时间t2,其中第二时间大于第一时间t1。在第三步骤305中引入第二前体材料并持续第三时间t3,其中第三时间大于或等于第一时间t1。然后在第四步骤307中清除沉积系统200并持续第四时间t4,其中第四时间大于第三时间t3。
图4示出了顶部电容器极板401的形成以及顶部电容器极板401和沉积层201的图案化。顶部电容器极板401可以由导电材料如TiN、TaN、钌、铝、钨、铜、或这些的组合,或类似物形成,并可以采用工艺如CVD、PECVD、或ALD或类似工艺形成。在一实施例中,可以形成厚度处于约和约之间的顶部电容器极板401。
一旦形成了顶部电容器极板401,则可以图案化顶部电容器极板401和沉积层201以形成电容器。在一实施例中,顶部电容器极板401和沉积层201可以采用例如合适的光刻掩膜和蚀刻工艺来图案化,在光刻掩膜和蚀刻工艺中,光刻胶(在图4中未示出)形成在顶部电容器极板401上方、然后被照射并显影以致暴露出下面的顶部电容器极板401的部分。一旦显影了光刻胶,可以采用合适的蚀刻剂并还可以使用光刻胶作为掩膜去除暴露的顶部电容器极板401和下面的沉积层201。
图4还示出了第三ILD层403、上位线接触件405和位线407的形成。第三ILD层403可以包含氧化物,该氧化物可以通过化学汽相沉积(CVD)技术使用四乙基正硅酸盐(TEOS)和氧气作为前体形成。然而,可以使用本领域中已知的其他方法和材料。在一实施例中,第三ILD层403的厚度可以处于约和约之间,然而也可以使用其他厚度。可以平坦化第三ILD层403的表面,诸如通过CMP工艺使用氧化物浆液来平坦化。
一旦形成了第三ILD层403,可以形成上位线接触件405以延伸通过第三ILD层403和第一蚀刻停止层119。可以采用镶嵌工艺形成上位线接触件405,据此在第三ILD层403的表面上沉积掩膜,开口蚀刻至表面内,并使用导电材料(如钨或铜)来填充开口。然而,也可以采用本领域中已知的其他方法和材料来形成上位线接触件405。应当注意到,上位线接触件405可以包括一个或多个导电材料层。例如,上位线接触件405可以包括阻挡层、粘合层、多重导电层或类似层。
位线407可以与上位线接触件405电连接以连接至衬底101中的源极/漏极区111。可以通过镶嵌工艺形成位线407,通过镶嵌工艺在第三ILD层403的表面上沉积掩膜,图案蚀刻至表面内,并使用导电材料填充图案。本领域中已知的其他方法或材料也可以用于形成这种位线407。
图5A至图5B示出了可以采用第一沉积工艺300(如上面参考图3所讨论的)连同第二沉积工艺500一起形成的复合介电层501。该实施例虽然仍适用于28纳米工艺节点中的电容器,但也可以同样用于增加40nm工艺节点中的eDRAM中的电容器的数据保留。在该实施例中,第一沉积工艺300可以与第二沉积工艺500结合起来应用,以形成复合介电层501。在这些实施例中,第二沉积工艺500可以采用比第一沉积工艺300更快的循环时间,从而使复合介电层501的总形成在时间上比采用例如第一沉积工艺300自身形成沉积层201更有效。
例如,看图5A,复合介电层501可以包括第一介电材料503和第二介电材料505的复合结构。可以采用上面参考图2至图3描述的第一沉积工艺300形成第一介电材料503。然而,为了在总生产中节省时间,可以采用图5B中概括的第二沉积工艺500形成第二介电材料505。
在该实施例中,第二沉积工艺500可以包括在第5步骤507中引入第一前体材料并持续第一时间t1。然后在第6步骤509中,可扫吹沉积系统200并持续第五时间t5,其中第五时间小于第二时间t2;然后在第7步骤511中,可以引入第二前体材料到沉积系统200并持续第六时间t6,其中第六时间小于第三时间t3,以及然后在第8步骤513中,再次扫吹沉积系统200并持续第七时间t7,其中第七时间t7小于第四时间t4。
通过采用比第一沉积工艺300更短的清除第二前体材料的时间周期,可以减少第二沉积工艺500的循环时间,从而减少复合介电层501的总沉积工艺,并使总沉积工艺消耗时间更少且更有效。在一具体实施例中,第一时间t1、第五时间t5、第六时间t6和第七时间t7可以全都是相同的时间,如2秒。然而,第五时间t5、第六时间t6和第七时间t7并不打算限制为彼此是相同的时间,可选地可以采用其他时间周期。
因此,通过采用第一沉积工艺300和第二沉积工艺500,可以首先形成第一介电材料503以有助于减少复合介电层501的泄露,同时可以采用第二介电材料505以使总沉积工艺更有效。另外,通过采用第一沉积工艺300和第二沉积工艺500,第一介电材料503由于氧化时间增加将具有比第二介电材料505更高的氧含量。在一具体实施例中,可以形成厚度处于约和约之间的第一介电材料503(采用第一沉积工艺300形成),同时,可以形成厚度处于约和约之间的第二介电材料505(采用第二沉积工艺500形成)。第一介电材料503比第二介电材料505薄。由于这些厚度,复合介电层501可以获得处于约1pcs/hr和约2pcs/hr之间的更快的生产量(以晶圆/时计),同时还实现泄露减少。
图6A至图6B示出了复合介电层501的其他实施例。在图6A中,可以形成厚度处于约和约之间的第一介电材料503(采用第一沉积工艺300)。可以形成厚度处于约和约之间的第二介电材料505(采用第二沉积工艺500)。第一介电材料503和第二介电材料505可以具有基本上相同的厚度。该工艺可以比采用第一沉积工艺300自身获得更高的生产量,如约1.5pcs/hr(但是没有如上面参考图5A所述的实施例高),同时仍获得相比于上面参考图5A描述的实施例的更大的泄露减少。
图6B示出了复合介电层501的实施例,其中第一介电材料503A和503B可以形成在第二介电材料的两面上。第一介电材料503A和503B可以比第二介电材料505薄。在该实施例中,可以形成厚度处于约和约之间如约的第一介电材料503A(采用例如第一沉积工艺300),以及可以形成厚度处于约和约之间如约的第二介电材料505(采用第二沉积工艺500)。另外,一旦形成了第二介电材料505,可以在第二介电材料505上方形成第一介电材料的另一层503B。在实施例中,可以形成具有处于约和约之间如约的厚度的第一介电材料的附加层503B。相比于上面参考图6A描述的实施例,该实施例可以获得更大的泄露减少。并且,该实施例还可以具有更低的生产量(以晶圆/时计),如约1pcs/hr。
另外,作为本领域技术人员将意识到上面描述的关于复合介电层的实施例仅仅是复合介电层的示例性实例,并不旨在以任何方式限制实施例。可以采用第一介电材料503和第二介电材料505的任何其他合适的组合,如通过首先形成第二介电材料505,然后在第二介电材料505上方形成第一介电材料503。可选地,这些以及任何其他合适的组合可以被采用,并打算全都包括在实施例的范围内。
图7A至图7B示出了通过采用第一沉积工艺300(如上面参考图3所述的),可以更好地控制沉积层201的密度和缺陷计数。看图7A,采用第一沉积工艺300形成的电介质测量的平均密度为5.53k,其大于采用第二沉积工艺500形成的电介质的平均测量密度,采用第二沉积工艺形成的电介质的平均测量密度为5.2k。这种增加的密度表明采用第一沉积工艺300形成的电介质中的缺陷计数更低。
图7B示出了采用XRR拟合模型的增加密度的相似测试结果,其中,收集在0.12度至2度的光谱。看由第二沉积工艺500形成的且厚度为的氧化锆层,由第二沉积工艺500形成的氧化锆层的测量密度为5.278。然而,采用第一沉积工艺300形成的且厚度为的氧化锆层的测量密度为5.586。鉴于此,虽然在正常情况下期望介电层如氧化锆可以具有相同的密度,但是与其他形成方法如第二沉积工艺500相比,采用第一沉积工艺300导致沉积层201的密度增加。
图8示出了随着上面在图7A至图7B中示出的密度和缺陷计数方面的改进,当沉积层201为介电材料时其泄露也可以得到改进。在该图表中,等效氧化物厚度(EOT)(以埃计)沿着x轴确定,同时采用沉积层201并在-1.8伏特的电容器的泄露沿着y轴确定。如所示的,当采用第一沉积工艺300而不是第二沉积工艺500时,出现了不期望的泄露升高,泄露升高了约1个数量级。
图9示出了可以采用第一沉积工艺300来形成用于高k金属栅极晶体管900的第二栅极介电层901的另一实施例。在该实施例中,高k金属栅极晶体管900可以形成在例如衬底101上,并且如上面参考图1描述的隔离区103可以形成在衬底101内。
然而,在该实施例中,如上面参考图2至图3描述的,可以采用第一沉积工艺300形成第二栅极介电层901。例如,可以引入第一前体材料并持续第一时间t1,可以执行清除并持续第二时间t2,可以引入第二前体材料并持续第三时间t3,以及可以执行清除并持续第四时间t4。可以重复该循环以形成厚度处于约和约之间的第二栅极介电层901,并且可以形成具有更低的泄露、更高的密度和更少的缺陷的第二栅极介电层901,例如ZrO2。
可选地,可以使用通过第一沉积工艺300和第二沉积工艺500的组合形成的复合介电材料形成第二栅极介电层901,如上面参考图5A至图6B所述的。例如,可以采用厚度为约的第一介电材料503和厚度为约的第二介电材料505形成第二栅极介电层901,但是可选地可以采用第一介电材料503和第二介电材料505的任何合适的组合。
一旦形成了第二栅极介电层901,可以形成如上面参考图1所述的栅电极107、间隔件109和源极/漏极区111。然而,通过采用第一沉积工艺300(或者其自身或者与第二沉积工艺500结合),可以形成具有第二栅极介电层901的高k金属栅极晶体管900并且具有更低的泄露、更高的密度以及更少的缺陷。
图10示出了沉积层201或者复合介电层501可被用作III-V族高k金属栅极结构1000中的第三栅极介电层1025的又一个实施例。在该实施例中,III-V族高k金属栅极结构1000可以包括4°(100)裁切硅衬底1001、厚度为0.7μm的GaAs成核和缓冲层1003、厚度为0.7μm的In0.52Al0.48As缓冲层1005、厚度为100nm的In0.52Al0.48As底部阻挡层1007、厚度为10nm的In0.7Ga0.3As QW沟道1009、厚度为2nm的InP层1011、厚度为3nm的In0.52Al0.48As层1013、硅δ-掺杂层1015、厚度为3nm的In0.52Al0.48As层1017、厚度为6nm的InP蚀刻停止层1019、厚度为20nm的n++InGaAs层1021、以及源极/漏极区1023。在该实施例中,第三栅极介电层1025(或者通过第一沉积工艺300自身或者与第二沉积工艺500结合形成)可以被形成为延伸穿过In0.52Al0.48As层1013、硅δ-掺杂层1015、In0.52Al0.48As层1017、InP蚀刻停止层1019、和n++InGaAs层1021,采用第一沉积工艺300自身或者与第二沉积工艺500结合通过例如蚀刻这些层然后形成第三栅极介电层1025。一旦形成了第三栅极介电层1025,可以在第三栅极介电层1025上方形成栅电极1027。
通过采用使用第一沉积工艺300自身或第一沉积工艺300与第二沉积工艺500结合形成的沉积层201或复合介电层501,III-V族高k金属栅极结构1000内的第三栅极介电层1025可以增加密度和减少缺陷计数的数量。另外,采用介电层的器件中可能发生的任何泄露可被减少,从而增加器件的效能。
在一实施例中,提供了一种用于制造半导体器件的方法,该方法包括:向沉积腔室中引入第一前体并持续第一时间;在引入第一前体之后向沉积腔室引入第一清除气体并持续第二时间,其中,第二时间大于第一时间。在引入第一清除气体之后向沉积腔室引入第二前体并持续第三时间,其中,第三时间大于第一时间。在引入第二前体之后向沉积腔室引入第二清除气体并持续第四时间。
在另一个实施例中,提供了一种用于制造半导体器件的方法,该方法包括:执行第一循环以形成介电材料的第一单层。第一循环包括使衬底的表面与第一前体反应并持续第一时间周期(也即衬底的表面与第一前体反应的时间长为第一时间周期)以形成第一前体表面;从第一前体表面清除第一前体并持续第二时间周期,其中,第二时间周期大于第一时间周期;用第二前体氧化第一前体表面以形成介电材料的第一单层,所述氧化第一前体表面持续第三时间周期,其中,第三周期大于或等于第一时间周期;以及从介电材料的第一单层清除第二前体并持续第四时间周期,其中,第四时间周期大于第三时间周期。该方法还包括在执行第一循环之后执行第二循环以形成所述介电材料的第二单层。
在又一个实施例中,提供了一种半导体器件,该半导体器件包括:包含第一材料的第一层,该第一层包括多个第一单层,该多个第一单层具有第一密度。第二层位于第一层的上方,该第二层包括第一材料,该第二层包括多个第二单层,该多个第二单层具有小于第一密度的第二密度。
尽管已经详细地描述了实施例及其优势,但应该理解,可以在不背离所附权利要求限定的实施例的精神和范围的情况下,在此可进行各种改变、替换和更改。例如,可以颠倒复合电介质内的第一介电材料和第二介电材料的布置,首先形成第二介电材料,然后在第二介电材料上方形成第一介电材料。
而且,本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的具体实施例。作为本领域普通技术人员根据实施例的公开内容将很容易理解,根据实施例可以采用现有存在的或今后开发的用于实现与本文所述相应实施例基本上相同的功能或者获得基本上相同的结果的工艺、机器、制造、材料组分、装置、方法或步骤。因此,所附权利要求旨在其范围内包括这样的工艺、机器、制造、材料组分、装置、方法或步骤。
Claims (18)
1.一种用于制造半导体器件的方法,所述方法包括:
向沉积腔室引入第一前体并持续第一时间;
在引入所述第一前体之后,向所述沉积腔室引入第一清除气体并持续第二时间,其中所述第二时间大于所述第一时间;
在引入所述第一清除气体之后,向所述沉积腔室引入第二前体并持续第三时间,其中所述第三时间大于或等于所述第一时间;
在引入所述第二前体之后向所述沉积腔室引入第二清除气体并持续第四时间;
向所述沉积腔室引入所述第一前体并持续第五时间,在向所述沉积腔室引入所述第二清除气体之后进行向所述沉积腔室引入所述第一前体并持续第五时间的步骤;
向所述沉积腔室引入第三清除气体并持续第六时间,所述第六时间小于所述第二时间;
向所述沉积腔室引入所述第二前体并持续第七时间,所述第七时间小于所述第三时间;以及
向所述沉积腔室引入第四清除气体并持续第八时间,所述第八时间小于所述第四时间。
2.根据权利要求1所述的方法,其中,所述第四时间大于所述第三时间。
3.根据权利要求1所述的方法,其中,所述第二时间和所述第四时间的第一总和大于所述第一时间和所述第三时间的第二总和。
4.根据权利要求1所述的方法,其中,所述第二前体含有氧。
5.根据权利要求1所述的方法,其中,所述第五时间、所述第六时间、所述第七时间、和所述第八时间全都彼此相等。
6.根据权利要求1所述的方法,其中,引入的所述第一前体包含锆。
7.根据权利要求1所述的方法,进一步包括在引入第四清除气体之后形成DRAM电容器顶板。
8.一种用于制造半导体器件的方法,所述方法包括:
执行第一循环以形成介电材料的第一单层,所述第一循环包括:
使衬底的表面与第一前体反应并持续第一时间周期以形成第一前体表面;
从所述第一前体表面清除所述第一前体并持续第二时间,其中,所述第二时间周期大于所述第一时间周期;
用第二前体氧化所述第一前体表面以形成所述介电材料的所述第一单层,氧化所述第一前体表面持续第三时间周期,其中,所述第三时间周期大于或等于所述第一时间周期;以及
从所述介电材料的所述第一单层清除所述第二前体并持续第四时间周期,其中,所述第四时间周期大于所述第三时间周期;以及
在执行所述第一循环之后执行第二循环以形成所述介电材料的第二单层,所述第二循环进一步包括:
使所述介电材料的所述第一单层的表面与所述第一前体反应并持续第五时间周期以形成第二前体表面;
从所述第二前体表面清除所述第一前体并持续第六时间周期,其中,所述第六时间周期小于所述第二时间周期;
用所述第二前体氧化所述第二前体表面以形成所述介电材料的第二单层,氧化所述第二前体表面持续第七时间周期,所述第七时间周期小于所述第三时间周期;以及
从所述第二单层清除所述第二前体并持续第八时间周期,其中,所述第八时间周期小于所述第四时间周期。
9.根据权利要求8所述的方法,其中,所述第一前体包含锆。
10.根据权利要求8所述的方法,进一步包括执行第三循环以形成所述介电材料的第三单层,所述执行第三循环发生在所述执行第二循环之后,所述第三循环与所述第一循环相同。
11.根据权利要求8所述的方法,进一步包括在所述第二单层上方形成DRAM顶部电容器极板。
12.根据权利要求8所述的方法,其中,进一步包括在所述第二单层上方形成电容器顶板。
13.根据权利要求8所述的方法,进一步包括在所述第二单层上方形成栅电极。
14.一种根据权利要求1-13中任一项所述的方法制备的半导体器件,包括:
第一层,包括第一材料,所述第一层包括多个第一单层,所述多个第一单层具有第一密度;以及
第二层,位于所述第一层上方,所述第二层包括所述第一材料,所述第二层包括多个第二单层,所述多个第二单层具有小于所述第一密度的第二密度。
15.根据权利要求14所述的半导体器件,其中,所述第一材料是氧化锆。
16.根据权利要求14所述的半导体器件,进一步包括位于所述第二层上方的第三层,所述第三层包括所述第一材料,并包括多个第三单层,所述多个第三单层具有大于所述第二密度的第三密度。
17.根据权利要求14所述的半导体器件,其中,所述第一层具有比所述第二层更高的氧浓度。
18.根据权利要求14所述的半导体器件,进一步包括位于所述第二层上方的电容器顶部电极。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/275,021 US8759234B2 (en) | 2011-10-17 | 2011-10-17 | Deposited material and method of formation |
US13/275,021 | 2011-10-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103050376A CN103050376A (zh) | 2013-04-17 |
CN103050376B true CN103050376B (zh) | 2015-09-23 |
Family
ID=48062977
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201210057500.XA Expired - Fee Related CN103050376B (zh) | 2011-10-17 | 2012-03-06 | 沉积材料及形成方法 |
Country Status (2)
Country | Link |
---|---|
US (4) | US8759234B2 (zh) |
CN (1) | CN103050376B (zh) |
Families Citing this family (279)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9394608B2 (en) | 2009-04-06 | 2016-07-19 | Asm America, Inc. | Semiconductor processing reactor and components thereof |
US8802201B2 (en) | 2009-08-14 | 2014-08-12 | Asm America, Inc. | Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species |
US9312155B2 (en) | 2011-06-06 | 2016-04-12 | Asm Japan K.K. | High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules |
US10854498B2 (en) | 2011-07-15 | 2020-12-01 | Asm Ip Holding B.V. | Wafer-supporting device and method for producing same |
US20130023129A1 (en) | 2011-07-20 | 2013-01-24 | Asm America, Inc. | Pressure transmitter for a semiconductor processing environment |
US9017481B1 (en) | 2011-10-28 | 2015-04-28 | Asm America, Inc. | Process feed management for semiconductor substrate processing |
US10714315B2 (en) | 2012-10-12 | 2020-07-14 | Asm Ip Holdings B.V. | Semiconductor reaction chamber showerhead |
US8785283B2 (en) * | 2012-12-05 | 2014-07-22 | United Microelectronics Corp. | Method for forming semiconductor structure having metal connection |
US20160376700A1 (en) | 2013-02-01 | 2016-12-29 | Asm Ip Holding B.V. | System for treatment of deposition reactor |
US10443127B2 (en) | 2013-11-05 | 2019-10-15 | Taiwan Semiconductor Manufacturing Company Limited | System and method for supplying a precursor for an atomic layer deposition (ALD) process |
JP6158111B2 (ja) * | 2014-02-12 | 2017-07-05 | 東京エレクトロン株式会社 | ガス供給方法及び半導体製造装置 |
US10683571B2 (en) | 2014-02-25 | 2020-06-16 | Asm Ip Holding B.V. | Gas supply manifold and method of supplying gases to chamber using same |
US10167557B2 (en) | 2014-03-18 | 2019-01-01 | Asm Ip Holding B.V. | Gas distribution system, reactor including the system, and methods of using the same |
US11015245B2 (en) | 2014-03-19 | 2021-05-25 | Asm Ip Holding B.V. | Gas-phase reactor and system having exhaust plenum and components thereof |
US10858737B2 (en) | 2014-07-28 | 2020-12-08 | Asm Ip Holding B.V. | Showerhead assembly and components thereof |
US9890456B2 (en) | 2014-08-21 | 2018-02-13 | Asm Ip Holding B.V. | Method and system for in situ formation of gas-phase compounds |
US9657845B2 (en) | 2014-10-07 | 2017-05-23 | Asm Ip Holding B.V. | Variable conductance gas distribution apparatus and method |
US10941490B2 (en) | 2014-10-07 | 2021-03-09 | Asm Ip Holding B.V. | Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same |
SG11201706564UA (en) * | 2015-02-13 | 2017-09-28 | Entegris Inc | Coatings for enhancement of properties and performance of substrate articles and apparatus |
US9570289B2 (en) | 2015-03-06 | 2017-02-14 | Lam Research Corporation | Method and apparatus to minimize seam effect during TEOS oxide film deposition |
US10276355B2 (en) | 2015-03-12 | 2019-04-30 | Asm Ip Holding B.V. | Multi-zone reactor, system including the reactor, and method of using the same |
US10458018B2 (en) | 2015-06-26 | 2019-10-29 | Asm Ip Holding B.V. | Structures including metal carbide material, devices including the structures, and methods of forming same |
US10600673B2 (en) | 2015-07-07 | 2020-03-24 | Asm Ip Holding B.V. | Magnetic susceptor to baseplate seal |
US10211308B2 (en) | 2015-10-21 | 2019-02-19 | Asm Ip Holding B.V. | NbMC layers |
US9589850B1 (en) * | 2015-12-10 | 2017-03-07 | Globalfoundries Inc. | Method for controlled recessing of materials in cavities in IC devices |
US11139308B2 (en) | 2015-12-29 | 2021-10-05 | Asm Ip Holding B.V. | Atomic layer deposition of III-V compounds to form V-NAND devices |
US10529554B2 (en) | 2016-02-19 | 2020-01-07 | Asm Ip Holding B.V. | Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches |
US10190213B2 (en) | 2016-04-21 | 2019-01-29 | Asm Ip Holding B.V. | Deposition of metal borides |
US10865475B2 (en) | 2016-04-21 | 2020-12-15 | Asm Ip Holding B.V. | Deposition of metal borides and silicides |
US10367080B2 (en) | 2016-05-02 | 2019-07-30 | Asm Ip Holding B.V. | Method of forming a germanium oxynitride film |
US10032628B2 (en) | 2016-05-02 | 2018-07-24 | Asm Ip Holding B.V. | Source/drain performance through conformal solid state doping |
US11453943B2 (en) | 2016-05-25 | 2022-09-27 | Asm Ip Holding B.V. | Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor |
US10612137B2 (en) | 2016-07-08 | 2020-04-07 | Asm Ip Holdings B.V. | Organic reactants for atomic layer deposition |
US9859151B1 (en) | 2016-07-08 | 2018-01-02 | Asm Ip Holding B.V. | Selective film deposition method to form air gaps |
US10714385B2 (en) | 2016-07-19 | 2020-07-14 | Asm Ip Holding B.V. | Selective deposition of tungsten |
KR102532607B1 (ko) | 2016-07-28 | 2023-05-15 | 에이에스엠 아이피 홀딩 비.브이. | 기판 가공 장치 및 그 동작 방법 |
US9887082B1 (en) | 2016-07-28 | 2018-02-06 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
US9812320B1 (en) | 2016-07-28 | 2017-11-07 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
WO2018063207A1 (en) * | 2016-09-29 | 2018-04-05 | Intel Corporation | Resistive random access memory cell |
US10643826B2 (en) | 2016-10-26 | 2020-05-05 | Asm Ip Holdings B.V. | Methods for thermally calibrating reaction chambers |
US11532757B2 (en) | 2016-10-27 | 2022-12-20 | Asm Ip Holding B.V. | Deposition of charge trapping layers |
US10643904B2 (en) | 2016-11-01 | 2020-05-05 | Asm Ip Holdings B.V. | Methods for forming a semiconductor device and related semiconductor device structures |
US10714350B2 (en) | 2016-11-01 | 2020-07-14 | ASM IP Holdings, B.V. | Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures |
US10229833B2 (en) | 2016-11-01 | 2019-03-12 | Asm Ip Holding B.V. | Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures |
US10134757B2 (en) | 2016-11-07 | 2018-11-20 | Asm Ip Holding B.V. | Method of processing a substrate and a device manufactured by using the method |
KR102546317B1 (ko) | 2016-11-15 | 2023-06-21 | 에이에스엠 아이피 홀딩 비.브이. | 기체 공급 유닛 및 이를 포함하는 기판 처리 장치 |
KR20180068582A (ko) | 2016-12-14 | 2018-06-22 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
US11581186B2 (en) | 2016-12-15 | 2023-02-14 | Asm Ip Holding B.V. | Sequential infiltration synthesis apparatus |
US11447861B2 (en) * | 2016-12-15 | 2022-09-20 | Asm Ip Holding B.V. | Sequential infiltration synthesis apparatus and a method of forming a patterned structure |
KR20180070971A (ko) | 2016-12-19 | 2018-06-27 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
US10269558B2 (en) | 2016-12-22 | 2019-04-23 | Asm Ip Holding B.V. | Method of forming a structure on a substrate |
US10867788B2 (en) | 2016-12-28 | 2020-12-15 | Asm Ip Holding B.V. | Method of forming a structure on a substrate |
US11390950B2 (en) | 2017-01-10 | 2022-07-19 | Asm Ip Holding B.V. | Reactor system and method to reduce residue buildup during a film deposition process |
US10655221B2 (en) | 2017-02-09 | 2020-05-19 | Asm Ip Holding B.V. | Method for depositing oxide film by thermal ALD and PEALD |
US10468261B2 (en) | 2017-02-15 | 2019-11-05 | Asm Ip Holding B.V. | Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures |
US10529563B2 (en) | 2017-03-29 | 2020-01-07 | Asm Ip Holdings B.V. | Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures |
USD876504S1 (en) | 2017-04-03 | 2020-02-25 | Asm Ip Holding B.V. | Exhaust flow control ring for semiconductor deposition apparatus |
KR102457289B1 (ko) | 2017-04-25 | 2022-10-21 | 에이에스엠 아이피 홀딩 비.브이. | 박막 증착 방법 및 반도체 장치의 제조 방법 |
US10892156B2 (en) | 2017-05-08 | 2021-01-12 | Asm Ip Holding B.V. | Methods for forming a silicon nitride film on a substrate and related semiconductor device structures |
US10770286B2 (en) | 2017-05-08 | 2020-09-08 | Asm Ip Holdings B.V. | Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures |
CN107063829B (zh) * | 2017-05-24 | 2023-07-25 | 华中科技大学 | 一种哑铃状样本制备模具以及样本聚合方法 |
US11306395B2 (en) | 2017-06-28 | 2022-04-19 | Asm Ip Holding B.V. | Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus |
US10685834B2 (en) | 2017-07-05 | 2020-06-16 | Asm Ip Holdings B.V. | Methods for forming a silicon germanium tin layer and related semiconductor device structures |
KR20190009245A (ko) | 2017-07-18 | 2019-01-28 | 에이에스엠 아이피 홀딩 비.브이. | 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물 |
US11018002B2 (en) | 2017-07-19 | 2021-05-25 | Asm Ip Holding B.V. | Method for selectively depositing a Group IV semiconductor and related semiconductor device structures |
US10541333B2 (en) | 2017-07-19 | 2020-01-21 | Asm Ip Holding B.V. | Method for depositing a group IV semiconductor and related semiconductor device structures |
US11374112B2 (en) | 2017-07-19 | 2022-06-28 | Asm Ip Holding B.V. | Method for depositing a group IV semiconductor and related semiconductor device structures |
US10590535B2 (en) | 2017-07-26 | 2020-03-17 | Asm Ip Holdings B.V. | Chemical treatment, deposition and/or infiltration apparatus and method for using the same |
US10770336B2 (en) | 2017-08-08 | 2020-09-08 | Asm Ip Holding B.V. | Substrate lift mechanism and reactor including same |
US10692741B2 (en) | 2017-08-08 | 2020-06-23 | Asm Ip Holdings B.V. | Radiation shield |
US11139191B2 (en) | 2017-08-09 | 2021-10-05 | Asm Ip Holding B.V. | Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith |
US11769682B2 (en) | 2017-08-09 | 2023-09-26 | Asm Ip Holding B.V. | Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith |
US10249524B2 (en) | 2017-08-09 | 2019-04-02 | Asm Ip Holding B.V. | Cassette holder assembly for a substrate cassette and holding member for use in such assembly |
USD900036S1 (en) | 2017-08-24 | 2020-10-27 | Asm Ip Holding B.V. | Heater electrical connector and adapter |
US11830730B2 (en) | 2017-08-29 | 2023-11-28 | Asm Ip Holding B.V. | Layer forming method and apparatus |
US11056344B2 (en) | 2017-08-30 | 2021-07-06 | Asm Ip Holding B.V. | Layer forming method |
US11295980B2 (en) | 2017-08-30 | 2022-04-05 | Asm Ip Holding B.V. | Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures |
KR102491945B1 (ko) | 2017-08-30 | 2023-01-26 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR102401446B1 (ko) | 2017-08-31 | 2022-05-24 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR102630301B1 (ko) | 2017-09-21 | 2024-01-29 | 에이에스엠 아이피 홀딩 비.브이. | 침투성 재료의 순차 침투 합성 방법 처리 및 이를 이용하여 형성된 구조물 및 장치 |
US10844484B2 (en) | 2017-09-22 | 2020-11-24 | Asm Ip Holding B.V. | Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods |
US10658205B2 (en) | 2017-09-28 | 2020-05-19 | Asm Ip Holdings B.V. | Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber |
US10403504B2 (en) | 2017-10-05 | 2019-09-03 | Asm Ip Holding B.V. | Method for selectively depositing a metallic film on a substrate |
US10319588B2 (en) | 2017-10-10 | 2019-06-11 | Asm Ip Holding B.V. | Method for depositing a metal chalcogenide on a substrate by cyclical deposition |
US10923344B2 (en) | 2017-10-30 | 2021-02-16 | Asm Ip Holding B.V. | Methods for forming a semiconductor structure and related semiconductor structures |
US10529578B2 (en) * | 2017-11-12 | 2020-01-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of fabricating semiconductor structure |
US10910262B2 (en) | 2017-11-16 | 2021-02-02 | Asm Ip Holding B.V. | Method of selectively depositing a capping layer structure on a semiconductor device structure |
KR102443047B1 (ko) | 2017-11-16 | 2022-09-14 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 방법 및 그에 의해 제조된 장치 |
US11022879B2 (en) | 2017-11-24 | 2021-06-01 | Asm Ip Holding B.V. | Method of forming an enhanced unexposed photoresist layer |
CN111316417B (zh) | 2017-11-27 | 2023-12-22 | 阿斯莫Ip控股公司 | 与批式炉偕同使用的用于储存晶圆匣的储存装置 |
JP7206265B2 (ja) | 2017-11-27 | 2023-01-17 | エーエスエム アイピー ホールディング ビー.ブイ. | クリーン・ミニエンバイロメントを備える装置 |
US10872771B2 (en) | 2018-01-16 | 2020-12-22 | Asm Ip Holding B. V. | Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures |
CN111630203A (zh) | 2018-01-19 | 2020-09-04 | Asm Ip私人控股有限公司 | 通过等离子体辅助沉积来沉积间隙填充层的方法 |
TWI799494B (zh) | 2018-01-19 | 2023-04-21 | 荷蘭商Asm 智慧財產控股公司 | 沈積方法 |
USD903477S1 (en) | 2018-01-24 | 2020-12-01 | Asm Ip Holdings B.V. | Metal clamp |
US11018047B2 (en) | 2018-01-25 | 2021-05-25 | Asm Ip Holding B.V. | Hybrid lift pin |
USD880437S1 (en) | 2018-02-01 | 2020-04-07 | Asm Ip Holding B.V. | Gas supply plate for semiconductor manufacturing apparatus |
US11081345B2 (en) | 2018-02-06 | 2021-08-03 | Asm Ip Holding B.V. | Method of post-deposition treatment for silicon oxide film |
US11685991B2 (en) | 2018-02-14 | 2023-06-27 | Asm Ip Holding B.V. | Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
US10896820B2 (en) | 2018-02-14 | 2021-01-19 | Asm Ip Holding B.V. | Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
US10731249B2 (en) | 2018-02-15 | 2020-08-04 | Asm Ip Holding B.V. | Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus |
US10658181B2 (en) | 2018-02-20 | 2020-05-19 | Asm Ip Holding B.V. | Method of spacer-defined direct patterning in semiconductor fabrication |
KR102636427B1 (ko) | 2018-02-20 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 방법 및 장치 |
US10975470B2 (en) | 2018-02-23 | 2021-04-13 | Asm Ip Holding B.V. | Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment |
US11473195B2 (en) | 2018-03-01 | 2022-10-18 | Asm Ip Holding B.V. | Semiconductor processing apparatus and a method for processing a substrate |
US11629406B2 (en) | 2018-03-09 | 2023-04-18 | Asm Ip Holding B.V. | Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate |
US11114283B2 (en) | 2018-03-16 | 2021-09-07 | Asm Ip Holding B.V. | Reactor, system including the reactor, and methods of manufacturing and using same |
KR102646467B1 (ko) | 2018-03-27 | 2024-03-11 | 에이에스엠 아이피 홀딩 비.브이. | 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조 |
US11230766B2 (en) | 2018-03-29 | 2022-01-25 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
US11088002B2 (en) | 2018-03-29 | 2021-08-10 | Asm Ip Holding B.V. | Substrate rack and a substrate processing system and method |
KR102501472B1 (ko) | 2018-03-30 | 2023-02-20 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 방법 |
KR20190128558A (ko) | 2018-05-08 | 2019-11-18 | 에이에스엠 아이피 홀딩 비.브이. | 기판 상에 산화물 막을 주기적 증착 공정에 의해 증착하기 위한 방법 및 관련 소자 구조 |
KR20190129718A (ko) | 2018-05-11 | 2019-11-20 | 에이에스엠 아이피 홀딩 비.브이. | 기판 상에 피도핑 금속 탄화물 막을 형성하는 방법 및 관련 반도체 소자 구조 |
KR102596988B1 (ko) | 2018-05-28 | 2023-10-31 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 방법 및 그에 의해 제조된 장치 |
US11270899B2 (en) | 2018-06-04 | 2022-03-08 | Asm Ip Holding B.V. | Wafer handling chamber with moisture reduction |
US11718913B2 (en) | 2018-06-04 | 2023-08-08 | Asm Ip Holding B.V. | Gas distribution system and reactor system including same |
US11286562B2 (en) | 2018-06-08 | 2022-03-29 | Asm Ip Holding B.V. | Gas-phase chemical reactor and method of using same |
US10797133B2 (en) | 2018-06-21 | 2020-10-06 | Asm Ip Holding B.V. | Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures |
KR102568797B1 (ko) | 2018-06-21 | 2023-08-21 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 시스템 |
WO2020003000A1 (en) | 2018-06-27 | 2020-01-02 | Asm Ip Holding B.V. | Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material |
KR20210024462A (ko) | 2018-06-27 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | 금속 함유 재료를 형성하기 위한 주기적 증착 방법 및 금속 함유 재료를 포함하는 필름 및 구조체 |
KR20200002519A (ko) | 2018-06-29 | 2020-01-08 | 에이에스엠 아이피 홀딩 비.브이. | 박막 증착 방법 및 반도체 장치의 제조 방법 |
US10612136B2 (en) | 2018-06-29 | 2020-04-07 | ASM IP Holding, B.V. | Temperature-controlled flange and reactor system including same |
US10388513B1 (en) | 2018-07-03 | 2019-08-20 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US10755922B2 (en) | 2018-07-03 | 2020-08-25 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US10767789B2 (en) | 2018-07-16 | 2020-09-08 | Asm Ip Holding B.V. | Diaphragm valves, valve components, and methods for forming valve components |
US11053591B2 (en) | 2018-08-06 | 2021-07-06 | Asm Ip Holding B.V. | Multi-port gas injection system and reactor system including same |
US10883175B2 (en) | 2018-08-09 | 2021-01-05 | Asm Ip Holding B.V. | Vertical furnace for processing substrates and a liner for use therein |
US10829852B2 (en) | 2018-08-16 | 2020-11-10 | Asm Ip Holding B.V. | Gas distribution device for a wafer processing apparatus |
US11430674B2 (en) | 2018-08-22 | 2022-08-30 | Asm Ip Holding B.V. | Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods |
KR20200030162A (ko) | 2018-09-11 | 2020-03-20 | 에이에스엠 아이피 홀딩 비.브이. | 박막 증착 방법 |
US11024523B2 (en) | 2018-09-11 | 2021-06-01 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
US11049751B2 (en) | 2018-09-14 | 2021-06-29 | Asm Ip Holding B.V. | Cassette supply system to store and handle cassettes and processing apparatus equipped therewith |
CN110970344A (zh) | 2018-10-01 | 2020-04-07 | Asm Ip控股有限公司 | 衬底保持设备、包含所述设备的系统及其使用方法 |
US11232963B2 (en) | 2018-10-03 | 2022-01-25 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
KR102592699B1 (ko) | 2018-10-08 | 2023-10-23 | 에이에스엠 아이피 홀딩 비.브이. | 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치 |
US10847365B2 (en) | 2018-10-11 | 2020-11-24 | Asm Ip Holding B.V. | Method of forming conformal silicon carbide film by cyclic CVD |
US10811256B2 (en) | 2018-10-16 | 2020-10-20 | Asm Ip Holding B.V. | Method for etching a carbon-containing feature |
KR102546322B1 (ko) | 2018-10-19 | 2023-06-21 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 및 기판 처리 방법 |
KR102605121B1 (ko) | 2018-10-19 | 2023-11-23 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 및 기판 처리 방법 |
USD948463S1 (en) | 2018-10-24 | 2022-04-12 | Asm Ip Holding B.V. | Susceptor for semiconductor substrate supporting apparatus |
US11087997B2 (en) | 2018-10-31 | 2021-08-10 | Asm Ip Holding B.V. | Substrate processing apparatus for processing substrates |
KR20200051105A (ko) | 2018-11-02 | 2020-05-13 | 에이에스엠 아이피 홀딩 비.브이. | 기판 지지 유닛 및 이를 포함하는 기판 처리 장치 |
US11572620B2 (en) | 2018-11-06 | 2023-02-07 | Asm Ip Holding B.V. | Methods for selectively depositing an amorphous silicon film on a substrate |
US11031242B2 (en) | 2018-11-07 | 2021-06-08 | Asm Ip Holding B.V. | Methods for depositing a boron doped silicon germanium film |
US11177253B2 (en) * | 2018-11-09 | 2021-11-16 | Texas Instruments Incorporated | Transistor with integrated capacitor |
US10847366B2 (en) | 2018-11-16 | 2020-11-24 | Asm Ip Holding B.V. | Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process |
US10818758B2 (en) | 2018-11-16 | 2020-10-27 | Asm Ip Holding B.V. | Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures |
US10559458B1 (en) | 2018-11-26 | 2020-02-11 | Asm Ip Holding B.V. | Method of forming oxynitride film |
US11217444B2 (en) | 2018-11-30 | 2022-01-04 | Asm Ip Holding B.V. | Method for forming an ultraviolet radiation responsive metal oxide-containing film |
KR102636428B1 (ko) | 2018-12-04 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치를 세정하는 방법 |
US11158513B2 (en) | 2018-12-13 | 2021-10-26 | Asm Ip Holding B.V. | Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures |
JP2020096183A (ja) | 2018-12-14 | 2020-06-18 | エーエスエム・アイピー・ホールディング・ベー・フェー | 窒化ガリウムの選択的堆積を用いてデバイス構造体を形成する方法及びそのためのシステム |
TWI819180B (zh) | 2019-01-17 | 2023-10-21 | 荷蘭商Asm 智慧財產控股公司 | 藉由循環沈積製程於基板上形成含過渡金屬膜之方法 |
KR20200091543A (ko) | 2019-01-22 | 2020-07-31 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
CN111524788B (zh) | 2019-02-01 | 2023-11-24 | Asm Ip私人控股有限公司 | 氧化硅的拓扑选择性膜形成的方法 |
KR20200102357A (ko) | 2019-02-20 | 2020-08-31 | 에이에스엠 아이피 홀딩 비.브이. | 3-d nand 응용의 플러그 충진체 증착용 장치 및 방법 |
TW202104632A (zh) | 2019-02-20 | 2021-02-01 | 荷蘭商Asm Ip私人控股有限公司 | 用來填充形成於基材表面內之凹部的循環沉積方法及設備 |
KR102626263B1 (ko) | 2019-02-20 | 2024-01-16 | 에이에스엠 아이피 홀딩 비.브이. | 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치 |
JP2020136678A (ja) | 2019-02-20 | 2020-08-31 | エーエスエム・アイピー・ホールディング・ベー・フェー | 基材表面内に形成された凹部を充填するための方法および装置 |
JP2020133004A (ja) | 2019-02-22 | 2020-08-31 | エーエスエム・アイピー・ホールディング・ベー・フェー | 基材を処理するための基材処理装置および方法 |
KR20200108242A (ko) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체 |
KR20200108243A (ko) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | SiOC 층을 포함한 구조체 및 이의 형성 방법 |
KR20200108248A (ko) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | SiOCN 층을 포함한 구조체 및 이의 형성 방법 |
KR20200116033A (ko) | 2019-03-28 | 2020-10-08 | 에이에스엠 아이피 홀딩 비.브이. | 도어 개방기 및 이를 구비한 기판 처리 장치 |
KR20200116855A (ko) | 2019-04-01 | 2020-10-13 | 에이에스엠 아이피 홀딩 비.브이. | 반도체 소자를 제조하는 방법 |
US11447864B2 (en) | 2019-04-19 | 2022-09-20 | Asm Ip Holding B.V. | Layer forming method and apparatus |
KR20200125453A (ko) | 2019-04-24 | 2020-11-04 | 에이에스엠 아이피 홀딩 비.브이. | 기상 반응기 시스템 및 이를 사용하는 방법 |
KR20200130121A (ko) | 2019-05-07 | 2020-11-18 | 에이에스엠 아이피 홀딩 비.브이. | 딥 튜브가 있는 화학물질 공급원 용기 |
KR20200130118A (ko) | 2019-05-07 | 2020-11-18 | 에이에스엠 아이피 홀딩 비.브이. | 비정질 탄소 중합체 막을 개질하는 방법 |
KR20200130652A (ko) | 2019-05-10 | 2020-11-19 | 에이에스엠 아이피 홀딩 비.브이. | 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조 |
JP2020188255A (ja) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | ウェハボートハンドリング装置、縦型バッチ炉および方法 |
JP2020188254A (ja) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | ウェハボートハンドリング装置、縦型バッチ炉および方法 |
USD947913S1 (en) | 2019-05-17 | 2022-04-05 | Asm Ip Holding B.V. | Susceptor shaft |
USD975665S1 (en) | 2019-05-17 | 2023-01-17 | Asm Ip Holding B.V. | Susceptor shaft |
USD935572S1 (en) | 2019-05-24 | 2021-11-09 | Asm Ip Holding B.V. | Gas channel plate |
USD922229S1 (en) | 2019-06-05 | 2021-06-15 | Asm Ip Holding B.V. | Device for controlling a temperature of a gas supply unit |
KR20200141003A (ko) | 2019-06-06 | 2020-12-17 | 에이에스엠 아이피 홀딩 비.브이. | 가스 감지기를 포함하는 기상 반응기 시스템 |
KR20200143254A (ko) | 2019-06-11 | 2020-12-23 | 에이에스엠 아이피 홀딩 비.브이. | 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조 |
USD944946S1 (en) | 2019-06-14 | 2022-03-01 | Asm Ip Holding B.V. | Shower plate |
USD931978S1 (en) | 2019-06-27 | 2021-09-28 | Asm Ip Holding B.V. | Showerhead vacuum transport |
KR20210005515A (ko) | 2019-07-03 | 2021-01-14 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법 |
JP2021015791A (ja) | 2019-07-09 | 2021-02-12 | エーエスエム アイピー ホールディング ビー.ブイ. | 同軸導波管を用いたプラズマ装置、基板処理方法 |
CN112216646A (zh) | 2019-07-10 | 2021-01-12 | Asm Ip私人控股有限公司 | 基板支撑组件及包括其的基板处理装置 |
KR20210010307A (ko) | 2019-07-16 | 2021-01-27 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR20210010820A (ko) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | 실리콘 게르마늄 구조를 형성하는 방법 |
KR20210010816A (ko) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | 라디칼 보조 점화 플라즈마 시스템 및 방법 |
US11643724B2 (en) | 2019-07-18 | 2023-05-09 | Asm Ip Holding B.V. | Method of forming structures using a neutral beam |
CN112242296A (zh) | 2019-07-19 | 2021-01-19 | Asm Ip私人控股有限公司 | 形成拓扑受控的无定形碳聚合物膜的方法 |
CN112309843A (zh) | 2019-07-29 | 2021-02-02 | Asm Ip私人控股有限公司 | 实现高掺杂剂掺入的选择性沉积方法 |
CN112309900A (zh) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | 基板处理设备 |
CN112309899A (zh) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | 基板处理设备 |
US11587814B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11227782B2 (en) | 2019-07-31 | 2022-01-18 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11587815B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
CN112323048B (zh) | 2019-08-05 | 2024-02-09 | Asm Ip私人控股有限公司 | 用于化学源容器的液位传感器 |
USD965044S1 (en) | 2019-08-19 | 2022-09-27 | Asm Ip Holding B.V. | Susceptor shaft |
USD965524S1 (en) | 2019-08-19 | 2022-10-04 | Asm Ip Holding B.V. | Susceptor support |
JP2021031769A (ja) | 2019-08-21 | 2021-03-01 | エーエスエム アイピー ホールディング ビー.ブイ. | 成膜原料混合ガス生成装置及び成膜装置 |
USD949319S1 (en) | 2019-08-22 | 2022-04-19 | Asm Ip Holding B.V. | Exhaust duct |
USD979506S1 (en) | 2019-08-22 | 2023-02-28 | Asm Ip Holding B.V. | Insulator |
USD940837S1 (en) | 2019-08-22 | 2022-01-11 | Asm Ip Holding B.V. | Electrode |
KR20210024423A (ko) | 2019-08-22 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | 홀을 구비한 구조체를 형성하기 위한 방법 |
USD930782S1 (en) | 2019-08-22 | 2021-09-14 | Asm Ip Holding B.V. | Gas distributor |
KR20210024420A (ko) | 2019-08-23 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법 |
US11286558B2 (en) | 2019-08-23 | 2022-03-29 | Asm Ip Holding B.V. | Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film |
KR20210029090A (ko) | 2019-09-04 | 2021-03-15 | 에이에스엠 아이피 홀딩 비.브이. | 희생 캡핑 층을 이용한 선택적 증착 방법 |
KR20210029663A (ko) | 2019-09-05 | 2021-03-16 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
US11562901B2 (en) | 2019-09-25 | 2023-01-24 | Asm Ip Holding B.V. | Substrate processing method |
US11469235B2 (en) * | 2019-09-27 | 2022-10-11 | Nanya Technology Corporation | Semiconductor device and method for fabricating the same |
CN112593212B (zh) | 2019-10-02 | 2023-12-22 | Asm Ip私人控股有限公司 | 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法 |
TW202129060A (zh) | 2019-10-08 | 2021-08-01 | 荷蘭商Asm Ip控股公司 | 基板處理裝置、及基板處理方法 |
TW202115273A (zh) | 2019-10-10 | 2021-04-16 | 荷蘭商Asm Ip私人控股有限公司 | 形成光阻底層之方法及包括光阻底層之結構 |
KR20210045930A (ko) | 2019-10-16 | 2021-04-27 | 에이에스엠 아이피 홀딩 비.브이. | 실리콘 산화물의 토폴로지-선택적 막의 형성 방법 |
US11637014B2 (en) | 2019-10-17 | 2023-04-25 | Asm Ip Holding B.V. | Methods for selective deposition of doped semiconductor material |
KR20210047808A (ko) | 2019-10-21 | 2021-04-30 | 에이에스엠 아이피 홀딩 비.브이. | 막을 선택적으로 에칭하기 위한 장치 및 방법 |
KR20210050453A (ko) | 2019-10-25 | 2021-05-07 | 에이에스엠 아이피 홀딩 비.브이. | 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조 |
US11646205B2 (en) | 2019-10-29 | 2023-05-09 | Asm Ip Holding B.V. | Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same |
KR20210054983A (ko) | 2019-11-05 | 2021-05-14 | 에이에스엠 아이피 홀딩 비.브이. | 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템 |
US11501968B2 (en) | 2019-11-15 | 2022-11-15 | Asm Ip Holding B.V. | Method for providing a semiconductor device with silicon filled gaps |
KR20210062561A (ko) | 2019-11-20 | 2021-05-31 | 에이에스엠 아이피 홀딩 비.브이. | 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템 |
CN112951697A (zh) | 2019-11-26 | 2021-06-11 | Asm Ip私人控股有限公司 | 基板处理设备 |
KR20210065848A (ko) | 2019-11-26 | 2021-06-04 | 에이에스엠 아이피 홀딩 비.브이. | 제1 유전체 표면과 제2 금속성 표면을 포함한 기판 상에 타겟 막을 선택적으로 형성하기 위한 방법 |
CN112885692A (zh) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | 基板处理设备 |
CN112885693A (zh) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | 基板处理设备 |
JP2021090042A (ja) | 2019-12-02 | 2021-06-10 | エーエスエム アイピー ホールディング ビー.ブイ. | 基板処理装置、基板処理方法 |
KR20210070898A (ko) | 2019-12-04 | 2021-06-15 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR20210078405A (ko) | 2019-12-17 | 2021-06-28 | 에이에스엠 아이피 홀딩 비.브이. | 바나듐 나이트라이드 층을 형성하는 방법 및 바나듐 나이트라이드 층을 포함하는 구조 |
KR20210080214A (ko) | 2019-12-19 | 2021-06-30 | 에이에스엠 아이피 홀딩 비.브이. | 기판 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조 |
JP2021109175A (ja) | 2020-01-06 | 2021-08-02 | エーエスエム・アイピー・ホールディング・ベー・フェー | ガス供給アセンブリ、その構成要素、およびこれを含む反応器システム |
US11993847B2 (en) | 2020-01-08 | 2024-05-28 | Asm Ip Holding B.V. | Injector |
KR20210095050A (ko) | 2020-01-20 | 2021-07-30 | 에이에스엠 아이피 홀딩 비.브이. | 박막 형성 방법 및 박막 표면 개질 방법 |
TW202130846A (zh) | 2020-02-03 | 2021-08-16 | 荷蘭商Asm Ip私人控股有限公司 | 形成包括釩或銦層的結構之方法 |
TW202146882A (zh) | 2020-02-04 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | 驗證一物品之方法、用於驗證一物品之設備、及用於驗證一反應室之系統 |
US11776846B2 (en) | 2020-02-07 | 2023-10-03 | Asm Ip Holding B.V. | Methods for depositing gap filling fluids and related systems and devices |
US11781243B2 (en) | 2020-02-17 | 2023-10-10 | Asm Ip Holding B.V. | Method for depositing low temperature phosphorous-doped silicon |
TW202203344A (zh) | 2020-02-28 | 2022-01-16 | 荷蘭商Asm Ip控股公司 | 專用於零件清潔的系統 |
KR20210116240A (ko) | 2020-03-11 | 2021-09-27 | 에이에스엠 아이피 홀딩 비.브이. | 조절성 접합부를 갖는 기판 핸들링 장치 |
US11876356B2 (en) | 2020-03-11 | 2024-01-16 | Asm Ip Holding B.V. | Lockout tagout assembly and system and method of using same |
KR20210117157A (ko) | 2020-03-12 | 2021-09-28 | 에이에스엠 아이피 홀딩 비.브이. | 타겟 토폴로지 프로파일을 갖는 층 구조를 제조하기 위한 방법 |
KR20210124042A (ko) | 2020-04-02 | 2021-10-14 | 에이에스엠 아이피 홀딩 비.브이. | 박막 형성 방법 |
TW202146689A (zh) | 2020-04-03 | 2021-12-16 | 荷蘭商Asm Ip控股公司 | 阻障層形成方法及半導體裝置的製造方法 |
TW202145344A (zh) | 2020-04-08 | 2021-12-01 | 荷蘭商Asm Ip私人控股有限公司 | 用於選擇性蝕刻氧化矽膜之設備及方法 |
US11821078B2 (en) | 2020-04-15 | 2023-11-21 | Asm Ip Holding B.V. | Method for forming precoat film and method for forming silicon-containing film |
US11519068B2 (en) | 2020-04-16 | 2022-12-06 | Honda Motor Co., Ltd. | Moisture governed growth method of atomic layer ribbons and nanoribbons of transition metal dichalcogenides |
US11639546B2 (en) | 2020-04-16 | 2023-05-02 | Honda Motor Co., Ltd. | Moisture governed growth method of atomic layer ribbons and nanoribbons of transition metal dichalcogenides |
US11996289B2 (en) | 2020-04-16 | 2024-05-28 | Asm Ip Holding B.V. | Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods |
US11408073B2 (en) * | 2020-04-16 | 2022-08-09 | Honda Motor Co., Ltd. | Method for growth of atomic layer ribbons and nanoribbons of transition metal dichalcogenides |
TW202146831A (zh) | 2020-04-24 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | 垂直批式熔爐總成、及用於冷卻垂直批式熔爐之方法 |
TW202140831A (zh) | 2020-04-24 | 2021-11-01 | 荷蘭商Asm Ip私人控股有限公司 | 形成含氮化釩層及包含該層的結構之方法 |
KR20210132600A (ko) | 2020-04-24 | 2021-11-04 | 에이에스엠 아이피 홀딩 비.브이. | 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템 |
KR20210134226A (ko) | 2020-04-29 | 2021-11-09 | 에이에스엠 아이피 홀딩 비.브이. | 고체 소스 전구체 용기 |
KR20210134869A (ko) | 2020-05-01 | 2021-11-11 | 에이에스엠 아이피 홀딩 비.브이. | Foup 핸들러를 이용한 foup의 빠른 교환 |
KR20210141379A (ko) | 2020-05-13 | 2021-11-23 | 에이에스엠 아이피 홀딩 비.브이. | 반응기 시스템용 레이저 정렬 고정구 |
KR20210143653A (ko) | 2020-05-19 | 2021-11-29 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR20210145078A (ko) | 2020-05-21 | 2021-12-01 | 에이에스엠 아이피 홀딩 비.브이. | 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법 |
TW202200837A (zh) | 2020-05-22 | 2022-01-01 | 荷蘭商Asm Ip私人控股有限公司 | 用於在基材上形成薄膜之反應系統 |
TW202201602A (zh) | 2020-05-29 | 2022-01-01 | 荷蘭商Asm Ip私人控股有限公司 | 基板處理方法 |
TW202218133A (zh) | 2020-06-24 | 2022-05-01 | 荷蘭商Asm Ip私人控股有限公司 | 形成含矽層之方法 |
TW202217953A (zh) | 2020-06-30 | 2022-05-01 | 荷蘭商Asm Ip私人控股有限公司 | 基板處理方法 |
KR20220010438A (ko) | 2020-07-17 | 2022-01-25 | 에이에스엠 아이피 홀딩 비.브이. | 포토리소그래피에 사용하기 위한 구조체 및 방법 |
TW202204662A (zh) | 2020-07-20 | 2022-02-01 | 荷蘭商Asm Ip私人控股有限公司 | 用於沉積鉬層之方法及系統 |
US11501812B2 (en) * | 2020-07-31 | 2022-11-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices including ferroelectric memory and methods of forming the same |
CN111900170B (zh) * | 2020-07-31 | 2024-03-05 | 无锡舜铭存储科技有限公司 | 一种三维铁电存储器结构及制造方法 |
TW202212623A (zh) | 2020-08-26 | 2022-04-01 | 荷蘭商Asm Ip私人控股有限公司 | 形成金屬氧化矽層及金屬氮氧化矽層的方法、半導體結構、及系統 |
USD990534S1 (en) | 2020-09-11 | 2023-06-27 | Asm Ip Holding B.V. | Weighted lift pin |
USD1012873S1 (en) | 2020-09-24 | 2024-01-30 | Asm Ip Holding B.V. | Electrode for semiconductor processing apparatus |
TW202229613A (zh) | 2020-10-14 | 2022-08-01 | 荷蘭商Asm Ip私人控股有限公司 | 於階梯式結構上沉積材料的方法 |
KR20220053482A (ko) | 2020-10-22 | 2022-04-29 | 에이에스엠 아이피 홀딩 비.브이. | 바나듐 금속을 증착하는 방법, 구조체, 소자 및 증착 어셈블리 |
TW202223136A (zh) | 2020-10-28 | 2022-06-16 | 荷蘭商Asm Ip私人控股有限公司 | 用於在基板上形成層之方法、及半導體處理系統 |
TW202235675A (zh) | 2020-11-30 | 2022-09-16 | 荷蘭商Asm Ip私人控股有限公司 | 注入器、及基板處理設備 |
US11946137B2 (en) | 2020-12-16 | 2024-04-02 | Asm Ip Holding B.V. | Runout and wobble measurement fixtures |
TW202231903A (zh) | 2020-12-22 | 2022-08-16 | 荷蘭商Asm Ip私人控股有限公司 | 過渡金屬沉積方法、過渡金屬層、用於沉積過渡金屬於基板上的沉積總成 |
CN112956012B (zh) * | 2021-01-27 | 2024-02-23 | 长江存储科技有限责任公司 | 用于在半导体结构中形成阻挡层的方法 |
USD1023959S1 (en) | 2021-05-11 | 2024-04-23 | Asm Ip Holding B.V. | Electrode for substrate processing apparatus |
USD981973S1 (en) | 2021-05-11 | 2023-03-28 | Asm Ip Holding B.V. | Reactor wall for substrate processing apparatus |
USD980814S1 (en) | 2021-05-11 | 2023-03-14 | Asm Ip Holding B.V. | Gas distributor for substrate processing apparatus |
USD980813S1 (en) | 2021-05-11 | 2023-03-14 | Asm Ip Holding B.V. | Gas flow control plate for substrate processing apparatus |
USD990441S1 (en) | 2021-09-07 | 2023-06-27 | Asm Ip Holding B.V. | Gas flow control plate |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1480998A (zh) * | 2002-07-08 | 2004-03-10 | ���ǵ�����ʽ���� | 采用原子层沉积工艺在基片上形成二氧化硅层的方法 |
Family Cites Families (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6100184A (en) | 1997-08-20 | 2000-08-08 | Sematech, Inc. | Method of making a dual damascene interconnect structure using low dielectric constant material for an inter-level dielectric layer |
JP3798908B2 (ja) | 1998-05-07 | 2006-07-19 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
US6635583B2 (en) | 1998-10-01 | 2003-10-21 | Applied Materials, Inc. | Silicon carbide deposition for use as a low-dielectric constant anti-reflective coating |
US6940146B2 (en) | 1999-09-03 | 2005-09-06 | United Microelectronics Corp. | Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same |
US6331479B1 (en) | 1999-09-20 | 2001-12-18 | Chartered Semiconductor Manufacturing Ltd. | Method to prevent degradation of low dielectric constant material in copper damascene interconnects |
US6319814B1 (en) | 1999-10-12 | 2001-11-20 | United Microelectronics Corp. | Method of fabricating dual damascene |
US6391795B1 (en) | 1999-10-22 | 2002-05-21 | Lsi Logic Corporation | Low k dielectric composite layer for intergrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning |
US6284657B1 (en) | 2000-02-25 | 2001-09-04 | Chartered Semiconductor Manufacturing Ltd. | Non-metallic barrier formation for copper damascene type interconnects |
US6475929B1 (en) | 2001-02-01 | 2002-11-05 | Advanced Micro Devices, Inc. | Method of manufacturing a semiconductor structure with treatment to sacrificial stop layer producing diffusion to an adjacent low-k dielectric layer lowering the constant |
US6383913B1 (en) | 2001-04-06 | 2002-05-07 | United Microelectronics Corp. | Method for improving surface wettability of low k material |
US20020171147A1 (en) | 2001-05-15 | 2002-11-21 | Tri-Rung Yew | Structure of a dual damascene via |
US6649517B2 (en) | 2001-05-18 | 2003-11-18 | Chartered Semiconductor Manufacturing Ltd. | Copper metal structure for the reduction of intra-metal capacitance |
US6989603B2 (en) | 2001-10-02 | 2006-01-24 | Guobiao Zhang | nF-Opening Aiv Structures |
US7847344B2 (en) * | 2002-07-08 | 2010-12-07 | Micron Technology, Inc. | Memory utilizing oxide-nitride nanolaminates |
US7425493B2 (en) * | 2002-08-17 | 2008-09-16 | Samsung Electronics Co., Ltd. | Methods of forming dielectric structures and capacitors |
US6911389B2 (en) | 2002-09-18 | 2005-06-28 | Texas Instruments Incorporated | Self aligned vias in dual damascene interconnect, buried mask approach |
US6872655B2 (en) | 2003-02-04 | 2005-03-29 | Texas Instruments Incorporated | Method of forming an integrated circuit thin film resistor |
US6800923B1 (en) | 2003-04-25 | 2004-10-05 | Oki Electric Industry Co., Ltd. | Multilayer analog interconnecting line layout for a mixed-signal integrated circuit |
JP2007507902A (ja) * | 2003-09-30 | 2007-03-29 | アヴィザ テクノロジー インコーポレイテッド | 原子層堆積による高誘電率誘電体の成長 |
US7056646B1 (en) | 2003-10-01 | 2006-06-06 | Advanced Micro Devices, Inc. | Use of base developers as immersion lithography fluid |
US7115993B2 (en) | 2004-01-30 | 2006-10-03 | Tokyo Electron Limited | Structure comprising amorphous carbon film and method of forming thereof |
TWI229411B (en) | 2004-04-20 | 2005-03-11 | Powerchip Semiconductor Corp | Method of manufacturing a semiconductor device |
US20050252449A1 (en) * | 2004-05-12 | 2005-11-17 | Nguyen Son T | Control of gas flow and delivery to suppress the formation of particles in an MOCVD/ALD system |
US20050277302A1 (en) | 2004-05-28 | 2005-12-15 | Nguyen Son V | Advanced low dielectric constant barrier layers |
US20060148192A1 (en) | 2005-01-04 | 2006-07-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Damascene MIM capacitor structure with self-aligned oxidation fabrication process |
US7531448B2 (en) | 2005-06-22 | 2009-05-12 | United Microelectronics Corp. | Manufacturing method of dual damascene structure |
US7314838B2 (en) * | 2005-07-21 | 2008-01-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a high density dielectric film by chemical vapor deposition |
US7432210B2 (en) | 2005-10-05 | 2008-10-07 | Applied Materials, Inc. | Process to open carbon based hardmask |
JP2007266464A (ja) * | 2006-03-29 | 2007-10-11 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
KR100833180B1 (ko) * | 2006-07-06 | 2008-05-28 | 삼성전자주식회사 | Sti 구조를 갖는 반도체 장치 및 그 제조방법 |
US7838415B2 (en) | 2007-01-16 | 2010-11-23 | United Microelectronics Corp. | Method of fabricating dual damascene structure |
KR20080113518A (ko) | 2007-06-25 | 2008-12-31 | 주식회사 동부하이텍 | 반도체 소자의 제조 방법 |
US7772073B2 (en) * | 2007-09-28 | 2010-08-10 | Tokyo Electron Limited | Semiconductor device containing a buried threshold voltage adjustment layer and method of forming |
JP2009170439A (ja) * | 2008-01-10 | 2009-07-30 | Panasonic Corp | ゲート絶縁膜の形成方法 |
KR101394157B1 (ko) * | 2008-04-08 | 2014-05-14 | 삼성전자주식회사 | 수직 필러 트랜지스터, 이를 포함하는 디램 소자, 수직필러 트랜지스터 형성 방법 및 반도체 박막 형성 방법. |
US8383525B2 (en) * | 2008-04-25 | 2013-02-26 | Asm America, Inc. | Plasma-enhanced deposition process for forming a metal oxide thin film and related structures |
KR101403337B1 (ko) * | 2008-07-08 | 2014-06-05 | 삼성전자주식회사 | 메모리 장치의 작동 방법 |
KR101446335B1 (ko) * | 2008-07-10 | 2014-10-02 | 삼성전자주식회사 | 반도체 소자의 적층형 커패시터 제조방법 |
US9245792B2 (en) | 2008-07-25 | 2016-01-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for forming interconnect structures |
US20100148153A1 (en) * | 2008-12-16 | 2010-06-17 | Hudait Mantu K | Group III-V devices with delta-doped layer under channel region |
US8008206B2 (en) | 2009-09-24 | 2011-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Double patterning strategy for contact hole and trench in photolithography |
US8759910B2 (en) * | 2009-11-20 | 2014-06-24 | Force Mos Technology Co., Ltd. | Trench MOSFET with trenched floating gates having thick trench bottom oxide as termination |
US20120100717A1 (en) | 2010-10-26 | 2012-04-26 | Texas Instruments Incorporated | Trench lithography process |
US9245788B2 (en) | 2012-04-11 | 2016-01-26 | International Business Machines Corporation | Non-bridging contact via structures in proximity |
US9230854B2 (en) | 2013-04-08 | 2016-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method |
-
2011
- 2011-10-17 US US13/275,021 patent/US8759234B2/en not_active Expired - Fee Related
-
2012
- 2012-03-06 CN CN201210057500.XA patent/CN103050376B/zh not_active Expired - Fee Related
-
2014
- 2014-06-11 US US14/301,897 patent/US9257272B2/en active Active
-
2016
- 2016-02-05 US US15/016,999 patent/US9524868B2/en active Active
- 2016-12-19 US US15/382,918 patent/US9818885B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1480998A (zh) * | 2002-07-08 | 2004-03-10 | ���ǵ�����ʽ���� | 采用原子层沉积工艺在基片上形成二氧化硅层的方法 |
Also Published As
Publication number | Publication date |
---|---|
US9524868B2 (en) | 2016-12-20 |
US20160155642A1 (en) | 2016-06-02 |
US20140291745A1 (en) | 2014-10-02 |
US20170103884A1 (en) | 2017-04-13 |
US9818885B2 (en) | 2017-11-14 |
CN103050376A (zh) | 2013-04-17 |
US9257272B2 (en) | 2016-02-09 |
US20130093048A1 (en) | 2013-04-18 |
US8759234B2 (en) | 2014-06-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103050376B (zh) | 沉积材料及形成方法 | |
KR100737192B1 (ko) | 반도체 장치 및 그 제조 방법 | |
KR100622609B1 (ko) | 박막 형성 방법 | |
TWI446522B (zh) | 半導體裝置及其製造方法 | |
US7791124B2 (en) | SOI deep trench capacitor employing a non-conformal inner spacer | |
KR100655139B1 (ko) | 캐패시터 제조 방법 | |
US7482242B2 (en) | Capacitor, method of forming the same, semiconductor device having the capacitor and method of manufacturing the same | |
US7825043B2 (en) | Method for fabricating capacitor in semiconductor device | |
US20080258216A1 (en) | Semiconductor device and method for manufacturing the same | |
TW201113936A (en) | Method for fabricating a gate structure | |
US20020160565A1 (en) | Capacitor for semiconductor devices and a method of fabricating such capacitors | |
TW578297B (en) | Semiconductor integrated circuit device and the manufacturing method thereof | |
US7923343B2 (en) | Capacitor of semiconductor device and method for forming the same | |
US20080054400A1 (en) | Capacitor and method of manufacturing the same | |
US20170309491A1 (en) | Method of forming tungsten film and method of fabricating semiconductor device using the same | |
US20060292810A1 (en) | Method of manufacturing a capacitor | |
US20130171797A1 (en) | Method for forming multi-component layer, method for forming multi-component dielectric layer and method for fabricating semiconductor device | |
TW507299B (en) | Method for manufacturing semiconductor device | |
JPH09199445A (ja) | 半導体装置の製造方法 | |
KR100780631B1 (ko) | 티타늄산화막의 증착 방법 및 그를 이용한 캐패시터의제조 방법 | |
Gutsche et al. | Atomic layer deposition for advanced DRAM applications | |
US7608517B2 (en) | Method for forming capacitor of semiconductor device | |
JP4781571B2 (ja) | 半導体装置の製造方法 | |
KR20070045661A (ko) | 캐패시터 제조 방법 | |
US7199004B2 (en) | Method of forming capacitor of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150923 |
|
CF01 | Termination of patent right due to non-payment of annual fee |