CN103038877A - 用于控制半导体裸片翘曲的设备和方法 - Google Patents
用于控制半导体裸片翘曲的设备和方法 Download PDFInfo
- Publication number
- CN103038877A CN103038877A CN2010800639960A CN201080063996A CN103038877A CN 103038877 A CN103038877 A CN 103038877A CN 2010800639960 A CN2010800639960 A CN 2010800639960A CN 201080063996 A CN201080063996 A CN 201080063996A CN 103038877 A CN103038877 A CN 103038877A
- Authority
- CN
- China
- Prior art keywords
- semiconductor die
- die
- fabricating
- vias
- warpage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/121—Arrangements for protection of devices protecting against mechanical damage
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
- H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
- H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/640,111 | 2009-12-17 | ||
| US12/640,111 US8710629B2 (en) | 2009-12-17 | 2009-12-17 | Apparatus and method for controlling semiconductor die warpage |
| PCT/US2010/061143 WO2011084706A2 (en) | 2009-12-17 | 2010-12-17 | Apparatus and method for controlling semiconductor die warpage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103038877A true CN103038877A (zh) | 2013-04-10 |
Family
ID=43629207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010800639960A Pending CN103038877A (zh) | 2009-12-17 | 2010-12-17 | 用于控制半导体裸片翘曲的设备和方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8710629B2 (https=) |
| EP (1) | EP2513967A2 (https=) |
| JP (1) | JP5536901B2 (https=) |
| KR (1) | KR20120101136A (https=) |
| CN (1) | CN103038877A (https=) |
| TW (1) | TW201131717A (https=) |
| WO (1) | WO2011084706A2 (https=) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106531714A (zh) * | 2017-01-24 | 2017-03-22 | 日月光封装测试(上海)有限公司 | 用于半导体封装的引线框架条及其制造方法 |
| CN106716626A (zh) * | 2014-09-26 | 2017-05-24 | 高通股份有限公司 | 用于减小电子设备中的应力的器件和方法 |
| CN108630615A (zh) * | 2017-03-14 | 2018-10-09 | 联发科技股份有限公司 | 半导体封装结构和基板结构 |
| CN110797307A (zh) * | 2018-07-16 | 2020-02-14 | 美光科技公司 | 半导体装置组合件及制作半导体装置组合件的方法 |
| CN111512433A (zh) * | 2017-10-18 | 2020-08-07 | 美光科技公司 | 用于微电子封装翘曲控制的应力调谐加固物 |
| US11171113B2 (en) | 2017-03-14 | 2021-11-09 | Mediatek Inc. | Semiconductor package structure having an annular frame with truncated corners |
| US11264337B2 (en) | 2017-03-14 | 2022-03-01 | Mediatek Inc. | Semiconductor package structure |
| US11362044B2 (en) | 2017-03-14 | 2022-06-14 | Mediatek Inc. | Semiconductor package structure |
| US11387176B2 (en) | 2017-03-14 | 2022-07-12 | Mediatek Inc. | Semiconductor package structure |
| US12424531B2 (en) | 2017-03-14 | 2025-09-23 | Mediatek Inc. | Semiconductor package structure |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8378458B2 (en) * | 2010-03-22 | 2013-02-19 | Advanced Micro Devices, Inc. | Semiconductor chip with a rounded corner |
| US8883634B2 (en) * | 2011-06-29 | 2014-11-11 | Globalfoundries Singapore Pte. Ltd. | Package interconnects |
| US9184144B2 (en) * | 2011-07-21 | 2015-11-10 | Qualcomm Incorporated | Interconnect pillars with directed compliance geometry |
| US9059191B2 (en) * | 2011-10-19 | 2015-06-16 | International Business Machines Corporation | Chamfered corner crackstop for an integrated circuit chip |
| US8464200B1 (en) | 2012-02-15 | 2013-06-11 | International Business Machines Corporation | Thermal relief optimization |
| US8566773B2 (en) | 2012-02-15 | 2013-10-22 | International Business Machines Corporation | Thermal relief automation |
| CN103378030B (zh) * | 2012-04-18 | 2016-04-20 | 中芯国际集成电路制造(上海)有限公司 | 硅通孔结构 |
| CN103377990B (zh) * | 2012-04-18 | 2016-08-31 | 中芯国际集成电路制造(上海)有限公司 | 硅通孔结构 |
| US9291578B2 (en) * | 2012-08-03 | 2016-03-22 | David L. Adler | X-ray photoemission microscope for integrated devices |
| US9245826B2 (en) * | 2013-03-11 | 2016-01-26 | Newport Fab, Llc | Anchor vias for improved backside metal adhesion to semiconductor substrate |
| US9247636B2 (en) | 2013-03-12 | 2016-01-26 | International Business Machines Corporation | Area array device connection structures with complimentary warp characteristics |
| US9355967B2 (en) | 2013-06-24 | 2016-05-31 | Qualcomm Incorporated | Stress compensation patterning |
| US9236301B2 (en) | 2013-07-11 | 2016-01-12 | Globalfoundries Inc. | Customized alleviation of stresses generated by through-substrate via(S) |
| KR102122456B1 (ko) | 2013-12-20 | 2020-06-12 | 삼성전자주식회사 | 실리콘 관통 비아 플러그들을 갖는 반도체 소자 및 이를 포함하는 반도체 패키지 |
| US10006899B2 (en) | 2014-03-25 | 2018-06-26 | Genia Technologies, Inc. | Nanopore-based sequencing chips using stacked wafer technology |
| US9728518B2 (en) | 2014-04-01 | 2017-08-08 | Ati Technologies Ulc | Interconnect etch with polymer layer edge protection |
| US9772268B2 (en) * | 2015-03-30 | 2017-09-26 | International Business Machines Corporation | Predicting semiconductor package warpage |
| US9721906B2 (en) * | 2015-08-31 | 2017-08-01 | Intel Corporation | Electronic package with corner supports |
| US20170287873A1 (en) * | 2016-03-29 | 2017-10-05 | Santosh Sankarasubramanian | Electronic assembly components with corner adhesive for warpage reduction during thermal processing |
| US11879170B2 (en) | 2019-08-14 | 2024-01-23 | Massachusetts Institute Of Technology | Stress patterning systems and methods for manufacturing free-form deformations in thin substrates |
| US11308257B1 (en) | 2020-12-15 | 2022-04-19 | International Business Machines Corporation | Stacked via rivets in chip hotspots |
| WO2026038490A1 (ja) * | 2024-08-13 | 2026-02-19 | Agc株式会社 | 半導体用無機基板 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1438687A (zh) * | 2001-12-27 | 2003-08-27 | 株式会社东芝 | 半导体器件及其制造方法 |
| WO2007023950A1 (ja) * | 2005-08-26 | 2007-03-01 | Hitachi, Ltd. | 半導体装置の製造方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2704001B2 (ja) * | 1989-07-18 | 1998-01-26 | キヤノン株式会社 | 位置検出装置 |
| JP3920399B2 (ja) * | 1997-04-25 | 2007-05-30 | 株式会社東芝 | マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置 |
| US6011301A (en) * | 1998-06-09 | 2000-01-04 | Stmicroelectronics, Inc. | Stress reduction for flip chip package |
| US6372600B1 (en) * | 1999-08-30 | 2002-04-16 | Agere Systems Guardian Corp. | Etch stops and alignment marks for bonded wafers |
| US6897125B2 (en) * | 2003-09-17 | 2005-05-24 | Intel Corporation | Methods of forming backside connections on a wafer stack |
| JP4467318B2 (ja) * | 2004-01-28 | 2010-05-26 | Necエレクトロニクス株式会社 | 半導体装置、マルチチップ半導体装置用チップのアライメント方法およびマルチチップ半導体装置用チップの製造方法 |
| JP4768994B2 (ja) * | 2005-02-07 | 2011-09-07 | ルネサスエレクトロニクス株式会社 | 配線基板および半導体装置 |
| US7948088B2 (en) | 2005-08-26 | 2011-05-24 | Hitachi, Ltd. | Semiconductor device |
| JP4735280B2 (ja) * | 2006-01-18 | 2011-07-27 | 株式会社日立製作所 | パターン形成方法 |
| JP4714049B2 (ja) * | 2006-03-15 | 2011-06-29 | Okiセミコンダクタ株式会社 | 半導体装置及び半導体装置の製造方法 |
| JP5361156B2 (ja) * | 2007-08-06 | 2013-12-04 | ラピスセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
-
2009
- 2009-12-17 US US12/640,111 patent/US8710629B2/en active Active
-
2010
- 2010-12-17 EP EP10799213A patent/EP2513967A2/en not_active Withdrawn
- 2010-12-17 CN CN2010800639960A patent/CN103038877A/zh active Pending
- 2010-12-17 WO PCT/US2010/061143 patent/WO2011084706A2/en not_active Ceased
- 2010-12-17 JP JP2012544923A patent/JP5536901B2/ja not_active Expired - Fee Related
- 2010-12-17 TW TW099144602A patent/TW201131717A/zh unknown
- 2010-12-17 KR KR1020127018759A patent/KR20120101136A/ko not_active Abandoned
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1438687A (zh) * | 2001-12-27 | 2003-08-27 | 株式会社东芝 | 半导体器件及其制造方法 |
| WO2007023950A1 (ja) * | 2005-08-26 | 2007-03-01 | Hitachi, Ltd. | 半導体装置の製造方法 |
Non-Patent Citations (1)
| Title |
|---|
| 郭莉: "《冷凝管生产技术》", 28 February 2007, 冶金工业出版社, article "俄罗斯冷轧管机", pages: 133 - 3 * |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106716626B (zh) * | 2014-09-26 | 2019-08-06 | 高通股份有限公司 | 用于减小电子设备中的应力的器件和方法 |
| CN106716626A (zh) * | 2014-09-26 | 2017-05-24 | 高通股份有限公司 | 用于减小电子设备中的应力的器件和方法 |
| CN106531714A (zh) * | 2017-01-24 | 2017-03-22 | 日月光封装测试(上海)有限公司 | 用于半导体封装的引线框架条及其制造方法 |
| US11942439B2 (en) | 2017-03-14 | 2024-03-26 | Mediatek Inc. | Semiconductor package structure |
| US11646295B2 (en) | 2017-03-14 | 2023-05-09 | Mediatek Inc. | Semiconductor package structure having an annular frame with truncated corners |
| US12525549B2 (en) | 2017-03-14 | 2026-01-13 | Mediatek Inc. | Semiconductor package structure |
| US10784211B2 (en) | 2017-03-14 | 2020-09-22 | Mediatek Inc. | Semiconductor package structure |
| US11171113B2 (en) | 2017-03-14 | 2021-11-09 | Mediatek Inc. | Semiconductor package structure having an annular frame with truncated corners |
| US11264337B2 (en) | 2017-03-14 | 2022-03-01 | Mediatek Inc. | Semiconductor package structure |
| US11362044B2 (en) | 2017-03-14 | 2022-06-14 | Mediatek Inc. | Semiconductor package structure |
| US11387176B2 (en) | 2017-03-14 | 2022-07-12 | Mediatek Inc. | Semiconductor package structure |
| US11410936B2 (en) | 2017-03-14 | 2022-08-09 | Mediatek Inc. | Semiconductor package structure |
| US12424531B2 (en) | 2017-03-14 | 2025-09-23 | Mediatek Inc. | Semiconductor package structure |
| US12142598B2 (en) | 2017-03-14 | 2024-11-12 | Mediatek Inc. | Semiconductor package structure having an annular frame with truncated corners |
| US11862578B2 (en) | 2017-03-14 | 2024-01-02 | Mediatek Inc. | Semiconductor package structure |
| CN108630615A (zh) * | 2017-03-14 | 2018-10-09 | 联发科技股份有限公司 | 半导体封装结构和基板结构 |
| US11948895B2 (en) | 2017-03-14 | 2024-04-02 | Mediatek Inc. | Semiconductor package structure |
| US12002742B2 (en) | 2017-03-14 | 2024-06-04 | Mediatek Inc. | Semiconductor package structure |
| CN111512433B (zh) * | 2017-10-18 | 2024-04-05 | 美光科技公司 | 用于微电子封装翘曲控制的应力调谐加固物 |
| CN111512433A (zh) * | 2017-10-18 | 2020-08-07 | 美光科技公司 | 用于微电子封装翘曲控制的应力调谐加固物 |
| US11658129B2 (en) | 2018-07-16 | 2023-05-23 | Micron Technology, Inc. | Electrically or temperature activated shape-memory materials for warpage control |
| CN110797307A (zh) * | 2018-07-16 | 2020-02-14 | 美光科技公司 | 半导体装置组合件及制作半导体装置组合件的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2513967A2 (en) | 2012-10-24 |
| JP2013526001A (ja) | 2013-06-20 |
| WO2011084706A3 (en) | 2013-03-28 |
| WO2011084706A2 (en) | 2011-07-14 |
| US20110147895A1 (en) | 2011-06-23 |
| TW201131717A (en) | 2011-09-16 |
| US8710629B2 (en) | 2014-04-29 |
| KR20120101136A (ko) | 2012-09-12 |
| JP5536901B2 (ja) | 2014-07-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20130410 |